1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright(c) 2020 Intel Corporation.
4  */
5 #include <linux/workqueue.h>
6 #include "intel_pxp.h"
7 #include "intel_pxp_irq.h"
8 #include "intel_pxp_session.h"
9 #include "gt/intel_gt_irq.h"
10 #include "gt/intel_gt_types.h"
11 #include "i915_irq.h"
12 #include "i915_reg.h"
13 #include "intel_runtime_pm.h"
14 
15 /**
16  * intel_pxp_irq_handler - Handles PXP interrupts.
17  * @pxp: pointer to pxp struct
18  * @iir: interrupt vector
19  */
20 void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
21 {
22 	struct intel_gt *gt = pxp_to_gt(pxp);
23 
24 	if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
25 		return;
26 
27 	lockdep_assert_held(&gt->irq_lock);
28 
29 	if (unlikely(!iir))
30 		return;
31 
32 	if (iir & (GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT |
33 		   GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT)) {
34 		/* immediately mark PXP as inactive on termination */
35 		intel_pxp_mark_termination_in_progress(pxp);
36 		pxp->session_events |= PXP_TERMINATION_REQUEST | PXP_INVAL_REQUIRED;
37 	}
38 
39 	if (iir & GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT)
40 		pxp->session_events |= PXP_TERMINATION_COMPLETE;
41 
42 	if (pxp->session_events)
43 		queue_work(system_unbound_wq, &pxp->session_work);
44 }
45 
46 static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts)
47 {
48 	struct intel_uncore *uncore = gt->uncore;
49 	const u32 mask = interrupts << 16;
50 
51 	intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, mask);
52 	intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK,  ~mask);
53 }
54 
55 static inline void pxp_irq_reset(struct intel_gt *gt)
56 {
57 	spin_lock_irq(&gt->irq_lock);
58 	gen11_gt_reset_one_iir(gt, 0, GEN11_KCR);
59 	spin_unlock_irq(&gt->irq_lock);
60 }
61 
62 void intel_pxp_irq_enable(struct intel_pxp *pxp)
63 {
64 	struct intel_gt *gt = pxp_to_gt(pxp);
65 
66 	spin_lock_irq(&gt->irq_lock);
67 
68 	if (!pxp->irq_enabled)
69 		WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_KCR));
70 
71 	__pxp_set_interrupts(gt, GEN12_PXP_INTERRUPTS);
72 	pxp->irq_enabled = true;
73 
74 	spin_unlock_irq(&gt->irq_lock);
75 }
76 
77 void intel_pxp_irq_disable(struct intel_pxp *pxp)
78 {
79 	struct intel_gt *gt = pxp_to_gt(pxp);
80 
81 	/*
82 	 * We always need to submit a global termination when we re-enable the
83 	 * interrupts, so there is no need to make sure that the session state
84 	 * makes sense at the end of this function. Just make sure this is not
85 	 * called in a path were the driver consider the session as valid and
86 	 * doesn't call a termination on restart.
87 	 */
88 	GEM_WARN_ON(intel_pxp_is_active(pxp));
89 
90 	spin_lock_irq(&gt->irq_lock);
91 
92 	pxp->irq_enabled = false;
93 	__pxp_set_interrupts(gt, 0);
94 
95 	spin_unlock_irq(&gt->irq_lock);
96 	intel_synchronize_irq(gt->i915);
97 
98 	pxp_irq_reset(gt);
99 
100 	flush_work(&pxp->session_work);
101 }
102