1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright(c) 2023 Intel Corporation. 4 */ 5 6 #include "gem/i915_gem_internal.h" 7 8 #include "gt/intel_context.h" 9 #include "gt/intel_gt.h" 10 #include "gt/uc/intel_gsc_fw.h" 11 #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h" 12 13 #include "i915_drv.h" 14 #include "intel_pxp.h" 15 #include "intel_pxp_cmd_interface_42.h" 16 #include "intel_pxp_cmd_interface_43.h" 17 #include "intel_pxp_gsccs.h" 18 #include "intel_pxp_types.h" 19 20 static bool 21 is_fw_err_platform_config(u32 type) 22 { 23 switch (type) { 24 case PXP_STATUS_ERROR_API_VERSION: 25 case PXP_STATUS_PLATFCONFIG_KF1_NOVERIF: 26 case PXP_STATUS_PLATFCONFIG_KF1_BAD: 27 return true; 28 default: 29 break; 30 } 31 return false; 32 } 33 34 static const char * 35 fw_err_to_string(u32 type) 36 { 37 switch (type) { 38 case PXP_STATUS_ERROR_API_VERSION: 39 return "ERR_API_VERSION"; 40 case PXP_STATUS_NOT_READY: 41 return "ERR_NOT_READY"; 42 case PXP_STATUS_PLATFCONFIG_KF1_NOVERIF: 43 case PXP_STATUS_PLATFCONFIG_KF1_BAD: 44 return "ERR_PLATFORM_CONFIG"; 45 default: 46 break; 47 } 48 return NULL; 49 } 50 51 static int 52 gsccs_send_message(struct intel_pxp *pxp, 53 void *msg_in, size_t msg_in_size, 54 void *msg_out, size_t msg_out_size_max, 55 size_t *msg_out_len, 56 u64 *gsc_msg_handle_retry) 57 { 58 struct intel_gt *gt = pxp->ctrl_gt; 59 struct drm_i915_private *i915 = gt->i915; 60 struct gsccs_session_resources *exec_res = &pxp->gsccs_res; 61 struct intel_gsc_mtl_header *header = exec_res->pkt_vaddr; 62 struct intel_gsc_heci_non_priv_pkt pkt; 63 size_t max_msg_size; 64 u32 reply_size; 65 int ret; 66 67 if (!exec_res->ce) 68 return -ENODEV; 69 70 max_msg_size = PXP43_MAX_HECI_INOUT_SIZE - sizeof(*header); 71 72 if (msg_in_size > max_msg_size || msg_out_size_max > max_msg_size) 73 return -ENOSPC; 74 75 if (!exec_res->pkt_vma || !exec_res->bb_vma) 76 return -ENOENT; 77 78 GEM_BUG_ON(exec_res->pkt_vma->size < (2 * PXP43_MAX_HECI_INOUT_SIZE)); 79 80 mutex_lock(&pxp->tee_mutex); 81 82 memset(header, 0, sizeof(*header)); 83 intel_gsc_uc_heci_cmd_emit_mtl_header(header, HECI_MEADDRESS_PXP, 84 msg_in_size + sizeof(*header), 85 exec_res->host_session_handle); 86 87 /* check if this is a host-session-handle cleanup call (empty packet) */ 88 if (!msg_in && !msg_out) 89 header->flags |= GSC_INFLAG_MSG_CLEANUP; 90 91 /* copy caller provided gsc message handle if this is polling for a prior msg completion */ 92 header->gsc_message_handle = *gsc_msg_handle_retry; 93 94 /* NOTE: zero size packets are used for session-cleanups */ 95 if (msg_in && msg_in_size) 96 memcpy(exec_res->pkt_vaddr + sizeof(*header), msg_in, msg_in_size); 97 98 pkt.addr_in = i915_vma_offset(exec_res->pkt_vma); 99 pkt.size_in = header->message_size; 100 pkt.addr_out = pkt.addr_in + PXP43_MAX_HECI_INOUT_SIZE; 101 pkt.size_out = msg_out_size_max + sizeof(*header); 102 pkt.heci_pkt_vma = exec_res->pkt_vma; 103 pkt.bb_vma = exec_res->bb_vma; 104 105 /* 106 * Before submitting, let's clear-out the validity marker on the reply offset. 107 * We use offset PXP43_MAX_HECI_INOUT_SIZE for reply location so point header there. 108 */ 109 header = exec_res->pkt_vaddr + PXP43_MAX_HECI_INOUT_SIZE; 110 header->validity_marker = 0; 111 112 ret = intel_gsc_uc_heci_cmd_submit_nonpriv(>->uc.gsc, 113 exec_res->ce, &pkt, exec_res->bb_vaddr, 114 GSC_REPLY_LATENCY_MS); 115 if (ret) { 116 drm_err(&i915->drm, "failed to send gsc PXP msg (%d)\n", ret); 117 goto unlock; 118 } 119 120 /* Response validity marker, status and busyness */ 121 if (header->validity_marker != GSC_HECI_VALIDITY_MARKER) { 122 drm_err(&i915->drm, "gsc PXP reply with invalid validity marker\n"); 123 ret = -EINVAL; 124 goto unlock; 125 } 126 if (header->status != 0) { 127 drm_dbg(&i915->drm, "gsc PXP reply status has error = 0x%08x\n", 128 header->status); 129 ret = -EINVAL; 130 goto unlock; 131 } 132 if (header->flags & GSC_OUTFLAG_MSG_PENDING) { 133 drm_dbg(&i915->drm, "gsc PXP reply is busy\n"); 134 /* 135 * When the GSC firmware replies with pending bit, it means that the requested 136 * operation has begun but the completion is pending and the caller needs 137 * to re-request with the gsc_message_handle that was returned by the firmware. 138 * until the pending bit is turned off. 139 */ 140 *gsc_msg_handle_retry = header->gsc_message_handle; 141 ret = -EAGAIN; 142 goto unlock; 143 } 144 145 reply_size = header->message_size - sizeof(*header); 146 if (reply_size > msg_out_size_max) { 147 drm_warn(&i915->drm, "caller with insufficient PXP reply size %u (%zu)\n", 148 reply_size, msg_out_size_max); 149 reply_size = msg_out_size_max; 150 } 151 152 if (msg_out) 153 memcpy(msg_out, exec_res->pkt_vaddr + PXP43_MAX_HECI_INOUT_SIZE + sizeof(*header), 154 reply_size); 155 if (msg_out_len) 156 *msg_out_len = reply_size; 157 158 unlock: 159 mutex_unlock(&pxp->tee_mutex); 160 return ret; 161 } 162 163 static int 164 gsccs_send_message_retry_complete(struct intel_pxp *pxp, 165 void *msg_in, size_t msg_in_size, 166 void *msg_out, size_t msg_out_size_max, 167 size_t *msg_out_len) 168 { 169 u64 gsc_session_retry = 0; 170 int ret, tries = 0; 171 172 /* 173 * Keep sending request if GSC firmware was busy. Based on fw specs + 174 * sw overhead (and testing) we expect a worst case pending-bit delay of 175 * GSC_PENDING_RETRY_MAXCOUNT x GSC_PENDING_RETRY_PAUSE_MS millisecs. 176 */ 177 do { 178 ret = gsccs_send_message(pxp, msg_in, msg_in_size, msg_out, msg_out_size_max, 179 msg_out_len, &gsc_session_retry); 180 /* Only try again if gsc says so */ 181 if (ret != -EAGAIN) 182 break; 183 184 msleep(GSC_PENDING_RETRY_PAUSE_MS); 185 } while (++tries < GSC_PENDING_RETRY_MAXCOUNT); 186 187 return ret; 188 } 189 190 bool intel_pxp_gsccs_is_ready_for_sessions(struct intel_pxp *pxp) 191 { 192 /* 193 * GSC-fw loading, HuC-fw loading, HuC-fw authentication and 194 * GSC-proxy init flow (requiring an mei component driver) 195 * must all occur first before we can start requesting for PXP 196 * sessions. Checking for completion on HuC authentication and 197 * gsc-proxy init flow (the last set of dependencies that 198 * are out of order) will suffice. 199 */ 200 if (intel_huc_is_authenticated(&pxp->ctrl_gt->uc.huc, INTEL_HUC_AUTH_BY_GSC) && 201 intel_gsc_uc_fw_proxy_init_done(&pxp->ctrl_gt->uc.gsc, true)) 202 return true; 203 204 return false; 205 } 206 207 int intel_pxp_gsccs_create_session(struct intel_pxp *pxp, 208 int arb_session_id) 209 { 210 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; 211 struct pxp43_create_arb_in msg_in = {0}; 212 struct pxp43_create_arb_out msg_out = {0}; 213 int ret; 214 215 msg_in.header.api_version = PXP_APIVER(4, 3); 216 msg_in.header.command_id = PXP43_CMDID_INIT_SESSION; 217 msg_in.header.stream_id = (FIELD_PREP(PXP43_INIT_SESSION_APPID, arb_session_id) | 218 FIELD_PREP(PXP43_INIT_SESSION_VALID, 1) | 219 FIELD_PREP(PXP43_INIT_SESSION_APPTYPE, 0)); 220 msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header); 221 msg_in.protection_mode = PXP43_INIT_SESSION_PROTECTION_ARB; 222 223 ret = gsccs_send_message_retry_complete(pxp, 224 &msg_in, sizeof(msg_in), 225 &msg_out, sizeof(msg_out), NULL); 226 if (ret) { 227 drm_err(&i915->drm, "Failed to init session %d, ret=[%d]\n", arb_session_id, ret); 228 } else if (msg_out.header.status != 0) { 229 if (is_fw_err_platform_config(msg_out.header.status)) { 230 drm_info_once(&i915->drm, 231 "PXP init-session-%d failed due to BIOS/SOC:0x%08x:%s\n", 232 arb_session_id, msg_out.header.status, 233 fw_err_to_string(msg_out.header.status)); 234 } else { 235 drm_dbg(&i915->drm, "PXP init-session-%d failed 0x%08x:%st:\n", 236 arb_session_id, msg_out.header.status, 237 fw_err_to_string(msg_out.header.status)); 238 drm_dbg(&i915->drm, " cmd-detail: ID=[0x%08x],API-Ver-[0x%08x]\n", 239 msg_in.header.command_id, msg_in.header.api_version); 240 } 241 } 242 243 return ret; 244 } 245 246 void intel_pxp_gsccs_end_arb_fw_session(struct intel_pxp *pxp, u32 session_id) 247 { 248 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; 249 struct pxp42_inv_stream_key_in msg_in = {0}; 250 struct pxp42_inv_stream_key_out msg_out = {0}; 251 int ret = 0; 252 253 /* 254 * Stream key invalidation reuses the same version 4.2 input/output 255 * command format but firmware requires 4.3 API interaction 256 */ 257 msg_in.header.api_version = PXP_APIVER(4, 3); 258 msg_in.header.command_id = PXP42_CMDID_INVALIDATE_STREAM_KEY; 259 msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header); 260 261 msg_in.header.stream_id = FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_VALID, 1); 262 msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_APP_TYPE, 0); 263 msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_ID, session_id); 264 265 ret = gsccs_send_message_retry_complete(pxp, 266 &msg_in, sizeof(msg_in), 267 &msg_out, sizeof(msg_out), NULL); 268 if (ret) { 269 drm_err(&i915->drm, "Failed to inv-stream-key-%u, ret=[%d]\n", 270 session_id, ret); 271 } else if (msg_out.header.status != 0) { 272 if (is_fw_err_platform_config(msg_out.header.status)) { 273 drm_info_once(&i915->drm, 274 "PXP inv-stream-key-%u failed due to BIOS/SOC :0x%08x:%s\n", 275 session_id, msg_out.header.status, 276 fw_err_to_string(msg_out.header.status)); 277 } else { 278 drm_dbg(&i915->drm, "PXP inv-stream-key-%u failed 0x%08x:%s:\n", 279 session_id, msg_out.header.status, 280 fw_err_to_string(msg_out.header.status)); 281 drm_dbg(&i915->drm, " cmd-detail: ID=[0x%08x],API-Ver-[0x%08x]\n", 282 msg_in.header.command_id, msg_in.header.api_version); 283 } 284 } 285 } 286 287 static void 288 gsccs_cleanup_fw_host_session_handle(struct intel_pxp *pxp) 289 { 290 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; 291 int ret; 292 293 ret = gsccs_send_message_retry_complete(pxp, NULL, 0, NULL, 0, NULL); 294 if (ret) 295 drm_dbg(&i915->drm, "Failed to send gsccs msg host-session-cleanup: ret=[%d]\n", 296 ret); 297 } 298 299 static void 300 gsccs_destroy_execution_resource(struct intel_pxp *pxp) 301 { 302 struct gsccs_session_resources *exec_res = &pxp->gsccs_res; 303 304 if (exec_res->host_session_handle) 305 gsccs_cleanup_fw_host_session_handle(pxp); 306 if (exec_res->ce) 307 intel_context_put(exec_res->ce); 308 if (exec_res->bb_vma) 309 i915_vma_unpin_and_release(&exec_res->bb_vma, I915_VMA_RELEASE_MAP); 310 if (exec_res->pkt_vma) 311 i915_vma_unpin_and_release(&exec_res->pkt_vma, I915_VMA_RELEASE_MAP); 312 313 memset(exec_res, 0, sizeof(*exec_res)); 314 } 315 316 static int 317 gsccs_create_buffer(struct intel_gt *gt, 318 const char *bufname, size_t size, 319 struct i915_vma **vma, void **map) 320 { 321 struct drm_i915_private *i915 = gt->i915; 322 struct drm_i915_gem_object *obj; 323 int err = 0; 324 325 obj = i915_gem_object_create_internal(i915, size); 326 if (IS_ERR(obj)) { 327 drm_err(&i915->drm, "Failed to allocate gsccs backend %s.\n", bufname); 328 err = PTR_ERR(obj); 329 goto out_none; 330 } 331 332 *vma = i915_vma_instance(obj, gt->vm, NULL); 333 if (IS_ERR(*vma)) { 334 drm_err(&i915->drm, "Failed to vma-instance gsccs backend %s.\n", bufname); 335 err = PTR_ERR(*vma); 336 goto out_put; 337 } 338 339 /* return a virtual pointer */ 340 *map = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true)); 341 if (IS_ERR(*map)) { 342 drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname); 343 err = PTR_ERR(*map); 344 goto out_put; 345 } 346 347 /* all PXP sessions commands are treated as non-privileged */ 348 err = i915_vma_pin(*vma, 0, 0, PIN_USER); 349 if (err) { 350 drm_err(&i915->drm, "Failed to vma-pin gsccs backend %s.\n", bufname); 351 goto out_unmap; 352 } 353 354 return 0; 355 356 out_unmap: 357 i915_gem_object_unpin_map(obj); 358 out_put: 359 i915_gem_object_put(obj); 360 out_none: 361 *vma = NULL; 362 *map = NULL; 363 364 return err; 365 } 366 367 static int 368 gsccs_allocate_execution_resource(struct intel_pxp *pxp) 369 { 370 struct intel_gt *gt = pxp->ctrl_gt; 371 struct gsccs_session_resources *exec_res = &pxp->gsccs_res; 372 struct intel_engine_cs *engine = gt->engine[GSC0]; 373 struct intel_context *ce; 374 int err = 0; 375 376 /* 377 * First, ensure the GSC engine is present. 378 * NOTE: Backend would only be called with the correct gt. 379 */ 380 if (!engine) 381 return -ENODEV; 382 383 /* 384 * Now, allocate, pin and map two objects, one for the heci message packet 385 * and another for the batch buffer we submit into GSC engine (that includes the packet). 386 * NOTE: GSC-CS backend is currently only supported on MTL, so we allocate shmem. 387 */ 388 err = gsccs_create_buffer(pxp->ctrl_gt, "Heci Packet", 389 2 * PXP43_MAX_HECI_INOUT_SIZE, 390 &exec_res->pkt_vma, &exec_res->pkt_vaddr); 391 if (err) 392 return err; 393 394 err = gsccs_create_buffer(pxp->ctrl_gt, "Batch Buffer", PAGE_SIZE, 395 &exec_res->bb_vma, &exec_res->bb_vaddr); 396 if (err) 397 goto free_pkt; 398 399 /* Finally, create an intel_context to be used during the submission */ 400 ce = intel_context_create(engine); 401 if (IS_ERR(ce)) { 402 drm_err(>->i915->drm, "Failed creating gsccs backend ctx\n"); 403 err = PTR_ERR(ce); 404 goto free_batch; 405 } 406 407 i915_vm_put(ce->vm); 408 ce->vm = i915_vm_get(pxp->ctrl_gt->vm); 409 exec_res->ce = ce; 410 411 /* initialize host-session-handle (for all i915-to-gsc-firmware PXP cmds) */ 412 get_random_bytes(&exec_res->host_session_handle, sizeof(exec_res->host_session_handle)); 413 414 return 0; 415 416 free_batch: 417 i915_vma_unpin_and_release(&exec_res->bb_vma, I915_VMA_RELEASE_MAP); 418 free_pkt: 419 i915_vma_unpin_and_release(&exec_res->pkt_vma, I915_VMA_RELEASE_MAP); 420 memset(exec_res, 0, sizeof(*exec_res)); 421 422 return err; 423 } 424 425 void intel_pxp_gsccs_fini(struct intel_pxp *pxp) 426 { 427 intel_wakeref_t wakeref; 428 429 gsccs_destroy_execution_resource(pxp); 430 with_intel_runtime_pm(&pxp->ctrl_gt->i915->runtime_pm, wakeref) 431 intel_pxp_fini_hw(pxp); 432 } 433 434 int intel_pxp_gsccs_init(struct intel_pxp *pxp) 435 { 436 int ret; 437 intel_wakeref_t wakeref; 438 439 ret = gsccs_allocate_execution_resource(pxp); 440 if (!ret) { 441 with_intel_runtime_pm(&pxp->ctrl_gt->i915->runtime_pm, wakeref) 442 intel_pxp_init_hw(pxp); 443 } 444 return ret; 445 } 446