1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright(c) 2023 Intel Corporation. 4 */ 5 6 #include "gem/i915_gem_internal.h" 7 8 #include "gt/intel_context.h" 9 #include "gt/uc/intel_gsc_fw.h" 10 #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h" 11 12 #include "i915_drv.h" 13 #include "intel_pxp.h" 14 #include "intel_pxp_cmd_interface_42.h" 15 #include "intel_pxp_cmd_interface_43.h" 16 #include "intel_pxp_gsccs.h" 17 #include "intel_pxp_types.h" 18 19 static bool 20 is_fw_err_platform_config(u32 type) 21 { 22 switch (type) { 23 case PXP_STATUS_ERROR_API_VERSION: 24 case PXP_STATUS_PLATFCONFIG_KF1_NOVERIF: 25 case PXP_STATUS_PLATFCONFIG_KF1_BAD: 26 return true; 27 default: 28 break; 29 } 30 return false; 31 } 32 33 static const char * 34 fw_err_to_string(u32 type) 35 { 36 switch (type) { 37 case PXP_STATUS_ERROR_API_VERSION: 38 return "ERR_API_VERSION"; 39 case PXP_STATUS_NOT_READY: 40 return "ERR_NOT_READY"; 41 case PXP_STATUS_PLATFCONFIG_KF1_NOVERIF: 42 case PXP_STATUS_PLATFCONFIG_KF1_BAD: 43 return "ERR_PLATFORM_CONFIG"; 44 default: 45 break; 46 } 47 return NULL; 48 } 49 50 static int 51 gsccs_send_message(struct intel_pxp *pxp, 52 void *msg_in, size_t msg_in_size, 53 void *msg_out, size_t msg_out_size_max, 54 size_t *msg_out_len, 55 u64 *gsc_msg_handle_retry) 56 { 57 struct intel_gt *gt = pxp->ctrl_gt; 58 struct drm_i915_private *i915 = gt->i915; 59 struct gsccs_session_resources *exec_res = &pxp->gsccs_res; 60 struct intel_gsc_mtl_header *header = exec_res->pkt_vaddr; 61 struct intel_gsc_heci_non_priv_pkt pkt; 62 size_t max_msg_size; 63 u32 reply_size; 64 int ret; 65 66 if (!exec_res->ce) 67 return -ENODEV; 68 69 max_msg_size = PXP43_MAX_HECI_INOUT_SIZE - sizeof(*header); 70 71 if (msg_in_size > max_msg_size || msg_out_size_max > max_msg_size) 72 return -ENOSPC; 73 74 if (!exec_res->pkt_vma || !exec_res->bb_vma) 75 return -ENOENT; 76 77 GEM_BUG_ON(exec_res->pkt_vma->size < (2 * PXP43_MAX_HECI_INOUT_SIZE)); 78 79 mutex_lock(&pxp->tee_mutex); 80 81 memset(header, 0, sizeof(*header)); 82 intel_gsc_uc_heci_cmd_emit_mtl_header(header, HECI_MEADDRESS_PXP, 83 msg_in_size + sizeof(*header), 84 exec_res->host_session_handle); 85 86 /* check if this is a host-session-handle cleanup call (empty packet) */ 87 if (!msg_in && !msg_out) 88 header->flags |= GSC_INFLAG_MSG_CLEANUP; 89 90 /* copy caller provided gsc message handle if this is polling for a prior msg completion */ 91 header->gsc_message_handle = *gsc_msg_handle_retry; 92 93 /* NOTE: zero size packets are used for session-cleanups */ 94 if (msg_in && msg_in_size) 95 memcpy(exec_res->pkt_vaddr + sizeof(*header), msg_in, msg_in_size); 96 97 pkt.addr_in = i915_vma_offset(exec_res->pkt_vma); 98 pkt.size_in = header->message_size; 99 pkt.addr_out = pkt.addr_in + PXP43_MAX_HECI_INOUT_SIZE; 100 pkt.size_out = msg_out_size_max + sizeof(*header); 101 pkt.heci_pkt_vma = exec_res->pkt_vma; 102 pkt.bb_vma = exec_res->bb_vma; 103 104 /* 105 * Before submitting, let's clear-out the validity marker on the reply offset. 106 * We use offset PXP43_MAX_HECI_INOUT_SIZE for reply location so point header there. 107 */ 108 header = exec_res->pkt_vaddr + PXP43_MAX_HECI_INOUT_SIZE; 109 header->validity_marker = 0; 110 111 ret = intel_gsc_uc_heci_cmd_submit_nonpriv(>->uc.gsc, 112 exec_res->ce, &pkt, exec_res->bb_vaddr, 113 GSC_REPLY_LATENCY_MS); 114 if (ret) { 115 drm_err(&i915->drm, "failed to send gsc PXP msg (%d)\n", ret); 116 goto unlock; 117 } 118 119 /* Response validity marker, status and busyness */ 120 if (header->validity_marker != GSC_HECI_VALIDITY_MARKER) { 121 drm_err(&i915->drm, "gsc PXP reply with invalid validity marker\n"); 122 ret = -EINVAL; 123 goto unlock; 124 } 125 if (header->status != 0) { 126 drm_dbg(&i915->drm, "gsc PXP reply status has error = 0x%08x\n", 127 header->status); 128 ret = -EINVAL; 129 goto unlock; 130 } 131 if (header->flags & GSC_OUTFLAG_MSG_PENDING) { 132 drm_dbg(&i915->drm, "gsc PXP reply is busy\n"); 133 /* 134 * When the GSC firmware replies with pending bit, it means that the requested 135 * operation has begun but the completion is pending and the caller needs 136 * to re-request with the gsc_message_handle that was returned by the firmware. 137 * until the pending bit is turned off. 138 */ 139 *gsc_msg_handle_retry = header->gsc_message_handle; 140 ret = -EAGAIN; 141 goto unlock; 142 } 143 144 reply_size = header->message_size - sizeof(*header); 145 if (reply_size > msg_out_size_max) { 146 drm_warn(&i915->drm, "caller with insufficient PXP reply size %u (%zu)\n", 147 reply_size, msg_out_size_max); 148 reply_size = msg_out_size_max; 149 } 150 151 if (msg_out) 152 memcpy(msg_out, exec_res->pkt_vaddr + PXP43_MAX_HECI_INOUT_SIZE + sizeof(*header), 153 reply_size); 154 if (msg_out_len) 155 *msg_out_len = reply_size; 156 157 unlock: 158 mutex_unlock(&pxp->tee_mutex); 159 return ret; 160 } 161 162 static int 163 gsccs_send_message_retry_complete(struct intel_pxp *pxp, 164 void *msg_in, size_t msg_in_size, 165 void *msg_out, size_t msg_out_size_max, 166 size_t *msg_out_len) 167 { 168 u64 gsc_session_retry = 0; 169 int ret, tries = 0; 170 171 /* 172 * Keep sending request if GSC firmware was busy. Based on fw specs + 173 * sw overhead (and testing) we expect a worst case pending-bit delay of 174 * GSC_PENDING_RETRY_MAXCOUNT x GSC_PENDING_RETRY_PAUSE_MS millisecs. 175 */ 176 do { 177 ret = gsccs_send_message(pxp, msg_in, msg_in_size, msg_out, msg_out_size_max, 178 msg_out_len, &gsc_session_retry); 179 /* Only try again if gsc says so */ 180 if (ret != -EAGAIN) 181 break; 182 183 msleep(GSC_PENDING_RETRY_PAUSE_MS); 184 } while (++tries < GSC_PENDING_RETRY_MAXCOUNT); 185 186 return ret; 187 } 188 189 bool intel_pxp_gsccs_is_ready_for_sessions(struct intel_pxp *pxp) 190 { 191 /* 192 * GSC-fw loading, HuC-fw loading, HuC-fw authentication and 193 * GSC-proxy init flow (requiring an mei component driver) 194 * must all occur first before we can start requesting for PXP 195 * sessions. Checking for completion on HuC authentication and 196 * gsc-proxy init flow (the last set of dependencies that 197 * are out of order) will suffice. 198 */ 199 if (intel_huc_is_authenticated(&pxp->ctrl_gt->uc.huc, INTEL_HUC_AUTH_BY_GSC) && 200 intel_gsc_uc_fw_proxy_init_done(&pxp->ctrl_gt->uc.gsc)) 201 return true; 202 203 return false; 204 } 205 206 int intel_pxp_gsccs_create_session(struct intel_pxp *pxp, 207 int arb_session_id) 208 { 209 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; 210 struct pxp43_create_arb_in msg_in = {0}; 211 struct pxp43_create_arb_out msg_out = {0}; 212 int ret; 213 214 msg_in.header.api_version = PXP_APIVER(4, 3); 215 msg_in.header.command_id = PXP43_CMDID_INIT_SESSION; 216 msg_in.header.stream_id = (FIELD_PREP(PXP43_INIT_SESSION_APPID, arb_session_id) | 217 FIELD_PREP(PXP43_INIT_SESSION_VALID, 1) | 218 FIELD_PREP(PXP43_INIT_SESSION_APPTYPE, 0)); 219 msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header); 220 msg_in.protection_mode = PXP43_INIT_SESSION_PROTECTION_ARB; 221 222 ret = gsccs_send_message_retry_complete(pxp, 223 &msg_in, sizeof(msg_in), 224 &msg_out, sizeof(msg_out), NULL); 225 if (ret) { 226 drm_err(&i915->drm, "Failed to init session %d, ret=[%d]\n", arb_session_id, ret); 227 } else if (msg_out.header.status != 0) { 228 if (is_fw_err_platform_config(msg_out.header.status)) { 229 drm_info_once(&i915->drm, 230 "PXP init-session-%d failed due to BIOS/SOC:0x%08x:%s\n", 231 arb_session_id, msg_out.header.status, 232 fw_err_to_string(msg_out.header.status)); 233 } else { 234 drm_dbg(&i915->drm, "PXP init-session-%d failed 0x%08x:%st:\n", 235 arb_session_id, msg_out.header.status, 236 fw_err_to_string(msg_out.header.status)); 237 drm_dbg(&i915->drm, " cmd-detail: ID=[0x%08x],API-Ver-[0x%08x]\n", 238 msg_in.header.command_id, msg_in.header.api_version); 239 } 240 } 241 242 return ret; 243 } 244 245 void intel_pxp_gsccs_end_arb_fw_session(struct intel_pxp *pxp, u32 session_id) 246 { 247 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; 248 struct pxp42_inv_stream_key_in msg_in = {0}; 249 struct pxp42_inv_stream_key_out msg_out = {0}; 250 int ret = 0; 251 252 /* 253 * Stream key invalidation reuses the same version 4.2 input/output 254 * command format but firmware requires 4.3 API interaction 255 */ 256 msg_in.header.api_version = PXP_APIVER(4, 3); 257 msg_in.header.command_id = PXP42_CMDID_INVALIDATE_STREAM_KEY; 258 msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header); 259 260 msg_in.header.stream_id = FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_VALID, 1); 261 msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_APP_TYPE, 0); 262 msg_in.header.stream_id |= FIELD_PREP(PXP_CMDHDR_EXTDATA_SESSION_ID, session_id); 263 264 ret = gsccs_send_message_retry_complete(pxp, 265 &msg_in, sizeof(msg_in), 266 &msg_out, sizeof(msg_out), NULL); 267 if (ret) { 268 drm_err(&i915->drm, "Failed to inv-stream-key-%u, ret=[%d]\n", 269 session_id, ret); 270 } else if (msg_out.header.status != 0) { 271 if (is_fw_err_platform_config(msg_out.header.status)) { 272 drm_info_once(&i915->drm, 273 "PXP inv-stream-key-%u failed due to BIOS/SOC :0x%08x:%s\n", 274 session_id, msg_out.header.status, 275 fw_err_to_string(msg_out.header.status)); 276 } else { 277 drm_dbg(&i915->drm, "PXP inv-stream-key-%u failed 0x%08x:%s:\n", 278 session_id, msg_out.header.status, 279 fw_err_to_string(msg_out.header.status)); 280 drm_dbg(&i915->drm, " cmd-detail: ID=[0x%08x],API-Ver-[0x%08x]\n", 281 msg_in.header.command_id, msg_in.header.api_version); 282 } 283 } 284 } 285 286 static void 287 gsccs_cleanup_fw_host_session_handle(struct intel_pxp *pxp) 288 { 289 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; 290 int ret; 291 292 ret = gsccs_send_message_retry_complete(pxp, NULL, 0, NULL, 0, NULL); 293 if (ret) 294 drm_dbg(&i915->drm, "Failed to send gsccs msg host-session-cleanup: ret=[%d]\n", 295 ret); 296 } 297 298 static void 299 gsccs_destroy_execution_resource(struct intel_pxp *pxp) 300 { 301 struct gsccs_session_resources *exec_res = &pxp->gsccs_res; 302 303 if (exec_res->host_session_handle) 304 gsccs_cleanup_fw_host_session_handle(pxp); 305 if (exec_res->ce) 306 intel_context_put(exec_res->ce); 307 if (exec_res->bb_vma) 308 i915_vma_unpin_and_release(&exec_res->bb_vma, I915_VMA_RELEASE_MAP); 309 if (exec_res->pkt_vma) 310 i915_vma_unpin_and_release(&exec_res->pkt_vma, I915_VMA_RELEASE_MAP); 311 312 memset(exec_res, 0, sizeof(*exec_res)); 313 } 314 315 static int 316 gsccs_create_buffer(struct intel_gt *gt, 317 const char *bufname, size_t size, 318 struct i915_vma **vma, void **map) 319 { 320 struct drm_i915_private *i915 = gt->i915; 321 struct drm_i915_gem_object *obj; 322 int err = 0; 323 324 obj = i915_gem_object_create_internal(i915, size); 325 if (IS_ERR(obj)) { 326 drm_err(&i915->drm, "Failed to allocate gsccs backend %s.\n", bufname); 327 err = PTR_ERR(obj); 328 goto out_none; 329 } 330 331 *vma = i915_vma_instance(obj, gt->vm, NULL); 332 if (IS_ERR(*vma)) { 333 drm_err(&i915->drm, "Failed to vma-instance gsccs backend %s.\n", bufname); 334 err = PTR_ERR(*vma); 335 goto out_put; 336 } 337 338 /* return a virtual pointer */ 339 *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true)); 340 if (IS_ERR(*map)) { 341 drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname); 342 err = PTR_ERR(*map); 343 goto out_put; 344 } 345 346 /* all PXP sessions commands are treated as non-privileged */ 347 err = i915_vma_pin(*vma, 0, 0, PIN_USER); 348 if (err) { 349 drm_err(&i915->drm, "Failed to vma-pin gsccs backend %s.\n", bufname); 350 goto out_unmap; 351 } 352 353 return 0; 354 355 out_unmap: 356 i915_gem_object_unpin_map(obj); 357 out_put: 358 i915_gem_object_put(obj); 359 out_none: 360 *vma = NULL; 361 *map = NULL; 362 363 return err; 364 } 365 366 static int 367 gsccs_allocate_execution_resource(struct intel_pxp *pxp) 368 { 369 struct intel_gt *gt = pxp->ctrl_gt; 370 struct gsccs_session_resources *exec_res = &pxp->gsccs_res; 371 struct intel_engine_cs *engine = gt->engine[GSC0]; 372 struct intel_context *ce; 373 int err = 0; 374 375 /* 376 * First, ensure the GSC engine is present. 377 * NOTE: Backend would only be called with the correct gt. 378 */ 379 if (!engine) 380 return -ENODEV; 381 382 /* 383 * Now, allocate, pin and map two objects, one for the heci message packet 384 * and another for the batch buffer we submit into GSC engine (that includes the packet). 385 * NOTE: GSC-CS backend is currently only supported on MTL, so we allocate shmem. 386 */ 387 err = gsccs_create_buffer(pxp->ctrl_gt, "Heci Packet", 388 2 * PXP43_MAX_HECI_INOUT_SIZE, 389 &exec_res->pkt_vma, &exec_res->pkt_vaddr); 390 if (err) 391 return err; 392 393 err = gsccs_create_buffer(pxp->ctrl_gt, "Batch Buffer", PAGE_SIZE, 394 &exec_res->bb_vma, &exec_res->bb_vaddr); 395 if (err) 396 goto free_pkt; 397 398 /* Finally, create an intel_context to be used during the submission */ 399 ce = intel_context_create(engine); 400 if (IS_ERR(ce)) { 401 drm_err(>->i915->drm, "Failed creating gsccs backend ctx\n"); 402 err = PTR_ERR(ce); 403 goto free_batch; 404 } 405 406 i915_vm_put(ce->vm); 407 ce->vm = i915_vm_get(pxp->ctrl_gt->vm); 408 exec_res->ce = ce; 409 410 /* initialize host-session-handle (for all i915-to-gsc-firmware PXP cmds) */ 411 get_random_bytes(&exec_res->host_session_handle, sizeof(exec_res->host_session_handle)); 412 413 return 0; 414 415 free_batch: 416 i915_vma_unpin_and_release(&exec_res->bb_vma, I915_VMA_RELEASE_MAP); 417 free_pkt: 418 i915_vma_unpin_and_release(&exec_res->pkt_vma, I915_VMA_RELEASE_MAP); 419 memset(exec_res, 0, sizeof(*exec_res)); 420 421 return err; 422 } 423 424 void intel_pxp_gsccs_fini(struct intel_pxp *pxp) 425 { 426 intel_wakeref_t wakeref; 427 428 gsccs_destroy_execution_resource(pxp); 429 with_intel_runtime_pm(&pxp->ctrl_gt->i915->runtime_pm, wakeref) 430 intel_pxp_fini_hw(pxp); 431 } 432 433 int intel_pxp_gsccs_init(struct intel_pxp *pxp) 434 { 435 int ret; 436 intel_wakeref_t wakeref; 437 438 ret = gsccs_allocate_execution_resource(pxp); 439 if (!ret) { 440 with_intel_runtime_pm(&pxp->ctrl_gt->i915->runtime_pm, wakeref) 441 intel_pxp_init_hw(pxp); 442 } 443 return ret; 444 } 445