1 /* 2 * Copyright © 2017 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #ifndef __INTEL_UNCORE_H__ 26 #define __INTEL_UNCORE_H__ 27 28 struct drm_i915_private; 29 30 enum forcewake_domain_id { 31 FW_DOMAIN_ID_RENDER = 0, 32 FW_DOMAIN_ID_BLITTER, 33 FW_DOMAIN_ID_MEDIA, 34 35 FW_DOMAIN_ID_COUNT 36 }; 37 38 enum forcewake_domains { 39 FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER), 40 FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER), 41 FORCEWAKE_MEDIA = BIT(FW_DOMAIN_ID_MEDIA), 42 FORCEWAKE_ALL = (FORCEWAKE_RENDER | 43 FORCEWAKE_BLITTER | 44 FORCEWAKE_MEDIA) 45 }; 46 47 struct intel_uncore_funcs { 48 void (*force_wake_get)(struct drm_i915_private *dev_priv, 49 enum forcewake_domains domains); 50 void (*force_wake_put)(struct drm_i915_private *dev_priv, 51 enum forcewake_domains domains); 52 53 uint8_t (*mmio_readb)(struct drm_i915_private *dev_priv, 54 i915_reg_t r, bool trace); 55 uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv, 56 i915_reg_t r, bool trace); 57 uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv, 58 i915_reg_t r, bool trace); 59 uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv, 60 i915_reg_t r, bool trace); 61 62 void (*mmio_writeb)(struct drm_i915_private *dev_priv, 63 i915_reg_t r, uint8_t val, bool trace); 64 void (*mmio_writew)(struct drm_i915_private *dev_priv, 65 i915_reg_t r, uint16_t val, bool trace); 66 void (*mmio_writel)(struct drm_i915_private *dev_priv, 67 i915_reg_t r, uint32_t val, bool trace); 68 }; 69 70 struct intel_forcewake_range { 71 u32 start; 72 u32 end; 73 74 enum forcewake_domains domains; 75 }; 76 77 struct intel_uncore { 78 spinlock_t lock; /** lock is also taken in irq contexts. */ 79 80 const struct intel_forcewake_range *fw_domains_table; 81 unsigned int fw_domains_table_entries; 82 83 struct notifier_block pmic_bus_access_nb; 84 struct intel_uncore_funcs funcs; 85 86 unsigned int fifo_count; 87 88 enum forcewake_domains fw_domains; 89 enum forcewake_domains fw_domains_active; 90 91 u32 fw_set; 92 u32 fw_clear; 93 u32 fw_reset; 94 95 struct intel_uncore_forcewake_domain { 96 enum forcewake_domain_id id; 97 enum forcewake_domains mask; 98 unsigned int wake_count; 99 bool active; 100 struct hrtimer timer; 101 i915_reg_t reg_set; 102 i915_reg_t reg_ack; 103 } fw_domain[FW_DOMAIN_ID_COUNT]; 104 105 int unclaimed_mmio_check; 106 }; 107 108 /* Iterate over initialised fw domains */ 109 #define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \ 110 for (tmp__ = (mask__); \ 111 tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;) 112 113 #define for_each_fw_domain(domain__, dev_priv__, tmp__) \ 114 for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__) 115 116 117 void intel_uncore_sanitize(struct drm_i915_private *dev_priv); 118 void intel_uncore_init(struct drm_i915_private *dev_priv); 119 bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv); 120 bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv); 121 void intel_uncore_fini(struct drm_i915_private *dev_priv); 122 void intel_uncore_suspend(struct drm_i915_private *dev_priv); 123 void intel_uncore_resume_early(struct drm_i915_private *dev_priv); 124 125 u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv); 126 void assert_forcewakes_inactive(struct drm_i915_private *dev_priv); 127 const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id); 128 129 enum forcewake_domains 130 intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv, 131 i915_reg_t reg, unsigned int op); 132 #define FW_REG_READ (1) 133 #define FW_REG_WRITE (2) 134 135 void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv, 136 enum forcewake_domains domains); 137 void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv, 138 enum forcewake_domains domains); 139 /* Like above but the caller must manage the uncore.lock itself. 140 * Must be used with I915_READ_FW and friends. 141 */ 142 void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv, 143 enum forcewake_domains domains); 144 void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv, 145 enum forcewake_domains domains); 146 147 int intel_wait_for_register(struct drm_i915_private *dev_priv, 148 i915_reg_t reg, 149 u32 mask, 150 u32 value, 151 unsigned int timeout_ms); 152 int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv, 153 i915_reg_t reg, 154 u32 mask, 155 u32 value, 156 unsigned int fast_timeout_us, 157 unsigned int slow_timeout_ms, 158 u32 *out_value); 159 static inline 160 int intel_wait_for_register_fw(struct drm_i915_private *dev_priv, 161 i915_reg_t reg, 162 u32 mask, 163 u32 value, 164 unsigned int timeout_ms) 165 { 166 return __intel_wait_for_register_fw(dev_priv, reg, mask, value, 167 2, timeout_ms, NULL); 168 } 169 170 #endif /* !__INTEL_UNCORE_H__ */ 171