1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020,2021 Intel Corporation 4 */ 5 6 #include "i915_drv.h" 7 #include "intel_step.h" 8 9 /* 10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display 11 * steppings. E.g., in some cases a higher PCI revision may translate to a 12 * lower stepping of the GT and/or display IP. This file provides lookup 13 * tables to map the PCI revision into a standard set of stepping values that 14 * can be compared numerically. 15 * 16 * Also note that some revisions/steppings may have been set aside as 17 * placeholders but never materialized in real hardware; in those cases there 18 * may be jumps in the revision IDs or stepping values in the tables below. 19 */ 20 21 /* 22 * Some platforms always have the same stepping value for GT and display; 23 * use a macro to define these to make it easier to identify the platforms 24 * where the two steppings can deviate. 25 */ 26 #define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x 27 #define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x 28 29 static const struct intel_step_info skl_revids[] = { 30 [0x6] = { COMMON_STEP(G0) }, 31 [0x7] = { COMMON_STEP(H0) }, 32 [0x9] = { COMMON_STEP(J0) }, 33 [0xA] = { COMMON_STEP(I1) }, 34 }; 35 36 static const struct intel_step_info kbl_revids[] = { 37 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 38 [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 39 [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 }, 40 [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 }, 41 [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 }, 42 [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 }, 43 [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 }, 44 }; 45 46 static const struct intel_step_info bxt_revids[] = { 47 [0xA] = { COMMON_STEP(C0) }, 48 [0xB] = { COMMON_STEP(C0) }, 49 [0xC] = { COMMON_STEP(D0) }, 50 [0xD] = { COMMON_STEP(E0) }, 51 }; 52 53 static const struct intel_step_info glk_revids[] = { 54 [3] = { COMMON_STEP(B0) }, 55 }; 56 57 static const struct intel_step_info icl_revids[] = { 58 [7] = { COMMON_STEP(D0) }, 59 }; 60 61 static const struct intel_step_info jsl_ehl_revids[] = { 62 [0] = { COMMON_STEP(A0) }, 63 [1] = { COMMON_STEP(B0) }, 64 }; 65 66 static const struct intel_step_info tgl_uy_revids[] = { 67 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 68 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 69 [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 70 [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 71 }; 72 73 /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */ 74 static const struct intel_step_info tgl_revids[] = { 75 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 76 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 }, 77 }; 78 79 static const struct intel_step_info rkl_revids[] = { 80 [0] = { COMMON_STEP(A0) }, 81 [1] = { COMMON_STEP(B0) }, 82 [4] = { COMMON_STEP(C0) }, 83 }; 84 85 static const struct intel_step_info dg1_revids[] = { 86 [0] = { COMMON_STEP(A0) }, 87 [1] = { COMMON_STEP(B0) }, 88 }; 89 90 static const struct intel_step_info adls_revids[] = { 91 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 92 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 }, 93 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 94 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 95 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, 96 }; 97 98 static const struct intel_step_info adlp_revids[] = { 99 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 100 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 101 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 102 [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 103 }; 104 105 static const struct intel_step_info xehpsdv_revids[] = { 106 [0x0] = { COMMON_GT_MEDIA_STEP(A0) }, 107 [0x1] = { COMMON_GT_MEDIA_STEP(A1) }, 108 [0x4] = { COMMON_GT_MEDIA_STEP(B0) }, 109 [0x8] = { COMMON_GT_MEDIA_STEP(C0) }, 110 }; 111 112 static const struct intel_step_info dg2_g10_revid_step_tbl[] = { 113 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 114 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 }, 115 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 116 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 117 }; 118 119 static const struct intel_step_info dg2_g11_revid_step_tbl[] = { 120 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 121 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 122 [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 123 }; 124 125 static const struct intel_step_info dg2_g12_revid_step_tbl[] = { 126 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_C0 }, 127 }; 128 129 static const struct intel_step_info adls_rpls_revids[] = { 130 [0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 }, 131 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, 132 }; 133 134 static const struct intel_step_info adlp_rplp_revids[] = { 135 [0x4] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_E0 }, 136 }; 137 138 static const struct intel_step_info adlp_n_revids[] = { 139 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_D0 }, 140 }; 141 142 static u8 gmd_to_intel_step(struct drm_i915_private *i915, 143 struct intel_ip_version *gmd) 144 { 145 u8 step = gmd->step + STEP_A0; 146 147 if (step >= STEP_FUTURE) { 148 drm_dbg(&i915->drm, "Using future steppings\n"); 149 return STEP_FUTURE; 150 } 151 152 return step; 153 } 154 155 static void pvc_step_init(struct drm_i915_private *i915, int pci_revid); 156 157 void intel_step_init(struct drm_i915_private *i915) 158 { 159 const struct intel_step_info *revids = NULL; 160 int size = 0; 161 int revid = INTEL_REVID(i915); 162 struct intel_step_info step = {}; 163 164 if (HAS_GMD_ID(i915)) { 165 step.graphics_step = gmd_to_intel_step(i915, 166 &RUNTIME_INFO(i915)->graphics.ip); 167 step.media_step = gmd_to_intel_step(i915, 168 &RUNTIME_INFO(i915)->media.ip); 169 step.display_step = STEP_A0 + DISPLAY_RUNTIME_INFO(i915)->ip.step; 170 if (step.display_step >= STEP_FUTURE) { 171 drm_dbg(&i915->drm, "Using future display steppings\n"); 172 step.display_step = STEP_FUTURE; 173 } 174 175 RUNTIME_INFO(i915)->step = step; 176 177 return; 178 } 179 180 if (IS_PONTEVECCHIO(i915)) { 181 pvc_step_init(i915, revid); 182 return; 183 } else if (IS_DG2_G10(i915)) { 184 revids = dg2_g10_revid_step_tbl; 185 size = ARRAY_SIZE(dg2_g10_revid_step_tbl); 186 } else if (IS_DG2_G11(i915)) { 187 revids = dg2_g11_revid_step_tbl; 188 size = ARRAY_SIZE(dg2_g11_revid_step_tbl); 189 } else if (IS_DG2_G12(i915)) { 190 revids = dg2_g12_revid_step_tbl; 191 size = ARRAY_SIZE(dg2_g12_revid_step_tbl); 192 } else if (IS_XEHPSDV(i915)) { 193 revids = xehpsdv_revids; 194 size = ARRAY_SIZE(xehpsdv_revids); 195 } else if (IS_ALDERLAKE_P_N(i915)) { 196 revids = adlp_n_revids; 197 size = ARRAY_SIZE(adlp_n_revids); 198 } else if (IS_RAPTORLAKE_P(i915)) { 199 revids = adlp_rplp_revids; 200 size = ARRAY_SIZE(adlp_rplp_revids); 201 } else if (IS_ALDERLAKE_P(i915)) { 202 revids = adlp_revids; 203 size = ARRAY_SIZE(adlp_revids); 204 } else if (IS_RAPTORLAKE_S(i915)) { 205 revids = adls_rpls_revids; 206 size = ARRAY_SIZE(adls_rpls_revids); 207 } else if (IS_ALDERLAKE_S(i915)) { 208 revids = adls_revids; 209 size = ARRAY_SIZE(adls_revids); 210 } else if (IS_DG1(i915)) { 211 revids = dg1_revids; 212 size = ARRAY_SIZE(dg1_revids); 213 } else if (IS_ROCKETLAKE(i915)) { 214 revids = rkl_revids; 215 size = ARRAY_SIZE(rkl_revids); 216 } else if (IS_TIGERLAKE_UY(i915)) { 217 revids = tgl_uy_revids; 218 size = ARRAY_SIZE(tgl_uy_revids); 219 } else if (IS_TIGERLAKE(i915)) { 220 revids = tgl_revids; 221 size = ARRAY_SIZE(tgl_revids); 222 } else if (IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) { 223 revids = jsl_ehl_revids; 224 size = ARRAY_SIZE(jsl_ehl_revids); 225 } else if (IS_ICELAKE(i915)) { 226 revids = icl_revids; 227 size = ARRAY_SIZE(icl_revids); 228 } else if (IS_GEMINILAKE(i915)) { 229 revids = glk_revids; 230 size = ARRAY_SIZE(glk_revids); 231 } else if (IS_BROXTON(i915)) { 232 revids = bxt_revids; 233 size = ARRAY_SIZE(bxt_revids); 234 } else if (IS_KABYLAKE(i915)) { 235 revids = kbl_revids; 236 size = ARRAY_SIZE(kbl_revids); 237 } else if (IS_SKYLAKE(i915)) { 238 revids = skl_revids; 239 size = ARRAY_SIZE(skl_revids); 240 } 241 242 /* Not using the stepping scheme for the platform yet. */ 243 if (!revids) 244 return; 245 246 if (revid < size && revids[revid].graphics_step != STEP_NONE) { 247 step = revids[revid]; 248 } else { 249 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid); 250 251 /* 252 * If we hit a gap in the revid array, use the information for 253 * the next revid. 254 * 255 * This may be wrong in all sorts of ways, especially if the 256 * steppings in the array are not monotonically increasing, but 257 * it's better than defaulting to 0. 258 */ 259 while (revid < size && revids[revid].graphics_step == STEP_NONE) 260 revid++; 261 262 if (revid < size) { 263 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n", 264 revid); 265 step = revids[revid]; 266 } else { 267 drm_dbg(&i915->drm, "Using future steppings\n"); 268 step.graphics_step = STEP_FUTURE; 269 step.display_step = STEP_FUTURE; 270 } 271 } 272 273 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE)) 274 return; 275 276 RUNTIME_INFO(i915)->step = step; 277 } 278 279 #define PVC_BD_REVID GENMASK(5, 3) 280 #define PVC_CT_REVID GENMASK(2, 0) 281 282 static const int pvc_bd_subids[] = { 283 [0x0] = STEP_A0, 284 [0x3] = STEP_B0, 285 [0x4] = STEP_B1, 286 [0x5] = STEP_B3, 287 }; 288 289 static const int pvc_ct_subids[] = { 290 [0x3] = STEP_A0, 291 [0x5] = STEP_B0, 292 [0x6] = STEP_B1, 293 [0x7] = STEP_C0, 294 }; 295 296 static int 297 pvc_step_lookup(struct drm_i915_private *i915, const char *type, 298 const int *table, int size, int subid) 299 { 300 if (subid < size && table[subid] != STEP_NONE) 301 return table[subid]; 302 303 drm_warn(&i915->drm, "Unknown %s id 0x%02x\n", type, subid); 304 305 /* 306 * As on other platforms, try to use the next higher ID if we land on a 307 * gap in the table. 308 */ 309 while (subid < size && table[subid] == STEP_NONE) 310 subid++; 311 312 if (subid < size) { 313 drm_dbg(&i915->drm, "Using steppings for %s id 0x%02x\n", 314 type, subid); 315 return table[subid]; 316 } 317 318 drm_dbg(&i915->drm, "Using future steppings\n"); 319 return STEP_FUTURE; 320 } 321 322 /* 323 * PVC needs special handling since we don't lookup the 324 * revid in a table, but rather specific bitfields within 325 * the revid for various components. 326 */ 327 static void pvc_step_init(struct drm_i915_private *i915, int pci_revid) 328 { 329 int ct_subid, bd_subid; 330 331 bd_subid = FIELD_GET(PVC_BD_REVID, pci_revid); 332 ct_subid = FIELD_GET(PVC_CT_REVID, pci_revid); 333 334 RUNTIME_INFO(i915)->step.basedie_step = 335 pvc_step_lookup(i915, "Base Die", pvc_bd_subids, 336 ARRAY_SIZE(pvc_bd_subids), bd_subid); 337 RUNTIME_INFO(i915)->step.graphics_step = 338 pvc_step_lookup(i915, "Compute Tile", pvc_ct_subids, 339 ARRAY_SIZE(pvc_ct_subids), ct_subid); 340 } 341 342 #define STEP_NAME_CASE(name) \ 343 case STEP_##name: \ 344 return #name; 345 346 const char *intel_step_name(enum intel_step step) 347 { 348 switch (step) { 349 STEP_NAME_LIST(STEP_NAME_CASE); 350 351 default: 352 return "**"; 353 } 354 } 355