1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020,2021 Intel Corporation 4 */ 5 6 #include "i915_drv.h" 7 #include "intel_step.h" 8 9 /* 10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display 11 * steppings. E.g., in some cases a higher PCI revision may translate to a 12 * lower stepping of the GT and/or display IP. This file provides lookup 13 * tables to map the PCI revision into a standard set of stepping values that 14 * can be compared numerically. 15 * 16 * Also note that some revisions/steppings may have been set aside as 17 * placeholders but never materialized in real hardware; in those cases there 18 * may be jumps in the revision IDs or stepping values in the tables below. 19 */ 20 21 /* 22 * Some platforms always have the same stepping value for GT and display; 23 * use a macro to define these to make it easier to identify the platforms 24 * where the two steppings can deviate. 25 */ 26 #define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x 27 #define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x 28 29 static const struct intel_step_info skl_revids[] = { 30 [0x6] = { COMMON_STEP(G0) }, 31 [0x7] = { COMMON_STEP(H0) }, 32 [0x9] = { COMMON_STEP(J0) }, 33 [0xA] = { COMMON_STEP(I1) }, 34 }; 35 36 static const struct intel_step_info kbl_revids[] = { 37 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 38 [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 39 [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 }, 40 [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 }, 41 [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 }, 42 [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 }, 43 [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 }, 44 }; 45 46 static const struct intel_step_info bxt_revids[] = { 47 [0xA] = { COMMON_STEP(C0) }, 48 [0xB] = { COMMON_STEP(C0) }, 49 [0xC] = { COMMON_STEP(D0) }, 50 [0xD] = { COMMON_STEP(E0) }, 51 }; 52 53 static const struct intel_step_info glk_revids[] = { 54 [3] = { COMMON_STEP(B0) }, 55 }; 56 57 static const struct intel_step_info icl_revids[] = { 58 [7] = { COMMON_STEP(D0) }, 59 }; 60 61 static const struct intel_step_info jsl_ehl_revids[] = { 62 [0] = { COMMON_STEP(A0) }, 63 [1] = { COMMON_STEP(B0) }, 64 }; 65 66 static const struct intel_step_info tgl_uy_revids[] = { 67 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 68 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 69 [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 70 [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 71 }; 72 73 /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */ 74 static const struct intel_step_info tgl_revids[] = { 75 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 76 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 }, 77 }; 78 79 static const struct intel_step_info rkl_revids[] = { 80 [0] = { COMMON_STEP(A0) }, 81 [1] = { COMMON_STEP(B0) }, 82 [4] = { COMMON_STEP(C0) }, 83 }; 84 85 static const struct intel_step_info dg1_revids[] = { 86 [0] = { COMMON_STEP(A0) }, 87 [1] = { COMMON_STEP(B0) }, 88 }; 89 90 static const struct intel_step_info adls_revids[] = { 91 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 92 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 }, 93 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 94 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 95 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, 96 }; 97 98 static const struct intel_step_info adlp_revids[] = { 99 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 100 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 101 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 102 [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 103 }; 104 105 static const struct intel_step_info xehpsdv_revids[] = { 106 [0x0] = { COMMON_GT_MEDIA_STEP(A0) }, 107 [0x1] = { COMMON_GT_MEDIA_STEP(A1) }, 108 [0x4] = { COMMON_GT_MEDIA_STEP(B0) }, 109 [0x8] = { COMMON_GT_MEDIA_STEP(C0) }, 110 }; 111 112 static const struct intel_step_info dg2_g10_revid_step_tbl[] = { 113 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 114 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 }, 115 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 116 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 117 }; 118 119 static const struct intel_step_info dg2_g11_revid_step_tbl[] = { 120 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 121 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 122 [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 123 }; 124 125 void intel_step_init(struct drm_i915_private *i915) 126 { 127 const struct intel_step_info *revids = NULL; 128 int size = 0; 129 int revid = INTEL_REVID(i915); 130 struct intel_step_info step = {}; 131 132 if (IS_DG2_G10(i915)) { 133 revids = dg2_g10_revid_step_tbl; 134 size = ARRAY_SIZE(dg2_g10_revid_step_tbl); 135 } else if (IS_DG2_G11(i915)) { 136 revids = dg2_g11_revid_step_tbl; 137 size = ARRAY_SIZE(dg2_g11_revid_step_tbl); 138 } else if (IS_XEHPSDV(i915)) { 139 revids = xehpsdv_revids; 140 size = ARRAY_SIZE(xehpsdv_revids); 141 } else if (IS_ALDERLAKE_P(i915)) { 142 revids = adlp_revids; 143 size = ARRAY_SIZE(adlp_revids); 144 } else if (IS_ALDERLAKE_S(i915)) { 145 revids = adls_revids; 146 size = ARRAY_SIZE(adls_revids); 147 } else if (IS_DG1(i915)) { 148 revids = dg1_revids; 149 size = ARRAY_SIZE(dg1_revids); 150 } else if (IS_ROCKETLAKE(i915)) { 151 revids = rkl_revids; 152 size = ARRAY_SIZE(rkl_revids); 153 } else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) { 154 revids = tgl_uy_revids; 155 size = ARRAY_SIZE(tgl_uy_revids); 156 } else if (IS_TIGERLAKE(i915)) { 157 revids = tgl_revids; 158 size = ARRAY_SIZE(tgl_revids); 159 } else if (IS_JSL_EHL(i915)) { 160 revids = jsl_ehl_revids; 161 size = ARRAY_SIZE(jsl_ehl_revids); 162 } else if (IS_ICELAKE(i915)) { 163 revids = icl_revids; 164 size = ARRAY_SIZE(icl_revids); 165 } else if (IS_GEMINILAKE(i915)) { 166 revids = glk_revids; 167 size = ARRAY_SIZE(glk_revids); 168 } else if (IS_BROXTON(i915)) { 169 revids = bxt_revids; 170 size = ARRAY_SIZE(bxt_revids); 171 } else if (IS_KABYLAKE(i915)) { 172 revids = kbl_revids; 173 size = ARRAY_SIZE(kbl_revids); 174 } else if (IS_SKYLAKE(i915)) { 175 revids = skl_revids; 176 size = ARRAY_SIZE(skl_revids); 177 } 178 179 /* Not using the stepping scheme for the platform yet. */ 180 if (!revids) 181 return; 182 183 if (revid < size && revids[revid].graphics_step != STEP_NONE) { 184 step = revids[revid]; 185 } else { 186 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid); 187 188 /* 189 * If we hit a gap in the revid array, use the information for 190 * the next revid. 191 * 192 * This may be wrong in all sorts of ways, especially if the 193 * steppings in the array are not monotonically increasing, but 194 * it's better than defaulting to 0. 195 */ 196 while (revid < size && revids[revid].graphics_step == STEP_NONE) 197 revid++; 198 199 if (revid < size) { 200 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n", 201 revid); 202 step = revids[revid]; 203 } else { 204 drm_dbg(&i915->drm, "Using future steppings\n"); 205 step.graphics_step = STEP_FUTURE; 206 step.display_step = STEP_FUTURE; 207 } 208 } 209 210 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE)) 211 return; 212 213 RUNTIME_INFO(i915)->step = step; 214 } 215 216 #define STEP_NAME_CASE(name) \ 217 case STEP_##name: \ 218 return #name; 219 220 const char *intel_step_name(enum intel_step step) 221 { 222 switch (step) { 223 STEP_NAME_LIST(STEP_NAME_CASE); 224 225 default: 226 return "**"; 227 } 228 } 229