1 /* 2 * Copyright © 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #ifndef __I915_VMA_H__ 26 #define __I915_VMA_H__ 27 28 #include <linux/io-mapping.h> 29 30 #include <drm/drm_mm.h> 31 32 #include "i915_gem_gtt.h" 33 #include "i915_gem_fence_reg.h" 34 #include "i915_gem_object.h" 35 #include "i915_gem_request.h" 36 37 38 enum i915_cache_level; 39 40 /** 41 * A VMA represents a GEM BO that is bound into an address space. Therefore, a 42 * VMA's presence cannot be guaranteed before binding, or after unbinding the 43 * object into/from the address space. 44 * 45 * To make things as simple as possible (ie. no refcounting), a VMA's lifetime 46 * will always be <= an objects lifetime. So object refcounting should cover us. 47 */ 48 struct i915_vma { 49 struct drm_mm_node node; 50 struct drm_i915_gem_object *obj; 51 struct i915_address_space *vm; 52 struct drm_i915_fence_reg *fence; 53 struct sg_table *pages; 54 void __iomem *iomap; 55 u64 size; 56 u64 display_alignment; 57 58 u32 fence_size; 59 u32 fence_alignment; 60 61 unsigned int flags; 62 /** 63 * How many users have pinned this object in GTT space. The following 64 * users can each hold at most one reference: pwrite/pread, execbuffer 65 * (objects are not allowed multiple times for the same batchbuffer), 66 * and the framebuffer code. When switching/pageflipping, the 67 * framebuffer code has at most two buffers pinned per crtc. 68 * 69 * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3 70 * bits with absolutely no headroom. So use 4 bits. 71 */ 72 #define I915_VMA_PIN_MASK 0xf 73 #define I915_VMA_PIN_OVERFLOW BIT(5) 74 75 /** Flags and address space this VMA is bound to */ 76 #define I915_VMA_GLOBAL_BIND BIT(6) 77 #define I915_VMA_LOCAL_BIND BIT(7) 78 #define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND | I915_VMA_PIN_OVERFLOW) 79 80 #define I915_VMA_GGTT BIT(8) 81 #define I915_VMA_CAN_FENCE BIT(9) 82 #define I915_VMA_CLOSED BIT(10) 83 84 unsigned int active; 85 struct i915_gem_active last_read[I915_NUM_ENGINES]; 86 struct i915_gem_active last_fence; 87 88 /** 89 * Support different GGTT views into the same object. 90 * This means there can be multiple VMA mappings per object and per VM. 91 * i915_ggtt_view_type is used to distinguish between those entries. 92 * The default one of zero (I915_GGTT_VIEW_NORMAL) is default and also 93 * assumed in GEM functions which take no ggtt view parameter. 94 */ 95 struct i915_ggtt_view ggtt_view; 96 97 /** This object's place on the active/inactive lists */ 98 struct list_head vm_link; 99 100 struct list_head obj_link; /* Link in the object's VMA list */ 101 struct rb_node obj_node; 102 103 /** This vma's place in the batchbuffer or on the eviction list */ 104 struct list_head exec_list; 105 106 /** 107 * Used for performing relocations during execbuffer insertion. 108 */ 109 struct hlist_node exec_node; 110 unsigned long exec_handle; 111 struct drm_i915_gem_exec_object2 *exec_entry; 112 }; 113 114 struct i915_vma * 115 i915_vma_instance(struct drm_i915_gem_object *obj, 116 struct i915_address_space *vm, 117 const struct i915_ggtt_view *view); 118 119 void i915_vma_unpin_and_release(struct i915_vma **p_vma); 120 121 static inline bool i915_vma_is_ggtt(const struct i915_vma *vma) 122 { 123 return vma->flags & I915_VMA_GGTT; 124 } 125 126 static inline bool i915_vma_is_map_and_fenceable(const struct i915_vma *vma) 127 { 128 return vma->flags & I915_VMA_CAN_FENCE; 129 } 130 131 static inline bool i915_vma_is_closed(const struct i915_vma *vma) 132 { 133 return vma->flags & I915_VMA_CLOSED; 134 } 135 136 static inline unsigned int i915_vma_get_active(const struct i915_vma *vma) 137 { 138 return vma->active; 139 } 140 141 static inline bool i915_vma_is_active(const struct i915_vma *vma) 142 { 143 return i915_vma_get_active(vma); 144 } 145 146 static inline void i915_vma_set_active(struct i915_vma *vma, 147 unsigned int engine) 148 { 149 vma->active |= BIT(engine); 150 } 151 152 static inline void i915_vma_clear_active(struct i915_vma *vma, 153 unsigned int engine) 154 { 155 vma->active &= ~BIT(engine); 156 } 157 158 static inline bool i915_vma_has_active_engine(const struct i915_vma *vma, 159 unsigned int engine) 160 { 161 return vma->active & BIT(engine); 162 } 163 164 static inline u32 i915_ggtt_offset(const struct i915_vma *vma) 165 { 166 GEM_BUG_ON(!i915_vma_is_ggtt(vma)); 167 GEM_BUG_ON(!vma->node.allocated); 168 GEM_BUG_ON(upper_32_bits(vma->node.start)); 169 GEM_BUG_ON(upper_32_bits(vma->node.start + vma->node.size - 1)); 170 return lower_32_bits(vma->node.start); 171 } 172 173 static inline struct i915_vma *i915_vma_get(struct i915_vma *vma) 174 { 175 i915_gem_object_get(vma->obj); 176 return vma; 177 } 178 179 static inline void i915_vma_put(struct i915_vma *vma) 180 { 181 i915_gem_object_put(vma->obj); 182 } 183 184 static __always_inline ptrdiff_t ptrdiff(const void *a, const void *b) 185 { 186 return a - b; 187 } 188 189 static inline long 190 i915_vma_compare(struct i915_vma *vma, 191 struct i915_address_space *vm, 192 const struct i915_ggtt_view *view) 193 { 194 ptrdiff_t cmp; 195 196 GEM_BUG_ON(view && !i915_is_ggtt(vm)); 197 198 cmp = ptrdiff(vma->vm, vm); 199 if (cmp) 200 return cmp; 201 202 BUILD_BUG_ON(I915_GGTT_VIEW_NORMAL != 0); 203 cmp = vma->ggtt_view.type; 204 if (!view) 205 return cmp; 206 207 cmp -= view->type; 208 if (cmp) 209 return cmp; 210 211 /* ggtt_view.type also encodes its size so that we both distinguish 212 * different views using it as a "type" and also use a compact (no 213 * accessing of uninitialised padding bytes) memcmp without storing 214 * an extra parameter or adding more code. 215 * 216 * To ensure that the memcmp is valid for all branches of the union, 217 * even though the code looks like it is just comparing one branch, 218 * we assert above that all branches have the same address, and that 219 * each branch has a unique type/size. 220 */ 221 BUILD_BUG_ON(I915_GGTT_VIEW_NORMAL >= I915_GGTT_VIEW_PARTIAL); 222 BUILD_BUG_ON(I915_GGTT_VIEW_PARTIAL >= I915_GGTT_VIEW_ROTATED); 223 BUILD_BUG_ON(offsetof(typeof(*view), rotated) != 224 offsetof(typeof(*view), partial)); 225 return memcmp(&vma->ggtt_view.partial, &view->partial, view->type); 226 } 227 228 int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level, 229 u32 flags); 230 bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long cache_level); 231 bool 232 i915_vma_misplaced(struct i915_vma *vma, u64 size, u64 alignment, u64 flags); 233 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma); 234 int __must_check i915_vma_unbind(struct i915_vma *vma); 235 void i915_vma_close(struct i915_vma *vma); 236 void i915_vma_destroy(struct i915_vma *vma); 237 238 int __i915_vma_do_pin(struct i915_vma *vma, 239 u64 size, u64 alignment, u64 flags); 240 static inline int __must_check 241 i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags) 242 { 243 BUILD_BUG_ON(PIN_MBZ != I915_VMA_PIN_OVERFLOW); 244 BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND); 245 BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND); 246 247 /* Pin early to prevent the shrinker/eviction logic from destroying 248 * our vma as we insert and bind. 249 */ 250 if (likely(((++vma->flags ^ flags) & I915_VMA_BIND_MASK) == 0)) { 251 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 252 GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags)); 253 return 0; 254 } 255 256 return __i915_vma_do_pin(vma, size, alignment, flags); 257 } 258 259 static inline int i915_vma_pin_count(const struct i915_vma *vma) 260 { 261 return vma->flags & I915_VMA_PIN_MASK; 262 } 263 264 static inline bool i915_vma_is_pinned(const struct i915_vma *vma) 265 { 266 return i915_vma_pin_count(vma); 267 } 268 269 static inline void __i915_vma_pin(struct i915_vma *vma) 270 { 271 vma->flags++; 272 GEM_BUG_ON(vma->flags & I915_VMA_PIN_OVERFLOW); 273 } 274 275 static inline void __i915_vma_unpin(struct i915_vma *vma) 276 { 277 GEM_BUG_ON(!i915_vma_is_pinned(vma)); 278 vma->flags--; 279 } 280 281 static inline void i915_vma_unpin(struct i915_vma *vma) 282 { 283 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 284 __i915_vma_unpin(vma); 285 } 286 287 /** 288 * i915_vma_pin_iomap - calls ioremap_wc to map the GGTT VMA via the aperture 289 * @vma: VMA to iomap 290 * 291 * The passed in VMA has to be pinned in the global GTT mappable region. 292 * An extra pinning of the VMA is acquired for the return iomapping, 293 * the caller must call i915_vma_unpin_iomap to relinquish the pinning 294 * after the iomapping is no longer required. 295 * 296 * Callers must hold the struct_mutex. 297 * 298 * Returns a valid iomapped pointer or ERR_PTR. 299 */ 300 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma); 301 #define IO_ERR_PTR(x) ((void __iomem *)ERR_PTR(x)) 302 303 /** 304 * i915_vma_unpin_iomap - unpins the mapping returned from i915_vma_iomap 305 * @vma: VMA to unpin 306 * 307 * Unpins the previously iomapped VMA from i915_vma_pin_iomap(). 308 * 309 * Callers must hold the struct_mutex. This function is only valid to be 310 * called on a VMA previously iomapped by the caller with i915_vma_pin_iomap(). 311 */ 312 static inline void i915_vma_unpin_iomap(struct i915_vma *vma) 313 { 314 lockdep_assert_held(&vma->obj->base.dev->struct_mutex); 315 GEM_BUG_ON(vma->iomap == NULL); 316 i915_vma_unpin(vma); 317 } 318 319 static inline struct page *i915_vma_first_page(struct i915_vma *vma) 320 { 321 GEM_BUG_ON(!vma->pages); 322 return sg_page(vma->pages->sgl); 323 } 324 325 /** 326 * i915_vma_pin_fence - pin fencing state 327 * @vma: vma to pin fencing for 328 * 329 * This pins the fencing state (whether tiled or untiled) to make sure the 330 * vma (and its object) is ready to be used as a scanout target. Fencing 331 * status must be synchronize first by calling i915_vma_get_fence(): 332 * 333 * The resulting fence pin reference must be released again with 334 * i915_vma_unpin_fence(). 335 * 336 * Returns: 337 * 338 * True if the vma has a fence, false otherwise. 339 */ 340 static inline bool 341 i915_vma_pin_fence(struct i915_vma *vma) 342 { 343 lockdep_assert_held(&vma->obj->base.dev->struct_mutex); 344 if (vma->fence) { 345 vma->fence->pin_count++; 346 return true; 347 } else 348 return false; 349 } 350 351 /** 352 * i915_vma_unpin_fence - unpin fencing state 353 * @vma: vma to unpin fencing for 354 * 355 * This releases the fence pin reference acquired through 356 * i915_vma_pin_fence. It will handle both objects with and without an 357 * attached fence correctly, callers do not need to distinguish this. 358 */ 359 static inline void 360 i915_vma_unpin_fence(struct i915_vma *vma) 361 { 362 lockdep_assert_held(&vma->obj->base.dev->struct_mutex); 363 if (vma->fence) { 364 GEM_BUG_ON(vma->fence->pin_count <= 0); 365 vma->fence->pin_count--; 366 } 367 } 368 369 #endif 370 371