xref: /openbmc/linux/drivers/gpu/drm/i915/i915_vma.c (revision c3b14760)
1 /*
2  * Copyright © 2016 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  */
24 
25 #include <linux/sched/mm.h>
26 #include <drm/drm_gem.h>
27 
28 #include "display/intel_frontbuffer.h"
29 
30 #include "gem/i915_gem_lmem.h"
31 #include "gt/intel_engine.h"
32 #include "gt/intel_engine_heartbeat.h"
33 #include "gt/intel_gt.h"
34 #include "gt/intel_gt_requests.h"
35 
36 #include "i915_drv.h"
37 #include "i915_globals.h"
38 #include "i915_sw_fence_work.h"
39 #include "i915_trace.h"
40 #include "i915_vma.h"
41 
42 static struct i915_global_vma {
43 	struct i915_global base;
44 	struct kmem_cache *slab_vmas;
45 } global;
46 
47 struct i915_vma *i915_vma_alloc(void)
48 {
49 	return kmem_cache_zalloc(global.slab_vmas, GFP_KERNEL);
50 }
51 
52 void i915_vma_free(struct i915_vma *vma)
53 {
54 	return kmem_cache_free(global.slab_vmas, vma);
55 }
56 
57 #if IS_ENABLED(CONFIG_DRM_I915_ERRLOG_GEM) && IS_ENABLED(CONFIG_DRM_DEBUG_MM)
58 
59 #include <linux/stackdepot.h>
60 
61 static void vma_print_allocator(struct i915_vma *vma, const char *reason)
62 {
63 	unsigned long *entries;
64 	unsigned int nr_entries;
65 	char buf[512];
66 
67 	if (!vma->node.stack) {
68 		DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
69 				 vma->node.start, vma->node.size, reason);
70 		return;
71 	}
72 
73 	nr_entries = stack_depot_fetch(vma->node.stack, &entries);
74 	stack_trace_snprint(buf, sizeof(buf), entries, nr_entries, 0);
75 	DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
76 			 vma->node.start, vma->node.size, reason, buf);
77 }
78 
79 #else
80 
81 static void vma_print_allocator(struct i915_vma *vma, const char *reason)
82 {
83 }
84 
85 #endif
86 
87 static inline struct i915_vma *active_to_vma(struct i915_active *ref)
88 {
89 	return container_of(ref, typeof(struct i915_vma), active);
90 }
91 
92 static int __i915_vma_active(struct i915_active *ref)
93 {
94 	return i915_vma_tryget(active_to_vma(ref)) ? 0 : -ENOENT;
95 }
96 
97 static void __i915_vma_retire(struct i915_active *ref)
98 {
99 	i915_vma_put(active_to_vma(ref));
100 }
101 
102 static struct i915_vma *
103 vma_create(struct drm_i915_gem_object *obj,
104 	   struct i915_address_space *vm,
105 	   const struct i915_ggtt_view *view)
106 {
107 	struct i915_vma *pos = ERR_PTR(-E2BIG);
108 	struct i915_vma *vma;
109 	struct rb_node *rb, **p;
110 
111 	/* The aliasing_ppgtt should never be used directly! */
112 	GEM_BUG_ON(vm == &vm->gt->ggtt->alias->vm);
113 
114 	vma = i915_vma_alloc();
115 	if (vma == NULL)
116 		return ERR_PTR(-ENOMEM);
117 
118 	kref_init(&vma->ref);
119 	mutex_init(&vma->pages_mutex);
120 	vma->vm = i915_vm_get(vm);
121 	vma->ops = &vm->vma_ops;
122 	vma->obj = obj;
123 	vma->resv = obj->base.resv;
124 	vma->size = obj->base.size;
125 	vma->display_alignment = I915_GTT_MIN_ALIGNMENT;
126 
127 	i915_active_init(&vma->active, __i915_vma_active, __i915_vma_retire, 0);
128 
129 	/* Declare ourselves safe for use inside shrinkers */
130 	if (IS_ENABLED(CONFIG_LOCKDEP)) {
131 		fs_reclaim_acquire(GFP_KERNEL);
132 		might_lock(&vma->active.mutex);
133 		fs_reclaim_release(GFP_KERNEL);
134 	}
135 
136 	INIT_LIST_HEAD(&vma->closed_link);
137 
138 	if (view && view->type != I915_GGTT_VIEW_NORMAL) {
139 		vma->ggtt_view = *view;
140 		if (view->type == I915_GGTT_VIEW_PARTIAL) {
141 			GEM_BUG_ON(range_overflows_t(u64,
142 						     view->partial.offset,
143 						     view->partial.size,
144 						     obj->base.size >> PAGE_SHIFT));
145 			vma->size = view->partial.size;
146 			vma->size <<= PAGE_SHIFT;
147 			GEM_BUG_ON(vma->size > obj->base.size);
148 		} else if (view->type == I915_GGTT_VIEW_ROTATED) {
149 			vma->size = intel_rotation_info_size(&view->rotated);
150 			vma->size <<= PAGE_SHIFT;
151 		} else if (view->type == I915_GGTT_VIEW_REMAPPED) {
152 			vma->size = intel_remapped_info_size(&view->remapped);
153 			vma->size <<= PAGE_SHIFT;
154 		}
155 	}
156 
157 	if (unlikely(vma->size > vm->total))
158 		goto err_vma;
159 
160 	GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE));
161 
162 	spin_lock(&obj->vma.lock);
163 
164 	if (i915_is_ggtt(vm)) {
165 		if (unlikely(overflows_type(vma->size, u32)))
166 			goto err_unlock;
167 
168 		vma->fence_size = i915_gem_fence_size(vm->i915, vma->size,
169 						      i915_gem_object_get_tiling(obj),
170 						      i915_gem_object_get_stride(obj));
171 		if (unlikely(vma->fence_size < vma->size || /* overflow */
172 			     vma->fence_size > vm->total))
173 			goto err_unlock;
174 
175 		GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT));
176 
177 		vma->fence_alignment = i915_gem_fence_alignment(vm->i915, vma->size,
178 								i915_gem_object_get_tiling(obj),
179 								i915_gem_object_get_stride(obj));
180 		GEM_BUG_ON(!is_power_of_2(vma->fence_alignment));
181 
182 		__set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma));
183 	}
184 
185 	rb = NULL;
186 	p = &obj->vma.tree.rb_node;
187 	while (*p) {
188 		long cmp;
189 
190 		rb = *p;
191 		pos = rb_entry(rb, struct i915_vma, obj_node);
192 
193 		/*
194 		 * If the view already exists in the tree, another thread
195 		 * already created a matching vma, so return the older instance
196 		 * and dispose of ours.
197 		 */
198 		cmp = i915_vma_compare(pos, vm, view);
199 		if (cmp < 0)
200 			p = &rb->rb_right;
201 		else if (cmp > 0)
202 			p = &rb->rb_left;
203 		else
204 			goto err_unlock;
205 	}
206 	rb_link_node(&vma->obj_node, rb, p);
207 	rb_insert_color(&vma->obj_node, &obj->vma.tree);
208 
209 	if (i915_vma_is_ggtt(vma))
210 		/*
211 		 * We put the GGTT vma at the start of the vma-list, followed
212 		 * by the ppGGTT vma. This allows us to break early when
213 		 * iterating over only the GGTT vma for an object, see
214 		 * for_each_ggtt_vma()
215 		 */
216 		list_add(&vma->obj_link, &obj->vma.list);
217 	else
218 		list_add_tail(&vma->obj_link, &obj->vma.list);
219 
220 	spin_unlock(&obj->vma.lock);
221 
222 	return vma;
223 
224 err_unlock:
225 	spin_unlock(&obj->vma.lock);
226 err_vma:
227 	i915_vm_put(vm);
228 	i915_vma_free(vma);
229 	return pos;
230 }
231 
232 static struct i915_vma *
233 i915_vma_lookup(struct drm_i915_gem_object *obj,
234 	   struct i915_address_space *vm,
235 	   const struct i915_ggtt_view *view)
236 {
237 	struct rb_node *rb;
238 
239 	rb = obj->vma.tree.rb_node;
240 	while (rb) {
241 		struct i915_vma *vma = rb_entry(rb, struct i915_vma, obj_node);
242 		long cmp;
243 
244 		cmp = i915_vma_compare(vma, vm, view);
245 		if (cmp == 0)
246 			return vma;
247 
248 		if (cmp < 0)
249 			rb = rb->rb_right;
250 		else
251 			rb = rb->rb_left;
252 	}
253 
254 	return NULL;
255 }
256 
257 /**
258  * i915_vma_instance - return the singleton instance of the VMA
259  * @obj: parent &struct drm_i915_gem_object to be mapped
260  * @vm: address space in which the mapping is located
261  * @view: additional mapping requirements
262  *
263  * i915_vma_instance() looks up an existing VMA of the @obj in the @vm with
264  * the same @view characteristics. If a match is not found, one is created.
265  * Once created, the VMA is kept until either the object is freed, or the
266  * address space is closed.
267  *
268  * Returns the vma, or an error pointer.
269  */
270 struct i915_vma *
271 i915_vma_instance(struct drm_i915_gem_object *obj,
272 		  struct i915_address_space *vm,
273 		  const struct i915_ggtt_view *view)
274 {
275 	struct i915_vma *vma;
276 
277 	GEM_BUG_ON(view && !i915_is_ggtt(vm));
278 	GEM_BUG_ON(!atomic_read(&vm->open));
279 
280 	spin_lock(&obj->vma.lock);
281 	vma = i915_vma_lookup(obj, vm, view);
282 	spin_unlock(&obj->vma.lock);
283 
284 	/* vma_create() will resolve the race if another creates the vma */
285 	if (unlikely(!vma))
286 		vma = vma_create(obj, vm, view);
287 
288 	GEM_BUG_ON(!IS_ERR(vma) && i915_vma_compare(vma, vm, view));
289 	return vma;
290 }
291 
292 struct i915_vma_work {
293 	struct dma_fence_work base;
294 	struct i915_address_space *vm;
295 	struct i915_vm_pt_stash stash;
296 	struct i915_vma *vma;
297 	struct drm_i915_gem_object *pinned;
298 	struct i915_sw_dma_fence_cb cb;
299 	enum i915_cache_level cache_level;
300 	unsigned int flags;
301 };
302 
303 static int __vma_bind(struct dma_fence_work *work)
304 {
305 	struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
306 	struct i915_vma *vma = vw->vma;
307 
308 	vma->ops->bind_vma(vw->vm, &vw->stash,
309 			   vma, vw->cache_level, vw->flags);
310 	return 0;
311 }
312 
313 static void __vma_release(struct dma_fence_work *work)
314 {
315 	struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
316 
317 	if (vw->pinned) {
318 		__i915_gem_object_unpin_pages(vw->pinned);
319 		i915_gem_object_put(vw->pinned);
320 	}
321 
322 	i915_vm_free_pt_stash(vw->vm, &vw->stash);
323 	i915_vm_put(vw->vm);
324 }
325 
326 static const struct dma_fence_work_ops bind_ops = {
327 	.name = "bind",
328 	.work = __vma_bind,
329 	.release = __vma_release,
330 };
331 
332 struct i915_vma_work *i915_vma_work(void)
333 {
334 	struct i915_vma_work *vw;
335 
336 	vw = kzalloc(sizeof(*vw), GFP_KERNEL);
337 	if (!vw)
338 		return NULL;
339 
340 	dma_fence_work_init(&vw->base, &bind_ops);
341 	vw->base.dma.error = -EAGAIN; /* disable the worker by default */
342 
343 	return vw;
344 }
345 
346 int i915_vma_wait_for_bind(struct i915_vma *vma)
347 {
348 	int err = 0;
349 
350 	if (rcu_access_pointer(vma->active.excl.fence)) {
351 		struct dma_fence *fence;
352 
353 		rcu_read_lock();
354 		fence = dma_fence_get_rcu_safe(&vma->active.excl.fence);
355 		rcu_read_unlock();
356 		if (fence) {
357 			err = dma_fence_wait(fence, MAX_SCHEDULE_TIMEOUT);
358 			dma_fence_put(fence);
359 		}
360 	}
361 
362 	return err;
363 }
364 
365 /**
366  * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address space.
367  * @vma: VMA to map
368  * @cache_level: mapping cache level
369  * @flags: flags like global or local mapping
370  * @work: preallocated worker for allocating and binding the PTE
371  *
372  * DMA addresses are taken from the scatter-gather table of this object (or of
373  * this VMA in case of non-default GGTT views) and PTE entries set up.
374  * Note that DMA addresses are also the only part of the SG table we care about.
375  */
376 int i915_vma_bind(struct i915_vma *vma,
377 		  enum i915_cache_level cache_level,
378 		  u32 flags,
379 		  struct i915_vma_work *work)
380 {
381 	u32 bind_flags;
382 	u32 vma_flags;
383 
384 	GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
385 	GEM_BUG_ON(vma->size > vma->node.size);
386 
387 	if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
388 					      vma->node.size,
389 					      vma->vm->total)))
390 		return -ENODEV;
391 
392 	if (GEM_DEBUG_WARN_ON(!flags))
393 		return -EINVAL;
394 
395 	bind_flags = flags;
396 	bind_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
397 
398 	vma_flags = atomic_read(&vma->flags);
399 	vma_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
400 
401 	bind_flags &= ~vma_flags;
402 	if (bind_flags == 0)
403 		return 0;
404 
405 	GEM_BUG_ON(!vma->pages);
406 
407 	trace_i915_vma_bind(vma, bind_flags);
408 	if (work && bind_flags & vma->vm->bind_async_flags) {
409 		struct dma_fence *prev;
410 
411 		work->vma = vma;
412 		work->cache_level = cache_level;
413 		work->flags = bind_flags;
414 
415 		/*
416 		 * Note we only want to chain up to the migration fence on
417 		 * the pages (not the object itself). As we don't track that,
418 		 * yet, we have to use the exclusive fence instead.
419 		 *
420 		 * Also note that we do not want to track the async vma as
421 		 * part of the obj->resv->excl_fence as it only affects
422 		 * execution and not content or object's backing store lifetime.
423 		 */
424 		prev = i915_active_set_exclusive(&vma->active, &work->base.dma);
425 		if (prev) {
426 			__i915_sw_fence_await_dma_fence(&work->base.chain,
427 							prev,
428 							&work->cb);
429 			dma_fence_put(prev);
430 		}
431 
432 		work->base.dma.error = 0; /* enable the queue_work() */
433 
434 		if (vma->obj) {
435 			__i915_gem_object_pin_pages(vma->obj);
436 			work->pinned = i915_gem_object_get(vma->obj);
437 		}
438 	} else {
439 		vma->ops->bind_vma(vma->vm, NULL, vma, cache_level, bind_flags);
440 	}
441 
442 	atomic_or(bind_flags, &vma->flags);
443 	return 0;
444 }
445 
446 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
447 {
448 	void __iomem *ptr;
449 	int err;
450 
451 	if (!i915_gem_object_is_lmem(vma->obj)) {
452 		if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
453 			err = -ENODEV;
454 			goto err;
455 		}
456 	}
457 
458 	GEM_BUG_ON(!i915_vma_is_ggtt(vma));
459 	GEM_BUG_ON(!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND));
460 
461 	ptr = READ_ONCE(vma->iomap);
462 	if (ptr == NULL) {
463 		/*
464 		 * TODO: consider just using i915_gem_object_pin_map() for lmem
465 		 * instead, which already supports mapping non-contiguous chunks
466 		 * of pages, that way we can also drop the
467 		 * I915_BO_ALLOC_CONTIGUOUS when allocating the object.
468 		 */
469 		if (i915_gem_object_is_lmem(vma->obj))
470 			ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
471 							  vma->obj->base.size);
472 		else
473 			ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
474 						vma->node.start,
475 						vma->node.size);
476 		if (ptr == NULL) {
477 			err = -ENOMEM;
478 			goto err;
479 		}
480 
481 		if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) {
482 			io_mapping_unmap(ptr);
483 			ptr = vma->iomap;
484 		}
485 	}
486 
487 	__i915_vma_pin(vma);
488 
489 	err = i915_vma_pin_fence(vma);
490 	if (err)
491 		goto err_unpin;
492 
493 	i915_vma_set_ggtt_write(vma);
494 
495 	/* NB Access through the GTT requires the device to be awake. */
496 	return ptr;
497 
498 err_unpin:
499 	__i915_vma_unpin(vma);
500 err:
501 	return IO_ERR_PTR(err);
502 }
503 
504 void i915_vma_flush_writes(struct i915_vma *vma)
505 {
506 	if (i915_vma_unset_ggtt_write(vma))
507 		intel_gt_flush_ggtt_writes(vma->vm->gt);
508 }
509 
510 void i915_vma_unpin_iomap(struct i915_vma *vma)
511 {
512 	GEM_BUG_ON(vma->iomap == NULL);
513 
514 	i915_vma_flush_writes(vma);
515 
516 	i915_vma_unpin_fence(vma);
517 	i915_vma_unpin(vma);
518 }
519 
520 void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags)
521 {
522 	struct i915_vma *vma;
523 	struct drm_i915_gem_object *obj;
524 
525 	vma = fetch_and_zero(p_vma);
526 	if (!vma)
527 		return;
528 
529 	obj = vma->obj;
530 	GEM_BUG_ON(!obj);
531 
532 	i915_vma_unpin(vma);
533 
534 	if (flags & I915_VMA_RELEASE_MAP)
535 		i915_gem_object_unpin_map(obj);
536 
537 	i915_gem_object_put(obj);
538 }
539 
540 bool i915_vma_misplaced(const struct i915_vma *vma,
541 			u64 size, u64 alignment, u64 flags)
542 {
543 	if (!drm_mm_node_allocated(&vma->node))
544 		return false;
545 
546 	if (test_bit(I915_VMA_ERROR_BIT, __i915_vma_flags(vma)))
547 		return true;
548 
549 	if (vma->node.size < size)
550 		return true;
551 
552 	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
553 	if (alignment && !IS_ALIGNED(vma->node.start, alignment))
554 		return true;
555 
556 	if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma))
557 		return true;
558 
559 	if (flags & PIN_OFFSET_BIAS &&
560 	    vma->node.start < (flags & PIN_OFFSET_MASK))
561 		return true;
562 
563 	if (flags & PIN_OFFSET_FIXED &&
564 	    vma->node.start != (flags & PIN_OFFSET_MASK))
565 		return true;
566 
567 	return false;
568 }
569 
570 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
571 {
572 	bool mappable, fenceable;
573 
574 	GEM_BUG_ON(!i915_vma_is_ggtt(vma));
575 	GEM_BUG_ON(!vma->fence_size);
576 
577 	fenceable = (vma->node.size >= vma->fence_size &&
578 		     IS_ALIGNED(vma->node.start, vma->fence_alignment));
579 
580 	mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end;
581 
582 	if (mappable && fenceable)
583 		set_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
584 	else
585 		clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
586 }
587 
588 bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long color)
589 {
590 	struct drm_mm_node *node = &vma->node;
591 	struct drm_mm_node *other;
592 
593 	/*
594 	 * On some machines we have to be careful when putting differing types
595 	 * of snoopable memory together to avoid the prefetcher crossing memory
596 	 * domains and dying. During vm initialisation, we decide whether or not
597 	 * these constraints apply and set the drm_mm.color_adjust
598 	 * appropriately.
599 	 */
600 	if (!i915_vm_has_cache_coloring(vma->vm))
601 		return true;
602 
603 	/* Only valid to be called on an already inserted vma */
604 	GEM_BUG_ON(!drm_mm_node_allocated(node));
605 	GEM_BUG_ON(list_empty(&node->node_list));
606 
607 	other = list_prev_entry(node, node_list);
608 	if (i915_node_color_differs(other, color) &&
609 	    !drm_mm_hole_follows(other))
610 		return false;
611 
612 	other = list_next_entry(node, node_list);
613 	if (i915_node_color_differs(other, color) &&
614 	    !drm_mm_hole_follows(node))
615 		return false;
616 
617 	return true;
618 }
619 
620 /**
621  * i915_vma_insert - finds a slot for the vma in its address space
622  * @vma: the vma
623  * @size: requested size in bytes (can be larger than the VMA)
624  * @alignment: required alignment
625  * @flags: mask of PIN_* flags to use
626  *
627  * First we try to allocate some free space that meets the requirements for
628  * the VMA. Failiing that, if the flags permit, it will evict an old VMA,
629  * preferrably the oldest idle entry to make room for the new VMA.
630  *
631  * Returns:
632  * 0 on success, negative error code otherwise.
633  */
634 static int
635 i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
636 {
637 	unsigned long color;
638 	u64 start, end;
639 	int ret;
640 
641 	GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
642 	GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
643 
644 	size = max(size, vma->size);
645 	alignment = max(alignment, vma->display_alignment);
646 	if (flags & PIN_MAPPABLE) {
647 		size = max_t(typeof(size), size, vma->fence_size);
648 		alignment = max_t(typeof(alignment),
649 				  alignment, vma->fence_alignment);
650 	}
651 
652 	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
653 	GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
654 	GEM_BUG_ON(!is_power_of_2(alignment));
655 
656 	start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0;
657 	GEM_BUG_ON(!IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
658 
659 	end = vma->vm->total;
660 	if (flags & PIN_MAPPABLE)
661 		end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end);
662 	if (flags & PIN_ZONE_4G)
663 		end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE);
664 	GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
665 
666 	/* If binding the object/GGTT view requires more space than the entire
667 	 * aperture has, reject it early before evicting everything in a vain
668 	 * attempt to find space.
669 	 */
670 	if (size > end) {
671 		DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
672 			  size, flags & PIN_MAPPABLE ? "mappable" : "total",
673 			  end);
674 		return -ENOSPC;
675 	}
676 
677 	color = 0;
678 	if (vma->obj && i915_vm_has_cache_coloring(vma->vm))
679 		color = vma->obj->cache_level;
680 
681 	if (flags & PIN_OFFSET_FIXED) {
682 		u64 offset = flags & PIN_OFFSET_MASK;
683 		if (!IS_ALIGNED(offset, alignment) ||
684 		    range_overflows(offset, size, end))
685 			return -EINVAL;
686 
687 		ret = i915_gem_gtt_reserve(vma->vm, &vma->node,
688 					   size, offset, color,
689 					   flags);
690 		if (ret)
691 			return ret;
692 	} else {
693 		/*
694 		 * We only support huge gtt pages through the 48b PPGTT,
695 		 * however we also don't want to force any alignment for
696 		 * objects which need to be tightly packed into the low 32bits.
697 		 *
698 		 * Note that we assume that GGTT are limited to 4GiB for the
699 		 * forseeable future. See also i915_ggtt_offset().
700 		 */
701 		if (upper_32_bits(end - 1) &&
702 		    vma->page_sizes.sg > I915_GTT_PAGE_SIZE) {
703 			/*
704 			 * We can't mix 64K and 4K PTEs in the same page-table
705 			 * (2M block), and so to avoid the ugliness and
706 			 * complexity of coloring we opt for just aligning 64K
707 			 * objects to 2M.
708 			 */
709 			u64 page_alignment =
710 				rounddown_pow_of_two(vma->page_sizes.sg |
711 						     I915_GTT_PAGE_SIZE_2M);
712 
713 			/*
714 			 * Check we don't expand for the limited Global GTT
715 			 * (mappable aperture is even more precious!). This
716 			 * also checks that we exclude the aliasing-ppgtt.
717 			 */
718 			GEM_BUG_ON(i915_vma_is_ggtt(vma));
719 
720 			alignment = max(alignment, page_alignment);
721 
722 			if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
723 				size = round_up(size, I915_GTT_PAGE_SIZE_2M);
724 		}
725 
726 		ret = i915_gem_gtt_insert(vma->vm, &vma->node,
727 					  size, alignment, color,
728 					  start, end, flags);
729 		if (ret)
730 			return ret;
731 
732 		GEM_BUG_ON(vma->node.start < start);
733 		GEM_BUG_ON(vma->node.start + vma->node.size > end);
734 	}
735 	GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
736 	GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, color));
737 
738 	list_add_tail(&vma->vm_link, &vma->vm->bound_list);
739 
740 	return 0;
741 }
742 
743 static void
744 i915_vma_detach(struct i915_vma *vma)
745 {
746 	GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
747 	GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
748 
749 	/*
750 	 * And finally now the object is completely decoupled from this
751 	 * vma, we can drop its hold on the backing storage and allow
752 	 * it to be reaped by the shrinker.
753 	 */
754 	list_del(&vma->vm_link);
755 }
756 
757 static bool try_qad_pin(struct i915_vma *vma, unsigned int flags)
758 {
759 	unsigned int bound;
760 	bool pinned = true;
761 
762 	bound = atomic_read(&vma->flags);
763 	do {
764 		if (unlikely(flags & ~bound))
765 			return false;
766 
767 		if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR)))
768 			return false;
769 
770 		if (!(bound & I915_VMA_PIN_MASK))
771 			goto unpinned;
772 
773 		GEM_BUG_ON(((bound + 1) & I915_VMA_PIN_MASK) == 0);
774 	} while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1));
775 
776 	return true;
777 
778 unpinned:
779 	/*
780 	 * If pin_count==0, but we are bound, check under the lock to avoid
781 	 * racing with a concurrent i915_vma_unbind().
782 	 */
783 	mutex_lock(&vma->vm->mutex);
784 	do {
785 		if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR))) {
786 			pinned = false;
787 			break;
788 		}
789 
790 		if (unlikely(flags & ~bound)) {
791 			pinned = false;
792 			break;
793 		}
794 	} while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1));
795 	mutex_unlock(&vma->vm->mutex);
796 
797 	return pinned;
798 }
799 
800 static int vma_get_pages(struct i915_vma *vma)
801 {
802 	int err = 0;
803 
804 	if (atomic_add_unless(&vma->pages_count, 1, 0))
805 		return 0;
806 
807 	/* Allocations ahoy! */
808 	if (mutex_lock_interruptible(&vma->pages_mutex))
809 		return -EINTR;
810 
811 	if (!atomic_read(&vma->pages_count)) {
812 		if (vma->obj) {
813 			err = i915_gem_object_pin_pages(vma->obj);
814 			if (err)
815 				goto unlock;
816 		}
817 
818 		err = vma->ops->set_pages(vma);
819 		if (err) {
820 			if (vma->obj)
821 				i915_gem_object_unpin_pages(vma->obj);
822 			goto unlock;
823 		}
824 	}
825 	atomic_inc(&vma->pages_count);
826 
827 unlock:
828 	mutex_unlock(&vma->pages_mutex);
829 
830 	return err;
831 }
832 
833 static void __vma_put_pages(struct i915_vma *vma, unsigned int count)
834 {
835 	/* We allocate under vma_get_pages, so beware the shrinker */
836 	mutex_lock_nested(&vma->pages_mutex, SINGLE_DEPTH_NESTING);
837 	GEM_BUG_ON(atomic_read(&vma->pages_count) < count);
838 	if (atomic_sub_return(count, &vma->pages_count) == 0) {
839 		vma->ops->clear_pages(vma);
840 		GEM_BUG_ON(vma->pages);
841 		if (vma->obj)
842 			i915_gem_object_unpin_pages(vma->obj);
843 	}
844 	mutex_unlock(&vma->pages_mutex);
845 }
846 
847 static void vma_put_pages(struct i915_vma *vma)
848 {
849 	if (atomic_add_unless(&vma->pages_count, -1, 1))
850 		return;
851 
852 	__vma_put_pages(vma, 1);
853 }
854 
855 static void vma_unbind_pages(struct i915_vma *vma)
856 {
857 	unsigned int count;
858 
859 	lockdep_assert_held(&vma->vm->mutex);
860 
861 	/* The upper portion of pages_count is the number of bindings */
862 	count = atomic_read(&vma->pages_count);
863 	count >>= I915_VMA_PAGES_BIAS;
864 	GEM_BUG_ON(!count);
865 
866 	__vma_put_pages(vma, count | count << I915_VMA_PAGES_BIAS);
867 }
868 
869 int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
870 		    u64 size, u64 alignment, u64 flags)
871 {
872 	struct i915_vma_work *work = NULL;
873 	intel_wakeref_t wakeref = 0;
874 	unsigned int bound;
875 	int err;
876 
877 #ifdef CONFIG_PROVE_LOCKING
878 	if (debug_locks && !WARN_ON(!ww) && vma->resv)
879 		assert_vma_held(vma);
880 #endif
881 
882 	BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
883 	BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND);
884 
885 	GEM_BUG_ON(!(flags & (PIN_USER | PIN_GLOBAL)));
886 
887 	/* First try and grab the pin without rebinding the vma */
888 	if (try_qad_pin(vma, flags & I915_VMA_BIND_MASK))
889 		return 0;
890 
891 	err = vma_get_pages(vma);
892 	if (err)
893 		return err;
894 
895 	if (flags & PIN_GLOBAL)
896 		wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm);
897 
898 	if (flags & vma->vm->bind_async_flags) {
899 		/* lock VM */
900 		err = i915_vm_lock_objects(vma->vm, ww);
901 		if (err)
902 			goto err_rpm;
903 
904 		work = i915_vma_work();
905 		if (!work) {
906 			err = -ENOMEM;
907 			goto err_rpm;
908 		}
909 
910 		work->vm = i915_vm_get(vma->vm);
911 
912 		/* Allocate enough page directories to used PTE */
913 		if (vma->vm->allocate_va_range) {
914 			err = i915_vm_alloc_pt_stash(vma->vm,
915 						     &work->stash,
916 						     vma->size);
917 			if (err)
918 				goto err_fence;
919 
920 			err = i915_vm_map_pt_stash(vma->vm, &work->stash);
921 			if (err)
922 				goto err_fence;
923 		}
924 	}
925 
926 	/*
927 	 * Differentiate between user/kernel vma inside the aliasing-ppgtt.
928 	 *
929 	 * We conflate the Global GTT with the user's vma when using the
930 	 * aliasing-ppgtt, but it is still vitally important to try and
931 	 * keep the use cases distinct. For example, userptr objects are
932 	 * not allowed inside the Global GTT as that will cause lock
933 	 * inversions when we have to evict them the mmu_notifier callbacks -
934 	 * but they are allowed to be part of the user ppGTT which can never
935 	 * be mapped. As such we try to give the distinct users of the same
936 	 * mutex, distinct lockclasses [equivalent to how we keep i915_ggtt
937 	 * and i915_ppgtt separate].
938 	 *
939 	 * NB this may cause us to mask real lock inversions -- while the
940 	 * code is safe today, lockdep may not be able to spot future
941 	 * transgressions.
942 	 */
943 	err = mutex_lock_interruptible_nested(&vma->vm->mutex,
944 					      !(flags & PIN_GLOBAL));
945 	if (err)
946 		goto err_fence;
947 
948 	/* No more allocations allowed now we hold vm->mutex */
949 
950 	if (unlikely(i915_vma_is_closed(vma))) {
951 		err = -ENOENT;
952 		goto err_unlock;
953 	}
954 
955 	bound = atomic_read(&vma->flags);
956 	if (unlikely(bound & I915_VMA_ERROR)) {
957 		err = -ENOMEM;
958 		goto err_unlock;
959 	}
960 
961 	if (unlikely(!((bound + 1) & I915_VMA_PIN_MASK))) {
962 		err = -EAGAIN; /* pins are meant to be fairly temporary */
963 		goto err_unlock;
964 	}
965 
966 	if (unlikely(!(flags & ~bound & I915_VMA_BIND_MASK))) {
967 		__i915_vma_pin(vma);
968 		goto err_unlock;
969 	}
970 
971 	err = i915_active_acquire(&vma->active);
972 	if (err)
973 		goto err_unlock;
974 
975 	if (!(bound & I915_VMA_BIND_MASK)) {
976 		err = i915_vma_insert(vma, size, alignment, flags);
977 		if (err)
978 			goto err_active;
979 
980 		if (i915_is_ggtt(vma->vm))
981 			__i915_vma_set_map_and_fenceable(vma);
982 	}
983 
984 	GEM_BUG_ON(!vma->pages);
985 	err = i915_vma_bind(vma,
986 			    vma->obj ? vma->obj->cache_level : 0,
987 			    flags, work);
988 	if (err)
989 		goto err_remove;
990 
991 	/* There should only be at most 2 active bindings (user, global) */
992 	GEM_BUG_ON(bound + I915_VMA_PAGES_ACTIVE < bound);
993 	atomic_add(I915_VMA_PAGES_ACTIVE, &vma->pages_count);
994 	list_move_tail(&vma->vm_link, &vma->vm->bound_list);
995 
996 	__i915_vma_pin(vma);
997 	GEM_BUG_ON(!i915_vma_is_pinned(vma));
998 	GEM_BUG_ON(!i915_vma_is_bound(vma, flags));
999 	GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags));
1000 
1001 err_remove:
1002 	if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) {
1003 		i915_vma_detach(vma);
1004 		drm_mm_remove_node(&vma->node);
1005 	}
1006 err_active:
1007 	i915_active_release(&vma->active);
1008 err_unlock:
1009 	mutex_unlock(&vma->vm->mutex);
1010 err_fence:
1011 	if (work)
1012 		dma_fence_work_commit_imm(&work->base);
1013 err_rpm:
1014 	if (wakeref)
1015 		intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref);
1016 	vma_put_pages(vma);
1017 	return err;
1018 }
1019 
1020 static void flush_idle_contexts(struct intel_gt *gt)
1021 {
1022 	struct intel_engine_cs *engine;
1023 	enum intel_engine_id id;
1024 
1025 	for_each_engine(engine, gt, id)
1026 		intel_engine_flush_barriers(engine);
1027 
1028 	intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
1029 }
1030 
1031 int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
1032 		  u32 align, unsigned int flags)
1033 {
1034 	struct i915_address_space *vm = vma->vm;
1035 	int err;
1036 
1037 	GEM_BUG_ON(!i915_vma_is_ggtt(vma));
1038 
1039 #ifdef CONFIG_LOCKDEP
1040 	WARN_ON(!ww && vma->resv && dma_resv_held(vma->resv));
1041 #endif
1042 
1043 	do {
1044 		if (ww)
1045 			err = i915_vma_pin_ww(vma, ww, 0, align, flags | PIN_GLOBAL);
1046 		else
1047 			err = i915_vma_pin(vma, 0, align, flags | PIN_GLOBAL);
1048 		if (err != -ENOSPC) {
1049 			if (!err) {
1050 				err = i915_vma_wait_for_bind(vma);
1051 				if (err)
1052 					i915_vma_unpin(vma);
1053 			}
1054 			return err;
1055 		}
1056 
1057 		/* Unlike i915_vma_pin, we don't take no for an answer! */
1058 		flush_idle_contexts(vm->gt);
1059 		if (mutex_lock_interruptible(&vm->mutex) == 0) {
1060 			i915_gem_evict_vm(vm);
1061 			mutex_unlock(&vm->mutex);
1062 		}
1063 	} while (1);
1064 }
1065 
1066 static void __vma_close(struct i915_vma *vma, struct intel_gt *gt)
1067 {
1068 	/*
1069 	 * We defer actually closing, unbinding and destroying the VMA until
1070 	 * the next idle point, or if the object is freed in the meantime. By
1071 	 * postponing the unbind, we allow for it to be resurrected by the
1072 	 * client, avoiding the work required to rebind the VMA. This is
1073 	 * advantageous for DRI, where the client/server pass objects
1074 	 * between themselves, temporarily opening a local VMA to the
1075 	 * object, and then closing it again. The same object is then reused
1076 	 * on the next frame (or two, depending on the depth of the swap queue)
1077 	 * causing us to rebind the VMA once more. This ends up being a lot
1078 	 * of wasted work for the steady state.
1079 	 */
1080 	GEM_BUG_ON(i915_vma_is_closed(vma));
1081 	list_add(&vma->closed_link, &gt->closed_vma);
1082 }
1083 
1084 void i915_vma_close(struct i915_vma *vma)
1085 {
1086 	struct intel_gt *gt = vma->vm->gt;
1087 	unsigned long flags;
1088 
1089 	if (i915_vma_is_ggtt(vma))
1090 		return;
1091 
1092 	GEM_BUG_ON(!atomic_read(&vma->open_count));
1093 	if (atomic_dec_and_lock_irqsave(&vma->open_count,
1094 					&gt->closed_lock,
1095 					flags)) {
1096 		__vma_close(vma, gt);
1097 		spin_unlock_irqrestore(&gt->closed_lock, flags);
1098 	}
1099 }
1100 
1101 static void __i915_vma_remove_closed(struct i915_vma *vma)
1102 {
1103 	struct intel_gt *gt = vma->vm->gt;
1104 
1105 	spin_lock_irq(&gt->closed_lock);
1106 	list_del_init(&vma->closed_link);
1107 	spin_unlock_irq(&gt->closed_lock);
1108 }
1109 
1110 void i915_vma_reopen(struct i915_vma *vma)
1111 {
1112 	if (i915_vma_is_closed(vma))
1113 		__i915_vma_remove_closed(vma);
1114 }
1115 
1116 void i915_vma_release(struct kref *ref)
1117 {
1118 	struct i915_vma *vma = container_of(ref, typeof(*vma), ref);
1119 
1120 	if (drm_mm_node_allocated(&vma->node)) {
1121 		mutex_lock(&vma->vm->mutex);
1122 		atomic_and(~I915_VMA_PIN_MASK, &vma->flags);
1123 		WARN_ON(__i915_vma_unbind(vma));
1124 		mutex_unlock(&vma->vm->mutex);
1125 		GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
1126 	}
1127 	GEM_BUG_ON(i915_vma_is_active(vma));
1128 
1129 	if (vma->obj) {
1130 		struct drm_i915_gem_object *obj = vma->obj;
1131 
1132 		spin_lock(&obj->vma.lock);
1133 		list_del(&vma->obj_link);
1134 		if (!RB_EMPTY_NODE(&vma->obj_node))
1135 			rb_erase(&vma->obj_node, &obj->vma.tree);
1136 		spin_unlock(&obj->vma.lock);
1137 	}
1138 
1139 	__i915_vma_remove_closed(vma);
1140 	i915_vm_put(vma->vm);
1141 
1142 	i915_active_fini(&vma->active);
1143 	i915_vma_free(vma);
1144 }
1145 
1146 void i915_vma_parked(struct intel_gt *gt)
1147 {
1148 	struct i915_vma *vma, *next;
1149 	LIST_HEAD(closed);
1150 
1151 	spin_lock_irq(&gt->closed_lock);
1152 	list_for_each_entry_safe(vma, next, &gt->closed_vma, closed_link) {
1153 		struct drm_i915_gem_object *obj = vma->obj;
1154 		struct i915_address_space *vm = vma->vm;
1155 
1156 		/* XXX All to avoid keeping a reference on i915_vma itself */
1157 
1158 		if (!kref_get_unless_zero(&obj->base.refcount))
1159 			continue;
1160 
1161 		if (!i915_vm_tryopen(vm)) {
1162 			i915_gem_object_put(obj);
1163 			continue;
1164 		}
1165 
1166 		list_move(&vma->closed_link, &closed);
1167 	}
1168 	spin_unlock_irq(&gt->closed_lock);
1169 
1170 	/* As the GT is held idle, no vma can be reopened as we destroy them */
1171 	list_for_each_entry_safe(vma, next, &closed, closed_link) {
1172 		struct drm_i915_gem_object *obj = vma->obj;
1173 		struct i915_address_space *vm = vma->vm;
1174 
1175 		INIT_LIST_HEAD(&vma->closed_link);
1176 		__i915_vma_put(vma);
1177 
1178 		i915_gem_object_put(obj);
1179 		i915_vm_close(vm);
1180 	}
1181 }
1182 
1183 static void __i915_vma_iounmap(struct i915_vma *vma)
1184 {
1185 	GEM_BUG_ON(i915_vma_is_pinned(vma));
1186 
1187 	if (vma->iomap == NULL)
1188 		return;
1189 
1190 	io_mapping_unmap(vma->iomap);
1191 	vma->iomap = NULL;
1192 }
1193 
1194 void i915_vma_revoke_mmap(struct i915_vma *vma)
1195 {
1196 	struct drm_vma_offset_node *node;
1197 	u64 vma_offset;
1198 
1199 	if (!i915_vma_has_userfault(vma))
1200 		return;
1201 
1202 	GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
1203 	GEM_BUG_ON(!vma->obj->userfault_count);
1204 
1205 	node = &vma->mmo->vma_node;
1206 	vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT;
1207 	unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping,
1208 			    drm_vma_node_offset_addr(node) + vma_offset,
1209 			    vma->size,
1210 			    1);
1211 
1212 	i915_vma_unset_userfault(vma);
1213 	if (!--vma->obj->userfault_count)
1214 		list_del(&vma->obj->userfault_link);
1215 }
1216 
1217 static int
1218 __i915_request_await_bind(struct i915_request *rq, struct i915_vma *vma)
1219 {
1220 	return __i915_request_await_exclusive(rq, &vma->active);
1221 }
1222 
1223 int __i915_vma_move_to_active(struct i915_vma *vma, struct i915_request *rq)
1224 {
1225 	int err;
1226 
1227 	GEM_BUG_ON(!i915_vma_is_pinned(vma));
1228 
1229 	/* Wait for the vma to be bound before we start! */
1230 	err = __i915_request_await_bind(rq, vma);
1231 	if (err)
1232 		return err;
1233 
1234 	return i915_active_add_request(&vma->active, rq);
1235 }
1236 
1237 int i915_vma_move_to_active(struct i915_vma *vma,
1238 			    struct i915_request *rq,
1239 			    unsigned int flags)
1240 {
1241 	struct drm_i915_gem_object *obj = vma->obj;
1242 	int err;
1243 
1244 	assert_object_held(obj);
1245 
1246 	err = __i915_vma_move_to_active(vma, rq);
1247 	if (unlikely(err))
1248 		return err;
1249 
1250 	if (flags & EXEC_OBJECT_WRITE) {
1251 		struct intel_frontbuffer *front;
1252 
1253 		front = __intel_frontbuffer_get(obj);
1254 		if (unlikely(front)) {
1255 			if (intel_frontbuffer_invalidate(front, ORIGIN_CS))
1256 				i915_active_add_request(&front->write, rq);
1257 			intel_frontbuffer_put(front);
1258 		}
1259 
1260 		dma_resv_add_excl_fence(vma->resv, &rq->fence);
1261 		obj->write_domain = I915_GEM_DOMAIN_RENDER;
1262 		obj->read_domains = 0;
1263 	} else {
1264 		if (!(flags & __EXEC_OBJECT_NO_RESERVE)) {
1265 			err = dma_resv_reserve_shared(vma->resv, 1);
1266 			if (unlikely(err))
1267 				return err;
1268 		}
1269 
1270 		dma_resv_add_shared_fence(vma->resv, &rq->fence);
1271 		obj->write_domain = 0;
1272 	}
1273 
1274 	if (flags & EXEC_OBJECT_NEEDS_FENCE && vma->fence)
1275 		i915_active_add_request(&vma->fence->active, rq);
1276 
1277 	obj->read_domains |= I915_GEM_GPU_DOMAINS;
1278 	obj->mm.dirty = true;
1279 
1280 	GEM_BUG_ON(!i915_vma_is_active(vma));
1281 	return 0;
1282 }
1283 
1284 void __i915_vma_evict(struct i915_vma *vma)
1285 {
1286 	GEM_BUG_ON(i915_vma_is_pinned(vma));
1287 
1288 	if (i915_vma_is_map_and_fenceable(vma)) {
1289 		/* Force a pagefault for domain tracking on next user access */
1290 		i915_vma_revoke_mmap(vma);
1291 
1292 		/*
1293 		 * Check that we have flushed all writes through the GGTT
1294 		 * before the unbind, other due to non-strict nature of those
1295 		 * indirect writes they may end up referencing the GGTT PTE
1296 		 * after the unbind.
1297 		 *
1298 		 * Note that we may be concurrently poking at the GGTT_WRITE
1299 		 * bit from set-domain, as we mark all GGTT vma associated
1300 		 * with an object. We know this is for another vma, as we
1301 		 * are currently unbinding this one -- so if this vma will be
1302 		 * reused, it will be refaulted and have its dirty bit set
1303 		 * before the next write.
1304 		 */
1305 		i915_vma_flush_writes(vma);
1306 
1307 		/* release the fence reg _after_ flushing */
1308 		i915_vma_revoke_fence(vma);
1309 
1310 		__i915_vma_iounmap(vma);
1311 		clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
1312 	}
1313 	GEM_BUG_ON(vma->fence);
1314 	GEM_BUG_ON(i915_vma_has_userfault(vma));
1315 
1316 	if (likely(atomic_read(&vma->vm->open))) {
1317 		trace_i915_vma_unbind(vma);
1318 		vma->ops->unbind_vma(vma->vm, vma);
1319 	}
1320 	atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR | I915_VMA_GGTT_WRITE),
1321 		   &vma->flags);
1322 
1323 	i915_vma_detach(vma);
1324 	vma_unbind_pages(vma);
1325 }
1326 
1327 int __i915_vma_unbind(struct i915_vma *vma)
1328 {
1329 	int ret;
1330 
1331 	lockdep_assert_held(&vma->vm->mutex);
1332 
1333 	if (!drm_mm_node_allocated(&vma->node))
1334 		return 0;
1335 
1336 	if (i915_vma_is_pinned(vma)) {
1337 		vma_print_allocator(vma, "is pinned");
1338 		return -EAGAIN;
1339 	}
1340 
1341 	/*
1342 	 * After confirming that no one else is pinning this vma, wait for
1343 	 * any laggards who may have crept in during the wait (through
1344 	 * a residual pin skipping the vm->mutex) to complete.
1345 	 */
1346 	ret = i915_vma_sync(vma);
1347 	if (ret)
1348 		return ret;
1349 
1350 	GEM_BUG_ON(i915_vma_is_active(vma));
1351 	__i915_vma_evict(vma);
1352 
1353 	drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */
1354 	return 0;
1355 }
1356 
1357 int i915_vma_unbind(struct i915_vma *vma)
1358 {
1359 	struct i915_address_space *vm = vma->vm;
1360 	intel_wakeref_t wakeref = 0;
1361 	int err;
1362 
1363 	/* Optimistic wait before taking the mutex */
1364 	err = i915_vma_sync(vma);
1365 	if (err)
1366 		return err;
1367 
1368 	if (!drm_mm_node_allocated(&vma->node))
1369 		return 0;
1370 
1371 	if (i915_vma_is_pinned(vma)) {
1372 		vma_print_allocator(vma, "is pinned");
1373 		return -EAGAIN;
1374 	}
1375 
1376 	if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND))
1377 		/* XXX not always required: nop_clear_range */
1378 		wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm);
1379 
1380 	err = mutex_lock_interruptible_nested(&vma->vm->mutex, !wakeref);
1381 	if (err)
1382 		goto out_rpm;
1383 
1384 	err = __i915_vma_unbind(vma);
1385 	mutex_unlock(&vm->mutex);
1386 
1387 out_rpm:
1388 	if (wakeref)
1389 		intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref);
1390 	return err;
1391 }
1392 
1393 struct i915_vma *i915_vma_make_unshrinkable(struct i915_vma *vma)
1394 {
1395 	i915_gem_object_make_unshrinkable(vma->obj);
1396 	return vma;
1397 }
1398 
1399 void i915_vma_make_shrinkable(struct i915_vma *vma)
1400 {
1401 	i915_gem_object_make_shrinkable(vma->obj);
1402 }
1403 
1404 void i915_vma_make_purgeable(struct i915_vma *vma)
1405 {
1406 	i915_gem_object_make_purgeable(vma->obj);
1407 }
1408 
1409 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
1410 #include "selftests/i915_vma.c"
1411 #endif
1412 
1413 static void i915_global_vma_shrink(void)
1414 {
1415 	kmem_cache_shrink(global.slab_vmas);
1416 }
1417 
1418 static void i915_global_vma_exit(void)
1419 {
1420 	kmem_cache_destroy(global.slab_vmas);
1421 }
1422 
1423 static struct i915_global_vma global = { {
1424 	.shrink = i915_global_vma_shrink,
1425 	.exit = i915_global_vma_exit,
1426 } };
1427 
1428 int __init i915_global_vma_init(void)
1429 {
1430 	global.slab_vmas = KMEM_CACHE(i915_vma, SLAB_HWCACHE_ALIGN);
1431 	if (!global.slab_vmas)
1432 		return -ENOMEM;
1433 
1434 	i915_global_register(&global.base);
1435 	return 0;
1436 }
1437