1 /* 2 * Copyright © 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/sched/mm.h> 26 #include <linux/dma-fence-array.h> 27 #include <drm/drm_gem.h> 28 29 #include "display/intel_frontbuffer.h" 30 #include "gem/i915_gem_lmem.h" 31 #include "gem/i915_gem_tiling.h" 32 #include "gt/intel_engine.h" 33 #include "gt/intel_engine_heartbeat.h" 34 #include "gt/intel_gt.h" 35 #include "gt/intel_gt_requests.h" 36 37 #include "i915_drv.h" 38 #include "i915_gem_evict.h" 39 #include "i915_sw_fence_work.h" 40 #include "i915_trace.h" 41 #include "i915_vma.h" 42 #include "i915_vma_resource.h" 43 44 static inline void assert_vma_held_evict(const struct i915_vma *vma) 45 { 46 /* 47 * We may be forced to unbind when the vm is dead, to clean it up. 48 * This is the only exception to the requirement of the object lock 49 * being held. 50 */ 51 if (kref_read(&vma->vm->ref)) 52 assert_object_held_shared(vma->obj); 53 } 54 55 static struct kmem_cache *slab_vmas; 56 57 static struct i915_vma *i915_vma_alloc(void) 58 { 59 return kmem_cache_zalloc(slab_vmas, GFP_KERNEL); 60 } 61 62 static void i915_vma_free(struct i915_vma *vma) 63 { 64 return kmem_cache_free(slab_vmas, vma); 65 } 66 67 #if IS_ENABLED(CONFIG_DRM_I915_ERRLOG_GEM) && IS_ENABLED(CONFIG_DRM_DEBUG_MM) 68 69 #include <linux/stackdepot.h> 70 71 static void vma_print_allocator(struct i915_vma *vma, const char *reason) 72 { 73 char buf[512]; 74 75 if (!vma->node.stack) { 76 DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n", 77 vma->node.start, vma->node.size, reason); 78 return; 79 } 80 81 stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0); 82 DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n", 83 vma->node.start, vma->node.size, reason, buf); 84 } 85 86 #else 87 88 static void vma_print_allocator(struct i915_vma *vma, const char *reason) 89 { 90 } 91 92 #endif 93 94 static inline struct i915_vma *active_to_vma(struct i915_active *ref) 95 { 96 return container_of(ref, typeof(struct i915_vma), active); 97 } 98 99 static int __i915_vma_active(struct i915_active *ref) 100 { 101 return i915_vma_tryget(active_to_vma(ref)) ? 0 : -ENOENT; 102 } 103 104 static void __i915_vma_retire(struct i915_active *ref) 105 { 106 i915_vma_put(active_to_vma(ref)); 107 } 108 109 static struct i915_vma * 110 vma_create(struct drm_i915_gem_object *obj, 111 struct i915_address_space *vm, 112 const struct i915_ggtt_view *view) 113 { 114 struct i915_vma *pos = ERR_PTR(-E2BIG); 115 struct i915_vma *vma; 116 struct rb_node *rb, **p; 117 int err; 118 119 /* The aliasing_ppgtt should never be used directly! */ 120 GEM_BUG_ON(vm == &vm->gt->ggtt->alias->vm); 121 122 vma = i915_vma_alloc(); 123 if (vma == NULL) 124 return ERR_PTR(-ENOMEM); 125 126 vma->ops = &vm->vma_ops; 127 vma->obj = obj; 128 vma->size = obj->base.size; 129 vma->display_alignment = I915_GTT_MIN_ALIGNMENT; 130 131 i915_active_init(&vma->active, __i915_vma_active, __i915_vma_retire, 0); 132 133 /* Declare ourselves safe for use inside shrinkers */ 134 if (IS_ENABLED(CONFIG_LOCKDEP)) { 135 fs_reclaim_acquire(GFP_KERNEL); 136 might_lock(&vma->active.mutex); 137 fs_reclaim_release(GFP_KERNEL); 138 } 139 140 INIT_LIST_HEAD(&vma->closed_link); 141 INIT_LIST_HEAD(&vma->obj_link); 142 RB_CLEAR_NODE(&vma->obj_node); 143 144 if (view && view->type != I915_GGTT_VIEW_NORMAL) { 145 vma->ggtt_view = *view; 146 if (view->type == I915_GGTT_VIEW_PARTIAL) { 147 GEM_BUG_ON(range_overflows_t(u64, 148 view->partial.offset, 149 view->partial.size, 150 obj->base.size >> PAGE_SHIFT)); 151 vma->size = view->partial.size; 152 vma->size <<= PAGE_SHIFT; 153 GEM_BUG_ON(vma->size > obj->base.size); 154 } else if (view->type == I915_GGTT_VIEW_ROTATED) { 155 vma->size = intel_rotation_info_size(&view->rotated); 156 vma->size <<= PAGE_SHIFT; 157 } else if (view->type == I915_GGTT_VIEW_REMAPPED) { 158 vma->size = intel_remapped_info_size(&view->remapped); 159 vma->size <<= PAGE_SHIFT; 160 } 161 } 162 163 if (unlikely(vma->size > vm->total)) 164 goto err_vma; 165 166 GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE)); 167 168 err = mutex_lock_interruptible(&vm->mutex); 169 if (err) { 170 pos = ERR_PTR(err); 171 goto err_vma; 172 } 173 174 vma->vm = vm; 175 list_add_tail(&vma->vm_link, &vm->unbound_list); 176 177 spin_lock(&obj->vma.lock); 178 if (i915_is_ggtt(vm)) { 179 if (unlikely(overflows_type(vma->size, u32))) 180 goto err_unlock; 181 182 vma->fence_size = i915_gem_fence_size(vm->i915, vma->size, 183 i915_gem_object_get_tiling(obj), 184 i915_gem_object_get_stride(obj)); 185 if (unlikely(vma->fence_size < vma->size || /* overflow */ 186 vma->fence_size > vm->total)) 187 goto err_unlock; 188 189 GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT)); 190 191 vma->fence_alignment = i915_gem_fence_alignment(vm->i915, vma->size, 192 i915_gem_object_get_tiling(obj), 193 i915_gem_object_get_stride(obj)); 194 GEM_BUG_ON(!is_power_of_2(vma->fence_alignment)); 195 196 __set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma)); 197 } 198 199 rb = NULL; 200 p = &obj->vma.tree.rb_node; 201 while (*p) { 202 long cmp; 203 204 rb = *p; 205 pos = rb_entry(rb, struct i915_vma, obj_node); 206 207 /* 208 * If the view already exists in the tree, another thread 209 * already created a matching vma, so return the older instance 210 * and dispose of ours. 211 */ 212 cmp = i915_vma_compare(pos, vm, view); 213 if (cmp < 0) 214 p = &rb->rb_right; 215 else if (cmp > 0) 216 p = &rb->rb_left; 217 else 218 goto err_unlock; 219 } 220 rb_link_node(&vma->obj_node, rb, p); 221 rb_insert_color(&vma->obj_node, &obj->vma.tree); 222 223 if (i915_vma_is_ggtt(vma)) 224 /* 225 * We put the GGTT vma at the start of the vma-list, followed 226 * by the ppGGTT vma. This allows us to break early when 227 * iterating over only the GGTT vma for an object, see 228 * for_each_ggtt_vma() 229 */ 230 list_add(&vma->obj_link, &obj->vma.list); 231 else 232 list_add_tail(&vma->obj_link, &obj->vma.list); 233 234 spin_unlock(&obj->vma.lock); 235 mutex_unlock(&vm->mutex); 236 237 return vma; 238 239 err_unlock: 240 spin_unlock(&obj->vma.lock); 241 list_del_init(&vma->vm_link); 242 mutex_unlock(&vm->mutex); 243 err_vma: 244 i915_vma_free(vma); 245 return pos; 246 } 247 248 static struct i915_vma * 249 i915_vma_lookup(struct drm_i915_gem_object *obj, 250 struct i915_address_space *vm, 251 const struct i915_ggtt_view *view) 252 { 253 struct rb_node *rb; 254 255 rb = obj->vma.tree.rb_node; 256 while (rb) { 257 struct i915_vma *vma = rb_entry(rb, struct i915_vma, obj_node); 258 long cmp; 259 260 cmp = i915_vma_compare(vma, vm, view); 261 if (cmp == 0) 262 return vma; 263 264 if (cmp < 0) 265 rb = rb->rb_right; 266 else 267 rb = rb->rb_left; 268 } 269 270 return NULL; 271 } 272 273 /** 274 * i915_vma_instance - return the singleton instance of the VMA 275 * @obj: parent &struct drm_i915_gem_object to be mapped 276 * @vm: address space in which the mapping is located 277 * @view: additional mapping requirements 278 * 279 * i915_vma_instance() looks up an existing VMA of the @obj in the @vm with 280 * the same @view characteristics. If a match is not found, one is created. 281 * Once created, the VMA is kept until either the object is freed, or the 282 * address space is closed. 283 * 284 * Returns the vma, or an error pointer. 285 */ 286 struct i915_vma * 287 i915_vma_instance(struct drm_i915_gem_object *obj, 288 struct i915_address_space *vm, 289 const struct i915_ggtt_view *view) 290 { 291 struct i915_vma *vma; 292 293 GEM_BUG_ON(view && !i915_is_ggtt_or_dpt(vm)); 294 GEM_BUG_ON(!kref_read(&vm->ref)); 295 296 spin_lock(&obj->vma.lock); 297 vma = i915_vma_lookup(obj, vm, view); 298 spin_unlock(&obj->vma.lock); 299 300 /* vma_create() will resolve the race if another creates the vma */ 301 if (unlikely(!vma)) 302 vma = vma_create(obj, vm, view); 303 304 GEM_BUG_ON(!IS_ERR(vma) && i915_vma_compare(vma, vm, view)); 305 return vma; 306 } 307 308 struct i915_vma_work { 309 struct dma_fence_work base; 310 struct i915_address_space *vm; 311 struct i915_vm_pt_stash stash; 312 struct i915_vma_resource *vma_res; 313 struct drm_i915_gem_object *pinned; 314 struct i915_sw_dma_fence_cb cb; 315 enum i915_cache_level cache_level; 316 unsigned int flags; 317 }; 318 319 static void __vma_bind(struct dma_fence_work *work) 320 { 321 struct i915_vma_work *vw = container_of(work, typeof(*vw), base); 322 struct i915_vma_resource *vma_res = vw->vma_res; 323 324 vma_res->ops->bind_vma(vma_res->vm, &vw->stash, 325 vma_res, vw->cache_level, vw->flags); 326 327 } 328 329 static void __vma_release(struct dma_fence_work *work) 330 { 331 struct i915_vma_work *vw = container_of(work, typeof(*vw), base); 332 333 if (vw->pinned) 334 i915_gem_object_put(vw->pinned); 335 336 i915_vm_free_pt_stash(vw->vm, &vw->stash); 337 if (vw->vma_res) 338 i915_vma_resource_put(vw->vma_res); 339 } 340 341 static const struct dma_fence_work_ops bind_ops = { 342 .name = "bind", 343 .work = __vma_bind, 344 .release = __vma_release, 345 }; 346 347 struct i915_vma_work *i915_vma_work(void) 348 { 349 struct i915_vma_work *vw; 350 351 vw = kzalloc(sizeof(*vw), GFP_KERNEL); 352 if (!vw) 353 return NULL; 354 355 dma_fence_work_init(&vw->base, &bind_ops); 356 vw->base.dma.error = -EAGAIN; /* disable the worker by default */ 357 358 return vw; 359 } 360 361 int i915_vma_wait_for_bind(struct i915_vma *vma) 362 { 363 int err = 0; 364 365 if (rcu_access_pointer(vma->active.excl.fence)) { 366 struct dma_fence *fence; 367 368 rcu_read_lock(); 369 fence = dma_fence_get_rcu_safe(&vma->active.excl.fence); 370 rcu_read_unlock(); 371 if (fence) { 372 err = dma_fence_wait(fence, true); 373 dma_fence_put(fence); 374 } 375 } 376 377 return err; 378 } 379 380 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) 381 static int i915_vma_verify_bind_complete(struct i915_vma *vma) 382 { 383 struct dma_fence *fence = i915_active_fence_get(&vma->active.excl); 384 int err; 385 386 if (!fence) 387 return 0; 388 389 if (dma_fence_is_signaled(fence)) 390 err = fence->error; 391 else 392 err = -EBUSY; 393 394 dma_fence_put(fence); 395 396 return err; 397 } 398 #else 399 #define i915_vma_verify_bind_complete(_vma) 0 400 #endif 401 402 I915_SELFTEST_EXPORT void 403 i915_vma_resource_init_from_vma(struct i915_vma_resource *vma_res, 404 struct i915_vma *vma) 405 { 406 struct drm_i915_gem_object *obj = vma->obj; 407 408 i915_vma_resource_init(vma_res, vma->vm, vma->pages, &vma->page_sizes, 409 obj->mm.rsgt, i915_gem_object_is_readonly(obj), 410 i915_gem_object_is_lmem(obj), obj->mm.region, 411 vma->ops, vma->private, vma->node.start, 412 vma->node.size, vma->size); 413 } 414 415 /** 416 * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address space. 417 * @vma: VMA to map 418 * @cache_level: mapping cache level 419 * @flags: flags like global or local mapping 420 * @work: preallocated worker for allocating and binding the PTE 421 * @vma_res: pointer to a preallocated vma resource. The resource is either 422 * consumed or freed. 423 * 424 * DMA addresses are taken from the scatter-gather table of this object (or of 425 * this VMA in case of non-default GGTT views) and PTE entries set up. 426 * Note that DMA addresses are also the only part of the SG table we care about. 427 */ 428 int i915_vma_bind(struct i915_vma *vma, 429 enum i915_cache_level cache_level, 430 u32 flags, 431 struct i915_vma_work *work, 432 struct i915_vma_resource *vma_res) 433 { 434 u32 bind_flags; 435 u32 vma_flags; 436 int ret; 437 438 lockdep_assert_held(&vma->vm->mutex); 439 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 440 GEM_BUG_ON(vma->size > vma->node.size); 441 442 if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start, 443 vma->node.size, 444 vma->vm->total))) { 445 i915_vma_resource_free(vma_res); 446 return -ENODEV; 447 } 448 449 if (GEM_DEBUG_WARN_ON(!flags)) { 450 i915_vma_resource_free(vma_res); 451 return -EINVAL; 452 } 453 454 bind_flags = flags; 455 bind_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND; 456 457 vma_flags = atomic_read(&vma->flags); 458 vma_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND; 459 460 bind_flags &= ~vma_flags; 461 if (bind_flags == 0) { 462 i915_vma_resource_free(vma_res); 463 return 0; 464 } 465 466 GEM_BUG_ON(!atomic_read(&vma->pages_count)); 467 468 /* Wait for or await async unbinds touching our range */ 469 if (work && bind_flags & vma->vm->bind_async_flags) 470 ret = i915_vma_resource_bind_dep_await(vma->vm, 471 &work->base.chain, 472 vma->node.start, 473 vma->node.size, 474 true, 475 GFP_NOWAIT | 476 __GFP_RETRY_MAYFAIL | 477 __GFP_NOWARN); 478 else 479 ret = i915_vma_resource_bind_dep_sync(vma->vm, vma->node.start, 480 vma->node.size, true); 481 if (ret) { 482 i915_vma_resource_free(vma_res); 483 return ret; 484 } 485 486 if (vma->resource || !vma_res) { 487 /* Rebinding with an additional I915_VMA_*_BIND */ 488 GEM_WARN_ON(!vma_flags); 489 i915_vma_resource_free(vma_res); 490 } else { 491 i915_vma_resource_init_from_vma(vma_res, vma); 492 vma->resource = vma_res; 493 } 494 trace_i915_vma_bind(vma, bind_flags); 495 if (work && bind_flags & vma->vm->bind_async_flags) { 496 struct dma_fence *prev; 497 498 work->vma_res = i915_vma_resource_get(vma->resource); 499 work->cache_level = cache_level; 500 work->flags = bind_flags; 501 502 /* 503 * Note we only want to chain up to the migration fence on 504 * the pages (not the object itself). As we don't track that, 505 * yet, we have to use the exclusive fence instead. 506 * 507 * Also note that we do not want to track the async vma as 508 * part of the obj->resv->excl_fence as it only affects 509 * execution and not content or object's backing store lifetime. 510 */ 511 prev = i915_active_set_exclusive(&vma->active, &work->base.dma); 512 if (prev) { 513 __i915_sw_fence_await_dma_fence(&work->base.chain, 514 prev, 515 &work->cb); 516 dma_fence_put(prev); 517 } 518 519 work->base.dma.error = 0; /* enable the queue_work() */ 520 521 /* 522 * If we don't have the refcounted pages list, keep a reference 523 * on the object to avoid waiting for the async bind to 524 * complete in the object destruction path. 525 */ 526 if (!work->vma_res->bi.pages_rsgt) 527 work->pinned = i915_gem_object_get(vma->obj); 528 } else { 529 ret = i915_gem_object_wait_moving_fence(vma->obj, true); 530 if (ret) { 531 i915_vma_resource_free(vma->resource); 532 vma->resource = NULL; 533 534 return ret; 535 } 536 vma->ops->bind_vma(vma->vm, NULL, vma->resource, cache_level, 537 bind_flags); 538 } 539 540 set_bit(I915_BO_WAS_BOUND_BIT, &vma->obj->flags); 541 542 atomic_or(bind_flags, &vma->flags); 543 return 0; 544 } 545 546 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma) 547 { 548 void __iomem *ptr; 549 int err; 550 551 if (WARN_ON_ONCE(vma->obj->flags & I915_BO_ALLOC_GPU_ONLY)) 552 return IOMEM_ERR_PTR(-EINVAL); 553 554 GEM_BUG_ON(!i915_vma_is_ggtt(vma)); 555 GEM_BUG_ON(!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND)); 556 GEM_BUG_ON(i915_vma_verify_bind_complete(vma)); 557 558 ptr = READ_ONCE(vma->iomap); 559 if (ptr == NULL) { 560 /* 561 * TODO: consider just using i915_gem_object_pin_map() for lmem 562 * instead, which already supports mapping non-contiguous chunks 563 * of pages, that way we can also drop the 564 * I915_BO_ALLOC_CONTIGUOUS when allocating the object. 565 */ 566 if (i915_gem_object_is_lmem(vma->obj)) { 567 ptr = i915_gem_object_lmem_io_map(vma->obj, 0, 568 vma->obj->base.size); 569 } else if (i915_vma_is_map_and_fenceable(vma)) { 570 ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap, 571 vma->node.start, 572 vma->node.size); 573 } else { 574 ptr = (void __iomem *) 575 i915_gem_object_pin_map(vma->obj, I915_MAP_WC); 576 if (IS_ERR(ptr)) { 577 err = PTR_ERR(ptr); 578 goto err; 579 } 580 ptr = page_pack_bits(ptr, 1); 581 } 582 583 if (ptr == NULL) { 584 err = -ENOMEM; 585 goto err; 586 } 587 588 if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) { 589 if (page_unmask_bits(ptr)) 590 __i915_gem_object_release_map(vma->obj); 591 else 592 io_mapping_unmap(ptr); 593 ptr = vma->iomap; 594 } 595 } 596 597 __i915_vma_pin(vma); 598 599 err = i915_vma_pin_fence(vma); 600 if (err) 601 goto err_unpin; 602 603 i915_vma_set_ggtt_write(vma); 604 605 /* NB Access through the GTT requires the device to be awake. */ 606 return page_mask_bits(ptr); 607 608 err_unpin: 609 __i915_vma_unpin(vma); 610 err: 611 return IOMEM_ERR_PTR(err); 612 } 613 614 void i915_vma_flush_writes(struct i915_vma *vma) 615 { 616 if (i915_vma_unset_ggtt_write(vma)) 617 intel_gt_flush_ggtt_writes(vma->vm->gt); 618 } 619 620 void i915_vma_unpin_iomap(struct i915_vma *vma) 621 { 622 GEM_BUG_ON(vma->iomap == NULL); 623 624 /* XXX We keep the mapping until __i915_vma_unbind()/evict() */ 625 626 i915_vma_flush_writes(vma); 627 628 i915_vma_unpin_fence(vma); 629 i915_vma_unpin(vma); 630 } 631 632 void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags) 633 { 634 struct i915_vma *vma; 635 struct drm_i915_gem_object *obj; 636 637 vma = fetch_and_zero(p_vma); 638 if (!vma) 639 return; 640 641 obj = vma->obj; 642 GEM_BUG_ON(!obj); 643 644 i915_vma_unpin(vma); 645 646 if (flags & I915_VMA_RELEASE_MAP) 647 i915_gem_object_unpin_map(obj); 648 649 i915_gem_object_put(obj); 650 } 651 652 bool i915_vma_misplaced(const struct i915_vma *vma, 653 u64 size, u64 alignment, u64 flags) 654 { 655 if (!drm_mm_node_allocated(&vma->node)) 656 return false; 657 658 if (test_bit(I915_VMA_ERROR_BIT, __i915_vma_flags(vma))) 659 return true; 660 661 if (vma->node.size < size) 662 return true; 663 664 GEM_BUG_ON(alignment && !is_power_of_2(alignment)); 665 if (alignment && !IS_ALIGNED(vma->node.start, alignment)) 666 return true; 667 668 if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma)) 669 return true; 670 671 if (flags & PIN_OFFSET_BIAS && 672 vma->node.start < (flags & PIN_OFFSET_MASK)) 673 return true; 674 675 if (flags & PIN_OFFSET_FIXED && 676 vma->node.start != (flags & PIN_OFFSET_MASK)) 677 return true; 678 679 return false; 680 } 681 682 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma) 683 { 684 bool mappable, fenceable; 685 686 GEM_BUG_ON(!i915_vma_is_ggtt(vma)); 687 GEM_BUG_ON(!vma->fence_size); 688 689 fenceable = (vma->node.size >= vma->fence_size && 690 IS_ALIGNED(vma->node.start, vma->fence_alignment)); 691 692 mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end; 693 694 if (mappable && fenceable) 695 set_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma)); 696 else 697 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma)); 698 } 699 700 bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long color) 701 { 702 struct drm_mm_node *node = &vma->node; 703 struct drm_mm_node *other; 704 705 /* 706 * On some machines we have to be careful when putting differing types 707 * of snoopable memory together to avoid the prefetcher crossing memory 708 * domains and dying. During vm initialisation, we decide whether or not 709 * these constraints apply and set the drm_mm.color_adjust 710 * appropriately. 711 */ 712 if (!i915_vm_has_cache_coloring(vma->vm)) 713 return true; 714 715 /* Only valid to be called on an already inserted vma */ 716 GEM_BUG_ON(!drm_mm_node_allocated(node)); 717 GEM_BUG_ON(list_empty(&node->node_list)); 718 719 other = list_prev_entry(node, node_list); 720 if (i915_node_color_differs(other, color) && 721 !drm_mm_hole_follows(other)) 722 return false; 723 724 other = list_next_entry(node, node_list); 725 if (i915_node_color_differs(other, color) && 726 !drm_mm_hole_follows(node)) 727 return false; 728 729 return true; 730 } 731 732 /** 733 * i915_vma_insert - finds a slot for the vma in its address space 734 * @vma: the vma 735 * @size: requested size in bytes (can be larger than the VMA) 736 * @alignment: required alignment 737 * @flags: mask of PIN_* flags to use 738 * 739 * First we try to allocate some free space that meets the requirements for 740 * the VMA. Failiing that, if the flags permit, it will evict an old VMA, 741 * preferrably the oldest idle entry to make room for the new VMA. 742 * 743 * Returns: 744 * 0 on success, negative error code otherwise. 745 */ 746 static int 747 i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww, 748 u64 size, u64 alignment, u64 flags) 749 { 750 unsigned long color; 751 u64 start, end; 752 int ret; 753 754 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)); 755 GEM_BUG_ON(drm_mm_node_allocated(&vma->node)); 756 757 size = max(size, vma->size); 758 alignment = max(alignment, vma->display_alignment); 759 if (flags & PIN_MAPPABLE) { 760 size = max_t(typeof(size), size, vma->fence_size); 761 alignment = max_t(typeof(alignment), 762 alignment, vma->fence_alignment); 763 } 764 765 GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE)); 766 GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); 767 GEM_BUG_ON(!is_power_of_2(alignment)); 768 769 start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0; 770 GEM_BUG_ON(!IS_ALIGNED(start, I915_GTT_PAGE_SIZE)); 771 772 end = vma->vm->total; 773 if (flags & PIN_MAPPABLE) 774 end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end); 775 if (flags & PIN_ZONE_4G) 776 end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE); 777 GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE)); 778 779 alignment = max(alignment, i915_vm_obj_min_alignment(vma->vm, vma->obj)); 780 /* 781 * for compact-pt we round up the reservation to prevent 782 * any smaller pages being used within the same PDE 783 */ 784 if (NEEDS_COMPACT_PT(vma->vm->i915)) 785 size = round_up(size, alignment); 786 787 /* If binding the object/GGTT view requires more space than the entire 788 * aperture has, reject it early before evicting everything in a vain 789 * attempt to find space. 790 */ 791 if (size > end) { 792 DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n", 793 size, flags & PIN_MAPPABLE ? "mappable" : "total", 794 end); 795 return -ENOSPC; 796 } 797 798 color = 0; 799 800 if (i915_vm_has_cache_coloring(vma->vm)) 801 color = vma->obj->cache_level; 802 803 if (flags & PIN_OFFSET_FIXED) { 804 u64 offset = flags & PIN_OFFSET_MASK; 805 if (!IS_ALIGNED(offset, alignment) || 806 range_overflows(offset, size, end)) 807 return -EINVAL; 808 809 ret = i915_gem_gtt_reserve(vma->vm, ww, &vma->node, 810 size, offset, color, 811 flags); 812 if (ret) 813 return ret; 814 } else { 815 /* 816 * We only support huge gtt pages through the 48b PPGTT, 817 * however we also don't want to force any alignment for 818 * objects which need to be tightly packed into the low 32bits. 819 * 820 * Note that we assume that GGTT are limited to 4GiB for the 821 * forseeable future. See also i915_ggtt_offset(). 822 */ 823 if (upper_32_bits(end - 1) && 824 vma->page_sizes.sg > I915_GTT_PAGE_SIZE) { 825 /* 826 * We can't mix 64K and 4K PTEs in the same page-table 827 * (2M block), and so to avoid the ugliness and 828 * complexity of coloring we opt for just aligning 64K 829 * objects to 2M. 830 */ 831 u64 page_alignment = 832 rounddown_pow_of_two(vma->page_sizes.sg | 833 I915_GTT_PAGE_SIZE_2M); 834 835 /* 836 * Check we don't expand for the limited Global GTT 837 * (mappable aperture is even more precious!). This 838 * also checks that we exclude the aliasing-ppgtt. 839 */ 840 GEM_BUG_ON(i915_vma_is_ggtt(vma)); 841 842 alignment = max(alignment, page_alignment); 843 844 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) 845 size = round_up(size, I915_GTT_PAGE_SIZE_2M); 846 } 847 848 ret = i915_gem_gtt_insert(vma->vm, ww, &vma->node, 849 size, alignment, color, 850 start, end, flags); 851 if (ret) 852 return ret; 853 854 GEM_BUG_ON(vma->node.start < start); 855 GEM_BUG_ON(vma->node.start + vma->node.size > end); 856 } 857 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 858 GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, color)); 859 860 list_move_tail(&vma->vm_link, &vma->vm->bound_list); 861 862 return 0; 863 } 864 865 static void 866 i915_vma_detach(struct i915_vma *vma) 867 { 868 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 869 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)); 870 871 /* 872 * And finally now the object is completely decoupled from this 873 * vma, we can drop its hold on the backing storage and allow 874 * it to be reaped by the shrinker. 875 */ 876 list_move_tail(&vma->vm_link, &vma->vm->unbound_list); 877 } 878 879 static bool try_qad_pin(struct i915_vma *vma, unsigned int flags) 880 { 881 unsigned int bound; 882 883 bound = atomic_read(&vma->flags); 884 885 if (flags & PIN_VALIDATE) { 886 flags &= I915_VMA_BIND_MASK; 887 888 return (flags & bound) == flags; 889 } 890 891 /* with the lock mandatory for unbind, we don't race here */ 892 flags &= I915_VMA_BIND_MASK; 893 do { 894 if (unlikely(flags & ~bound)) 895 return false; 896 897 if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR))) 898 return false; 899 900 GEM_BUG_ON(((bound + 1) & I915_VMA_PIN_MASK) == 0); 901 } while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1)); 902 903 return true; 904 } 905 906 static struct scatterlist * 907 rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset, 908 unsigned int width, unsigned int height, 909 unsigned int src_stride, unsigned int dst_stride, 910 struct sg_table *st, struct scatterlist *sg) 911 { 912 unsigned int column, row; 913 unsigned int src_idx; 914 915 for (column = 0; column < width; column++) { 916 unsigned int left; 917 918 src_idx = src_stride * (height - 1) + column + offset; 919 for (row = 0; row < height; row++) { 920 st->nents++; 921 /* 922 * We don't need the pages, but need to initialize 923 * the entries so the sg list can be happily traversed. 924 * The only thing we need are DMA addresses. 925 */ 926 sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0); 927 sg_dma_address(sg) = 928 i915_gem_object_get_dma_address(obj, src_idx); 929 sg_dma_len(sg) = I915_GTT_PAGE_SIZE; 930 sg = sg_next(sg); 931 src_idx -= src_stride; 932 } 933 934 left = (dst_stride - height) * I915_GTT_PAGE_SIZE; 935 936 if (!left) 937 continue; 938 939 st->nents++; 940 941 /* 942 * The DE ignores the PTEs for the padding tiles, the sg entry 943 * here is just a conenience to indicate how many padding PTEs 944 * to insert at this spot. 945 */ 946 sg_set_page(sg, NULL, left, 0); 947 sg_dma_address(sg) = 0; 948 sg_dma_len(sg) = left; 949 sg = sg_next(sg); 950 } 951 952 return sg; 953 } 954 955 static noinline struct sg_table * 956 intel_rotate_pages(struct intel_rotation_info *rot_info, 957 struct drm_i915_gem_object *obj) 958 { 959 unsigned int size = intel_rotation_info_size(rot_info); 960 struct drm_i915_private *i915 = to_i915(obj->base.dev); 961 struct sg_table *st; 962 struct scatterlist *sg; 963 int ret = -ENOMEM; 964 int i; 965 966 /* Allocate target SG list. */ 967 st = kmalloc(sizeof(*st), GFP_KERNEL); 968 if (!st) 969 goto err_st_alloc; 970 971 ret = sg_alloc_table(st, size, GFP_KERNEL); 972 if (ret) 973 goto err_sg_alloc; 974 975 st->nents = 0; 976 sg = st->sgl; 977 978 for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++) 979 sg = rotate_pages(obj, rot_info->plane[i].offset, 980 rot_info->plane[i].width, rot_info->plane[i].height, 981 rot_info->plane[i].src_stride, 982 rot_info->plane[i].dst_stride, 983 st, sg); 984 985 return st; 986 987 err_sg_alloc: 988 kfree(st); 989 err_st_alloc: 990 991 drm_dbg(&i915->drm, "Failed to create rotated mapping for object size %zu! (%ux%u tiles, %u pages)\n", 992 obj->base.size, rot_info->plane[0].width, 993 rot_info->plane[0].height, size); 994 995 return ERR_PTR(ret); 996 } 997 998 static struct scatterlist * 999 add_padding_pages(unsigned int count, 1000 struct sg_table *st, struct scatterlist *sg) 1001 { 1002 st->nents++; 1003 1004 /* 1005 * The DE ignores the PTEs for the padding tiles, the sg entry 1006 * here is just a convenience to indicate how many padding PTEs 1007 * to insert at this spot. 1008 */ 1009 sg_set_page(sg, NULL, count * I915_GTT_PAGE_SIZE, 0); 1010 sg_dma_address(sg) = 0; 1011 sg_dma_len(sg) = count * I915_GTT_PAGE_SIZE; 1012 sg = sg_next(sg); 1013 1014 return sg; 1015 } 1016 1017 static struct scatterlist * 1018 remap_tiled_color_plane_pages(struct drm_i915_gem_object *obj, 1019 unsigned int offset, unsigned int alignment_pad, 1020 unsigned int width, unsigned int height, 1021 unsigned int src_stride, unsigned int dst_stride, 1022 struct sg_table *st, struct scatterlist *sg, 1023 unsigned int *gtt_offset) 1024 { 1025 unsigned int row; 1026 1027 if (!width || !height) 1028 return sg; 1029 1030 if (alignment_pad) 1031 sg = add_padding_pages(alignment_pad, st, sg); 1032 1033 for (row = 0; row < height; row++) { 1034 unsigned int left = width * I915_GTT_PAGE_SIZE; 1035 1036 while (left) { 1037 dma_addr_t addr; 1038 unsigned int length; 1039 1040 /* 1041 * We don't need the pages, but need to initialize 1042 * the entries so the sg list can be happily traversed. 1043 * The only thing we need are DMA addresses. 1044 */ 1045 1046 addr = i915_gem_object_get_dma_address_len(obj, offset, &length); 1047 1048 length = min(left, length); 1049 1050 st->nents++; 1051 1052 sg_set_page(sg, NULL, length, 0); 1053 sg_dma_address(sg) = addr; 1054 sg_dma_len(sg) = length; 1055 sg = sg_next(sg); 1056 1057 offset += length / I915_GTT_PAGE_SIZE; 1058 left -= length; 1059 } 1060 1061 offset += src_stride - width; 1062 1063 left = (dst_stride - width) * I915_GTT_PAGE_SIZE; 1064 1065 if (!left) 1066 continue; 1067 1068 sg = add_padding_pages(left >> PAGE_SHIFT, st, sg); 1069 } 1070 1071 *gtt_offset += alignment_pad + dst_stride * height; 1072 1073 return sg; 1074 } 1075 1076 static struct scatterlist * 1077 remap_contiguous_pages(struct drm_i915_gem_object *obj, 1078 unsigned int obj_offset, 1079 unsigned int count, 1080 struct sg_table *st, struct scatterlist *sg) 1081 { 1082 struct scatterlist *iter; 1083 unsigned int offset; 1084 1085 iter = i915_gem_object_get_sg_dma(obj, obj_offset, &offset); 1086 GEM_BUG_ON(!iter); 1087 1088 do { 1089 unsigned int len; 1090 1091 len = min(sg_dma_len(iter) - (offset << PAGE_SHIFT), 1092 count << PAGE_SHIFT); 1093 sg_set_page(sg, NULL, len, 0); 1094 sg_dma_address(sg) = 1095 sg_dma_address(iter) + (offset << PAGE_SHIFT); 1096 sg_dma_len(sg) = len; 1097 1098 st->nents++; 1099 count -= len >> PAGE_SHIFT; 1100 if (count == 0) 1101 return sg; 1102 1103 sg = __sg_next(sg); 1104 iter = __sg_next(iter); 1105 offset = 0; 1106 } while (1); 1107 } 1108 1109 static struct scatterlist * 1110 remap_linear_color_plane_pages(struct drm_i915_gem_object *obj, 1111 unsigned int obj_offset, unsigned int alignment_pad, 1112 unsigned int size, 1113 struct sg_table *st, struct scatterlist *sg, 1114 unsigned int *gtt_offset) 1115 { 1116 if (!size) 1117 return sg; 1118 1119 if (alignment_pad) 1120 sg = add_padding_pages(alignment_pad, st, sg); 1121 1122 sg = remap_contiguous_pages(obj, obj_offset, size, st, sg); 1123 sg = sg_next(sg); 1124 1125 *gtt_offset += alignment_pad + size; 1126 1127 return sg; 1128 } 1129 1130 static struct scatterlist * 1131 remap_color_plane_pages(const struct intel_remapped_info *rem_info, 1132 struct drm_i915_gem_object *obj, 1133 int color_plane, 1134 struct sg_table *st, struct scatterlist *sg, 1135 unsigned int *gtt_offset) 1136 { 1137 unsigned int alignment_pad = 0; 1138 1139 if (rem_info->plane_alignment) 1140 alignment_pad = ALIGN(*gtt_offset, rem_info->plane_alignment) - *gtt_offset; 1141 1142 if (rem_info->plane[color_plane].linear) 1143 sg = remap_linear_color_plane_pages(obj, 1144 rem_info->plane[color_plane].offset, 1145 alignment_pad, 1146 rem_info->plane[color_plane].size, 1147 st, sg, 1148 gtt_offset); 1149 1150 else 1151 sg = remap_tiled_color_plane_pages(obj, 1152 rem_info->plane[color_plane].offset, 1153 alignment_pad, 1154 rem_info->plane[color_plane].width, 1155 rem_info->plane[color_plane].height, 1156 rem_info->plane[color_plane].src_stride, 1157 rem_info->plane[color_plane].dst_stride, 1158 st, sg, 1159 gtt_offset); 1160 1161 return sg; 1162 } 1163 1164 static noinline struct sg_table * 1165 intel_remap_pages(struct intel_remapped_info *rem_info, 1166 struct drm_i915_gem_object *obj) 1167 { 1168 unsigned int size = intel_remapped_info_size(rem_info); 1169 struct drm_i915_private *i915 = to_i915(obj->base.dev); 1170 struct sg_table *st; 1171 struct scatterlist *sg; 1172 unsigned int gtt_offset = 0; 1173 int ret = -ENOMEM; 1174 int i; 1175 1176 /* Allocate target SG list. */ 1177 st = kmalloc(sizeof(*st), GFP_KERNEL); 1178 if (!st) 1179 goto err_st_alloc; 1180 1181 ret = sg_alloc_table(st, size, GFP_KERNEL); 1182 if (ret) 1183 goto err_sg_alloc; 1184 1185 st->nents = 0; 1186 sg = st->sgl; 1187 1188 for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) 1189 sg = remap_color_plane_pages(rem_info, obj, i, st, sg, >t_offset); 1190 1191 i915_sg_trim(st); 1192 1193 return st; 1194 1195 err_sg_alloc: 1196 kfree(st); 1197 err_st_alloc: 1198 1199 drm_dbg(&i915->drm, "Failed to create remapped mapping for object size %zu! (%ux%u tiles, %u pages)\n", 1200 obj->base.size, rem_info->plane[0].width, 1201 rem_info->plane[0].height, size); 1202 1203 return ERR_PTR(ret); 1204 } 1205 1206 static noinline struct sg_table * 1207 intel_partial_pages(const struct i915_ggtt_view *view, 1208 struct drm_i915_gem_object *obj) 1209 { 1210 struct sg_table *st; 1211 struct scatterlist *sg; 1212 unsigned int count = view->partial.size; 1213 int ret = -ENOMEM; 1214 1215 st = kmalloc(sizeof(*st), GFP_KERNEL); 1216 if (!st) 1217 goto err_st_alloc; 1218 1219 ret = sg_alloc_table(st, count, GFP_KERNEL); 1220 if (ret) 1221 goto err_sg_alloc; 1222 1223 st->nents = 0; 1224 1225 sg = remap_contiguous_pages(obj, view->partial.offset, count, st, st->sgl); 1226 1227 sg_mark_end(sg); 1228 i915_sg_trim(st); /* Drop any unused tail entries. */ 1229 1230 return st; 1231 1232 err_sg_alloc: 1233 kfree(st); 1234 err_st_alloc: 1235 return ERR_PTR(ret); 1236 } 1237 1238 static int 1239 __i915_vma_get_pages(struct i915_vma *vma) 1240 { 1241 struct sg_table *pages; 1242 1243 /* 1244 * The vma->pages are only valid within the lifespan of the borrowed 1245 * obj->mm.pages. When the obj->mm.pages sg_table is regenerated, so 1246 * must be the vma->pages. A simple rule is that vma->pages must only 1247 * be accessed when the obj->mm.pages are pinned. 1248 */ 1249 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(vma->obj)); 1250 1251 switch (vma->ggtt_view.type) { 1252 default: 1253 GEM_BUG_ON(vma->ggtt_view.type); 1254 fallthrough; 1255 case I915_GGTT_VIEW_NORMAL: 1256 pages = vma->obj->mm.pages; 1257 break; 1258 1259 case I915_GGTT_VIEW_ROTATED: 1260 pages = 1261 intel_rotate_pages(&vma->ggtt_view.rotated, vma->obj); 1262 break; 1263 1264 case I915_GGTT_VIEW_REMAPPED: 1265 pages = 1266 intel_remap_pages(&vma->ggtt_view.remapped, vma->obj); 1267 break; 1268 1269 case I915_GGTT_VIEW_PARTIAL: 1270 pages = intel_partial_pages(&vma->ggtt_view, vma->obj); 1271 break; 1272 } 1273 1274 if (IS_ERR(pages)) { 1275 drm_err(&vma->vm->i915->drm, 1276 "Failed to get pages for VMA view type %u (%ld)!\n", 1277 vma->ggtt_view.type, PTR_ERR(pages)); 1278 return PTR_ERR(pages); 1279 } 1280 1281 vma->pages = pages; 1282 1283 return 0; 1284 } 1285 1286 I915_SELFTEST_EXPORT int i915_vma_get_pages(struct i915_vma *vma) 1287 { 1288 int err; 1289 1290 if (atomic_add_unless(&vma->pages_count, 1, 0)) 1291 return 0; 1292 1293 err = i915_gem_object_pin_pages(vma->obj); 1294 if (err) 1295 return err; 1296 1297 err = __i915_vma_get_pages(vma); 1298 if (err) 1299 goto err_unpin; 1300 1301 vma->page_sizes = vma->obj->mm.page_sizes; 1302 atomic_inc(&vma->pages_count); 1303 1304 return 0; 1305 1306 err_unpin: 1307 __i915_gem_object_unpin_pages(vma->obj); 1308 1309 return err; 1310 } 1311 1312 static void __vma_put_pages(struct i915_vma *vma, unsigned int count) 1313 { 1314 /* We allocate under vma_get_pages, so beware the shrinker */ 1315 GEM_BUG_ON(atomic_read(&vma->pages_count) < count); 1316 1317 if (atomic_sub_return(count, &vma->pages_count) == 0) { 1318 if (vma->pages != vma->obj->mm.pages) { 1319 sg_free_table(vma->pages); 1320 kfree(vma->pages); 1321 } 1322 vma->pages = NULL; 1323 1324 i915_gem_object_unpin_pages(vma->obj); 1325 } 1326 } 1327 1328 I915_SELFTEST_EXPORT void i915_vma_put_pages(struct i915_vma *vma) 1329 { 1330 if (atomic_add_unless(&vma->pages_count, -1, 1)) 1331 return; 1332 1333 __vma_put_pages(vma, 1); 1334 } 1335 1336 static void vma_unbind_pages(struct i915_vma *vma) 1337 { 1338 unsigned int count; 1339 1340 lockdep_assert_held(&vma->vm->mutex); 1341 1342 /* The upper portion of pages_count is the number of bindings */ 1343 count = atomic_read(&vma->pages_count); 1344 count >>= I915_VMA_PAGES_BIAS; 1345 GEM_BUG_ON(!count); 1346 1347 __vma_put_pages(vma, count | count << I915_VMA_PAGES_BIAS); 1348 } 1349 1350 int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww, 1351 u64 size, u64 alignment, u64 flags) 1352 { 1353 struct i915_vma_work *work = NULL; 1354 struct dma_fence *moving = NULL; 1355 struct i915_vma_resource *vma_res = NULL; 1356 intel_wakeref_t wakeref = 0; 1357 unsigned int bound; 1358 int err; 1359 1360 assert_vma_held(vma); 1361 GEM_BUG_ON(!ww); 1362 1363 BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND); 1364 BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND); 1365 1366 GEM_BUG_ON(!(flags & (PIN_USER | PIN_GLOBAL))); 1367 1368 /* First try and grab the pin without rebinding the vma */ 1369 if (try_qad_pin(vma, flags)) 1370 return 0; 1371 1372 err = i915_vma_get_pages(vma); 1373 if (err) 1374 return err; 1375 1376 if (flags & PIN_GLOBAL) 1377 wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm); 1378 1379 if (flags & vma->vm->bind_async_flags) { 1380 /* lock VM */ 1381 err = i915_vm_lock_objects(vma->vm, ww); 1382 if (err) 1383 goto err_rpm; 1384 1385 work = i915_vma_work(); 1386 if (!work) { 1387 err = -ENOMEM; 1388 goto err_rpm; 1389 } 1390 1391 work->vm = vma->vm; 1392 1393 err = i915_gem_object_get_moving_fence(vma->obj, &moving); 1394 if (err) 1395 goto err_rpm; 1396 1397 dma_fence_work_chain(&work->base, moving); 1398 1399 /* Allocate enough page directories to used PTE */ 1400 if (vma->vm->allocate_va_range) { 1401 err = i915_vm_alloc_pt_stash(vma->vm, 1402 &work->stash, 1403 vma->size); 1404 if (err) 1405 goto err_fence; 1406 1407 err = i915_vm_map_pt_stash(vma->vm, &work->stash); 1408 if (err) 1409 goto err_fence; 1410 } 1411 } 1412 1413 vma_res = i915_vma_resource_alloc(); 1414 if (IS_ERR(vma_res)) { 1415 err = PTR_ERR(vma_res); 1416 goto err_fence; 1417 } 1418 1419 /* 1420 * Differentiate between user/kernel vma inside the aliasing-ppgtt. 1421 * 1422 * We conflate the Global GTT with the user's vma when using the 1423 * aliasing-ppgtt, but it is still vitally important to try and 1424 * keep the use cases distinct. For example, userptr objects are 1425 * not allowed inside the Global GTT as that will cause lock 1426 * inversions when we have to evict them the mmu_notifier callbacks - 1427 * but they are allowed to be part of the user ppGTT which can never 1428 * be mapped. As such we try to give the distinct users of the same 1429 * mutex, distinct lockclasses [equivalent to how we keep i915_ggtt 1430 * and i915_ppgtt separate]. 1431 * 1432 * NB this may cause us to mask real lock inversions -- while the 1433 * code is safe today, lockdep may not be able to spot future 1434 * transgressions. 1435 */ 1436 err = mutex_lock_interruptible_nested(&vma->vm->mutex, 1437 !(flags & PIN_GLOBAL)); 1438 if (err) 1439 goto err_vma_res; 1440 1441 /* No more allocations allowed now we hold vm->mutex */ 1442 1443 if (unlikely(i915_vma_is_closed(vma))) { 1444 err = -ENOENT; 1445 goto err_unlock; 1446 } 1447 1448 bound = atomic_read(&vma->flags); 1449 if (unlikely(bound & I915_VMA_ERROR)) { 1450 err = -ENOMEM; 1451 goto err_unlock; 1452 } 1453 1454 if (unlikely(!((bound + 1) & I915_VMA_PIN_MASK))) { 1455 err = -EAGAIN; /* pins are meant to be fairly temporary */ 1456 goto err_unlock; 1457 } 1458 1459 if (unlikely(!(flags & ~bound & I915_VMA_BIND_MASK))) { 1460 if (!(flags & PIN_VALIDATE)) 1461 __i915_vma_pin(vma); 1462 goto err_unlock; 1463 } 1464 1465 err = i915_active_acquire(&vma->active); 1466 if (err) 1467 goto err_unlock; 1468 1469 if (!(bound & I915_VMA_BIND_MASK)) { 1470 err = i915_vma_insert(vma, ww, size, alignment, flags); 1471 if (err) 1472 goto err_active; 1473 1474 if (i915_is_ggtt(vma->vm)) 1475 __i915_vma_set_map_and_fenceable(vma); 1476 } 1477 1478 GEM_BUG_ON(!vma->pages); 1479 err = i915_vma_bind(vma, 1480 vma->obj->cache_level, 1481 flags, work, vma_res); 1482 vma_res = NULL; 1483 if (err) 1484 goto err_remove; 1485 1486 /* There should only be at most 2 active bindings (user, global) */ 1487 GEM_BUG_ON(bound + I915_VMA_PAGES_ACTIVE < bound); 1488 atomic_add(I915_VMA_PAGES_ACTIVE, &vma->pages_count); 1489 list_move_tail(&vma->vm_link, &vma->vm->bound_list); 1490 1491 if (!(flags & PIN_VALIDATE)) { 1492 __i915_vma_pin(vma); 1493 GEM_BUG_ON(!i915_vma_is_pinned(vma)); 1494 } 1495 GEM_BUG_ON(!i915_vma_is_bound(vma, flags)); 1496 GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags)); 1497 1498 err_remove: 1499 if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) { 1500 i915_vma_detach(vma); 1501 drm_mm_remove_node(&vma->node); 1502 } 1503 err_active: 1504 i915_active_release(&vma->active); 1505 err_unlock: 1506 mutex_unlock(&vma->vm->mutex); 1507 err_vma_res: 1508 i915_vma_resource_free(vma_res); 1509 err_fence: 1510 if (work) 1511 dma_fence_work_commit_imm(&work->base); 1512 err_rpm: 1513 if (wakeref) 1514 intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref); 1515 1516 if (moving) 1517 dma_fence_put(moving); 1518 1519 i915_vma_put_pages(vma); 1520 return err; 1521 } 1522 1523 static void flush_idle_contexts(struct intel_gt *gt) 1524 { 1525 struct intel_engine_cs *engine; 1526 enum intel_engine_id id; 1527 1528 for_each_engine(engine, gt, id) 1529 intel_engine_flush_barriers(engine); 1530 1531 intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT); 1532 } 1533 1534 static int __i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww, 1535 u32 align, unsigned int flags) 1536 { 1537 struct i915_address_space *vm = vma->vm; 1538 int err; 1539 1540 do { 1541 err = i915_vma_pin_ww(vma, ww, 0, align, flags | PIN_GLOBAL); 1542 1543 if (err != -ENOSPC) { 1544 if (!err) { 1545 err = i915_vma_wait_for_bind(vma); 1546 if (err) 1547 i915_vma_unpin(vma); 1548 } 1549 return err; 1550 } 1551 1552 /* Unlike i915_vma_pin, we don't take no for an answer! */ 1553 flush_idle_contexts(vm->gt); 1554 if (mutex_lock_interruptible(&vm->mutex) == 0) { 1555 /* 1556 * We pass NULL ww here, as we don't want to unbind 1557 * locked objects when called from execbuf when pinning 1558 * is removed. This would probably regress badly. 1559 */ 1560 i915_gem_evict_vm(vm, NULL); 1561 mutex_unlock(&vm->mutex); 1562 } 1563 } while (1); 1564 } 1565 1566 int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww, 1567 u32 align, unsigned int flags) 1568 { 1569 struct i915_gem_ww_ctx _ww; 1570 int err; 1571 1572 GEM_BUG_ON(!i915_vma_is_ggtt(vma)); 1573 1574 if (ww) 1575 return __i915_ggtt_pin(vma, ww, align, flags); 1576 1577 lockdep_assert_not_held(&vma->obj->base.resv->lock.base); 1578 1579 for_i915_gem_ww(&_ww, err, true) { 1580 err = i915_gem_object_lock(vma->obj, &_ww); 1581 if (!err) 1582 err = __i915_ggtt_pin(vma, &_ww, align, flags); 1583 } 1584 1585 return err; 1586 } 1587 1588 static void __vma_close(struct i915_vma *vma, struct intel_gt *gt) 1589 { 1590 /* 1591 * We defer actually closing, unbinding and destroying the VMA until 1592 * the next idle point, or if the object is freed in the meantime. By 1593 * postponing the unbind, we allow for it to be resurrected by the 1594 * client, avoiding the work required to rebind the VMA. This is 1595 * advantageous for DRI, where the client/server pass objects 1596 * between themselves, temporarily opening a local VMA to the 1597 * object, and then closing it again. The same object is then reused 1598 * on the next frame (or two, depending on the depth of the swap queue) 1599 * causing us to rebind the VMA once more. This ends up being a lot 1600 * of wasted work for the steady state. 1601 */ 1602 GEM_BUG_ON(i915_vma_is_closed(vma)); 1603 list_add(&vma->closed_link, >->closed_vma); 1604 } 1605 1606 void i915_vma_close(struct i915_vma *vma) 1607 { 1608 struct intel_gt *gt = vma->vm->gt; 1609 unsigned long flags; 1610 1611 if (i915_vma_is_ggtt(vma)) 1612 return; 1613 1614 GEM_BUG_ON(!atomic_read(&vma->open_count)); 1615 if (atomic_dec_and_lock_irqsave(&vma->open_count, 1616 >->closed_lock, 1617 flags)) { 1618 __vma_close(vma, gt); 1619 spin_unlock_irqrestore(>->closed_lock, flags); 1620 } 1621 } 1622 1623 static void __i915_vma_remove_closed(struct i915_vma *vma) 1624 { 1625 list_del_init(&vma->closed_link); 1626 } 1627 1628 void i915_vma_reopen(struct i915_vma *vma) 1629 { 1630 struct intel_gt *gt = vma->vm->gt; 1631 1632 spin_lock_irq(>->closed_lock); 1633 if (i915_vma_is_closed(vma)) 1634 __i915_vma_remove_closed(vma); 1635 spin_unlock_irq(>->closed_lock); 1636 } 1637 1638 static void force_unbind(struct i915_vma *vma) 1639 { 1640 if (!drm_mm_node_allocated(&vma->node)) 1641 return; 1642 1643 atomic_and(~I915_VMA_PIN_MASK, &vma->flags); 1644 WARN_ON(__i915_vma_unbind(vma)); 1645 GEM_BUG_ON(drm_mm_node_allocated(&vma->node)); 1646 } 1647 1648 static void release_references(struct i915_vma *vma, bool vm_ddestroy) 1649 { 1650 struct drm_i915_gem_object *obj = vma->obj; 1651 struct intel_gt *gt = vma->vm->gt; 1652 1653 GEM_BUG_ON(i915_vma_is_active(vma)); 1654 1655 spin_lock(&obj->vma.lock); 1656 list_del(&vma->obj_link); 1657 if (!RB_EMPTY_NODE(&vma->obj_node)) 1658 rb_erase(&vma->obj_node, &obj->vma.tree); 1659 1660 spin_unlock(&obj->vma.lock); 1661 1662 spin_lock_irq(>->closed_lock); 1663 __i915_vma_remove_closed(vma); 1664 spin_unlock_irq(>->closed_lock); 1665 1666 if (vm_ddestroy) 1667 i915_vm_resv_put(vma->vm); 1668 1669 i915_active_fini(&vma->active); 1670 GEM_WARN_ON(vma->resource); 1671 i915_vma_free(vma); 1672 } 1673 1674 /** 1675 * i915_vma_destroy_locked - Remove all weak reference to the vma and put 1676 * the initial reference. 1677 * 1678 * This function should be called when it's decided the vma isn't needed 1679 * anymore. The caller must assure that it doesn't race with another lookup 1680 * plus destroy, typically by taking an appropriate reference. 1681 * 1682 * Current callsites are 1683 * - __i915_gem_object_pages_fini() 1684 * - __i915_vm_close() - Blocks the above function by taking a reference on 1685 * the object. 1686 * - __i915_vma_parked() - Blocks the above functions by taking a reference 1687 * on the vm and a reference on the object. Also takes the object lock so 1688 * destruction from __i915_vma_parked() can be blocked by holding the 1689 * object lock. Since the object lock is only allowed from within i915 with 1690 * an object refcount, holding the object lock also implicitly blocks the 1691 * vma freeing from __i915_gem_object_pages_fini(). 1692 * 1693 * Because of locks taken during destruction, a vma is also guaranteed to 1694 * stay alive while the following locks are held if it was looked up while 1695 * holding one of the locks: 1696 * - vm->mutex 1697 * - obj->vma.lock 1698 * - gt->closed_lock 1699 */ 1700 void i915_vma_destroy_locked(struct i915_vma *vma) 1701 { 1702 lockdep_assert_held(&vma->vm->mutex); 1703 1704 force_unbind(vma); 1705 list_del_init(&vma->vm_link); 1706 release_references(vma, false); 1707 } 1708 1709 void i915_vma_destroy(struct i915_vma *vma) 1710 { 1711 bool vm_ddestroy; 1712 1713 mutex_lock(&vma->vm->mutex); 1714 force_unbind(vma); 1715 list_del_init(&vma->vm_link); 1716 vm_ddestroy = vma->vm_ddestroy; 1717 vma->vm_ddestroy = false; 1718 mutex_unlock(&vma->vm->mutex); 1719 release_references(vma, vm_ddestroy); 1720 } 1721 1722 void i915_vma_parked(struct intel_gt *gt) 1723 { 1724 struct i915_vma *vma, *next; 1725 LIST_HEAD(closed); 1726 1727 spin_lock_irq(>->closed_lock); 1728 list_for_each_entry_safe(vma, next, >->closed_vma, closed_link) { 1729 struct drm_i915_gem_object *obj = vma->obj; 1730 struct i915_address_space *vm = vma->vm; 1731 1732 /* XXX All to avoid keeping a reference on i915_vma itself */ 1733 1734 if (!kref_get_unless_zero(&obj->base.refcount)) 1735 continue; 1736 1737 if (!i915_vm_tryget(vm)) { 1738 i915_gem_object_put(obj); 1739 continue; 1740 } 1741 1742 list_move(&vma->closed_link, &closed); 1743 } 1744 spin_unlock_irq(>->closed_lock); 1745 1746 /* As the GT is held idle, no vma can be reopened as we destroy them */ 1747 list_for_each_entry_safe(vma, next, &closed, closed_link) { 1748 struct drm_i915_gem_object *obj = vma->obj; 1749 struct i915_address_space *vm = vma->vm; 1750 1751 if (i915_gem_object_trylock(obj, NULL)) { 1752 INIT_LIST_HEAD(&vma->closed_link); 1753 i915_vma_destroy(vma); 1754 i915_gem_object_unlock(obj); 1755 } else { 1756 /* back you go.. */ 1757 spin_lock_irq(>->closed_lock); 1758 list_add(&vma->closed_link, >->closed_vma); 1759 spin_unlock_irq(>->closed_lock); 1760 } 1761 1762 i915_gem_object_put(obj); 1763 i915_vm_put(vm); 1764 } 1765 } 1766 1767 static void __i915_vma_iounmap(struct i915_vma *vma) 1768 { 1769 GEM_BUG_ON(i915_vma_is_pinned(vma)); 1770 1771 if (vma->iomap == NULL) 1772 return; 1773 1774 if (page_unmask_bits(vma->iomap)) 1775 __i915_gem_object_release_map(vma->obj); 1776 else 1777 io_mapping_unmap(vma->iomap); 1778 vma->iomap = NULL; 1779 } 1780 1781 void i915_vma_revoke_mmap(struct i915_vma *vma) 1782 { 1783 struct drm_vma_offset_node *node; 1784 u64 vma_offset; 1785 1786 if (!i915_vma_has_userfault(vma)) 1787 return; 1788 1789 GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma)); 1790 GEM_BUG_ON(!vma->obj->userfault_count); 1791 1792 node = &vma->mmo->vma_node; 1793 vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT; 1794 unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping, 1795 drm_vma_node_offset_addr(node) + vma_offset, 1796 vma->size, 1797 1); 1798 1799 i915_vma_unset_userfault(vma); 1800 if (!--vma->obj->userfault_count) 1801 list_del(&vma->obj->userfault_link); 1802 } 1803 1804 static int 1805 __i915_request_await_bind(struct i915_request *rq, struct i915_vma *vma) 1806 { 1807 return __i915_request_await_exclusive(rq, &vma->active); 1808 } 1809 1810 static int __i915_vma_move_to_active(struct i915_vma *vma, struct i915_request *rq) 1811 { 1812 int err; 1813 1814 /* Wait for the vma to be bound before we start! */ 1815 err = __i915_request_await_bind(rq, vma); 1816 if (err) 1817 return err; 1818 1819 return i915_active_add_request(&vma->active, rq); 1820 } 1821 1822 int _i915_vma_move_to_active(struct i915_vma *vma, 1823 struct i915_request *rq, 1824 struct dma_fence *fence, 1825 unsigned int flags) 1826 { 1827 struct drm_i915_gem_object *obj = vma->obj; 1828 int err; 1829 1830 assert_object_held(obj); 1831 1832 GEM_BUG_ON(!vma->pages); 1833 1834 err = __i915_vma_move_to_active(vma, rq); 1835 if (unlikely(err)) 1836 return err; 1837 1838 /* 1839 * Reserve fences slot early to prevent an allocation after preparing 1840 * the workload and associating fences with dma_resv. 1841 */ 1842 if (fence && !(flags & __EXEC_OBJECT_NO_RESERVE)) { 1843 struct dma_fence *curr; 1844 int idx; 1845 1846 dma_fence_array_for_each(curr, idx, fence) 1847 ; 1848 err = dma_resv_reserve_fences(vma->obj->base.resv, idx); 1849 if (unlikely(err)) 1850 return err; 1851 } 1852 1853 if (flags & EXEC_OBJECT_WRITE) { 1854 struct intel_frontbuffer *front; 1855 1856 front = __intel_frontbuffer_get(obj); 1857 if (unlikely(front)) { 1858 if (intel_frontbuffer_invalidate(front, ORIGIN_CS)) 1859 i915_active_add_request(&front->write, rq); 1860 intel_frontbuffer_put(front); 1861 } 1862 } 1863 1864 if (fence) { 1865 struct dma_fence *curr; 1866 enum dma_resv_usage usage; 1867 int idx; 1868 1869 obj->read_domains = 0; 1870 if (flags & EXEC_OBJECT_WRITE) { 1871 usage = DMA_RESV_USAGE_WRITE; 1872 obj->write_domain = I915_GEM_DOMAIN_RENDER; 1873 } else { 1874 usage = DMA_RESV_USAGE_READ; 1875 } 1876 1877 dma_fence_array_for_each(curr, idx, fence) 1878 dma_resv_add_fence(vma->obj->base.resv, curr, usage); 1879 } 1880 1881 if (flags & EXEC_OBJECT_NEEDS_FENCE && vma->fence) 1882 i915_active_add_request(&vma->fence->active, rq); 1883 1884 obj->read_domains |= I915_GEM_GPU_DOMAINS; 1885 obj->mm.dirty = true; 1886 1887 GEM_BUG_ON(!i915_vma_is_active(vma)); 1888 return 0; 1889 } 1890 1891 struct dma_fence *__i915_vma_evict(struct i915_vma *vma, bool async) 1892 { 1893 struct i915_vma_resource *vma_res = vma->resource; 1894 struct dma_fence *unbind_fence; 1895 1896 GEM_BUG_ON(i915_vma_is_pinned(vma)); 1897 assert_vma_held_evict(vma); 1898 1899 if (i915_vma_is_map_and_fenceable(vma)) { 1900 /* Force a pagefault for domain tracking on next user access */ 1901 i915_vma_revoke_mmap(vma); 1902 1903 /* 1904 * Check that we have flushed all writes through the GGTT 1905 * before the unbind, other due to non-strict nature of those 1906 * indirect writes they may end up referencing the GGTT PTE 1907 * after the unbind. 1908 * 1909 * Note that we may be concurrently poking at the GGTT_WRITE 1910 * bit from set-domain, as we mark all GGTT vma associated 1911 * with an object. We know this is for another vma, as we 1912 * are currently unbinding this one -- so if this vma will be 1913 * reused, it will be refaulted and have its dirty bit set 1914 * before the next write. 1915 */ 1916 i915_vma_flush_writes(vma); 1917 1918 /* release the fence reg _after_ flushing */ 1919 i915_vma_revoke_fence(vma); 1920 1921 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma)); 1922 } 1923 1924 __i915_vma_iounmap(vma); 1925 1926 GEM_BUG_ON(vma->fence); 1927 GEM_BUG_ON(i915_vma_has_userfault(vma)); 1928 1929 /* Object backend must be async capable. */ 1930 GEM_WARN_ON(async && !vma->resource->bi.pages_rsgt); 1931 1932 /* If vm is not open, unbind is a nop. */ 1933 vma_res->needs_wakeref = i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND) && 1934 kref_read(&vma->vm->ref); 1935 vma_res->skip_pte_rewrite = !kref_read(&vma->vm->ref) || 1936 vma->vm->skip_pte_rewrite; 1937 trace_i915_vma_unbind(vma); 1938 1939 unbind_fence = i915_vma_resource_unbind(vma_res); 1940 vma->resource = NULL; 1941 1942 atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR | I915_VMA_GGTT_WRITE), 1943 &vma->flags); 1944 1945 i915_vma_detach(vma); 1946 1947 if (!async && unbind_fence) { 1948 dma_fence_wait(unbind_fence, false); 1949 dma_fence_put(unbind_fence); 1950 unbind_fence = NULL; 1951 } 1952 1953 /* 1954 * Binding itself may not have completed until the unbind fence signals, 1955 * so don't drop the pages until that happens, unless the resource is 1956 * async_capable. 1957 */ 1958 1959 vma_unbind_pages(vma); 1960 return unbind_fence; 1961 } 1962 1963 int __i915_vma_unbind(struct i915_vma *vma) 1964 { 1965 int ret; 1966 1967 lockdep_assert_held(&vma->vm->mutex); 1968 assert_vma_held_evict(vma); 1969 1970 if (!drm_mm_node_allocated(&vma->node)) 1971 return 0; 1972 1973 if (i915_vma_is_pinned(vma)) { 1974 vma_print_allocator(vma, "is pinned"); 1975 return -EAGAIN; 1976 } 1977 1978 /* 1979 * After confirming that no one else is pinning this vma, wait for 1980 * any laggards who may have crept in during the wait (through 1981 * a residual pin skipping the vm->mutex) to complete. 1982 */ 1983 ret = i915_vma_sync(vma); 1984 if (ret) 1985 return ret; 1986 1987 GEM_BUG_ON(i915_vma_is_active(vma)); 1988 __i915_vma_evict(vma, false); 1989 1990 drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */ 1991 return 0; 1992 } 1993 1994 static struct dma_fence *__i915_vma_unbind_async(struct i915_vma *vma) 1995 { 1996 struct dma_fence *fence; 1997 1998 lockdep_assert_held(&vma->vm->mutex); 1999 2000 if (!drm_mm_node_allocated(&vma->node)) 2001 return NULL; 2002 2003 if (i915_vma_is_pinned(vma) || 2004 &vma->obj->mm.rsgt->table != vma->resource->bi.pages) 2005 return ERR_PTR(-EAGAIN); 2006 2007 /* 2008 * We probably need to replace this with awaiting the fences of the 2009 * object's dma_resv when the vma active goes away. When doing that 2010 * we need to be careful to not add the vma_resource unbind fence 2011 * immediately to the object's dma_resv, because then unbinding 2012 * the next vma from the object, in case there are many, will 2013 * actually await the unbinding of the previous vmas, which is 2014 * undesirable. 2015 */ 2016 if (i915_sw_fence_await_active(&vma->resource->chain, &vma->active, 2017 I915_ACTIVE_AWAIT_EXCL | 2018 I915_ACTIVE_AWAIT_ACTIVE) < 0) { 2019 return ERR_PTR(-EBUSY); 2020 } 2021 2022 fence = __i915_vma_evict(vma, true); 2023 2024 drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */ 2025 2026 return fence; 2027 } 2028 2029 int i915_vma_unbind(struct i915_vma *vma) 2030 { 2031 struct i915_address_space *vm = vma->vm; 2032 intel_wakeref_t wakeref = 0; 2033 int err; 2034 2035 assert_object_held_shared(vma->obj); 2036 2037 /* Optimistic wait before taking the mutex */ 2038 err = i915_vma_sync(vma); 2039 if (err) 2040 return err; 2041 2042 if (!drm_mm_node_allocated(&vma->node)) 2043 return 0; 2044 2045 if (i915_vma_is_pinned(vma)) { 2046 vma_print_allocator(vma, "is pinned"); 2047 return -EAGAIN; 2048 } 2049 2050 if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND)) 2051 /* XXX not always required: nop_clear_range */ 2052 wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm); 2053 2054 err = mutex_lock_interruptible_nested(&vma->vm->mutex, !wakeref); 2055 if (err) 2056 goto out_rpm; 2057 2058 err = __i915_vma_unbind(vma); 2059 mutex_unlock(&vm->mutex); 2060 2061 out_rpm: 2062 if (wakeref) 2063 intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref); 2064 return err; 2065 } 2066 2067 int i915_vma_unbind_async(struct i915_vma *vma, bool trylock_vm) 2068 { 2069 struct drm_i915_gem_object *obj = vma->obj; 2070 struct i915_address_space *vm = vma->vm; 2071 intel_wakeref_t wakeref = 0; 2072 struct dma_fence *fence; 2073 int err; 2074 2075 /* 2076 * We need the dma-resv lock since we add the 2077 * unbind fence to the dma-resv object. 2078 */ 2079 assert_object_held(obj); 2080 2081 if (!drm_mm_node_allocated(&vma->node)) 2082 return 0; 2083 2084 if (i915_vma_is_pinned(vma)) { 2085 vma_print_allocator(vma, "is pinned"); 2086 return -EAGAIN; 2087 } 2088 2089 if (!obj->mm.rsgt) 2090 return -EBUSY; 2091 2092 err = dma_resv_reserve_fences(obj->base.resv, 1); 2093 if (err) 2094 return -EBUSY; 2095 2096 /* 2097 * It would be great if we could grab this wakeref from the 2098 * async unbind work if needed, but we can't because it uses 2099 * kmalloc and it's in the dma-fence signalling critical path. 2100 */ 2101 if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND)) 2102 wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm); 2103 2104 if (trylock_vm && !mutex_trylock(&vm->mutex)) { 2105 err = -EBUSY; 2106 goto out_rpm; 2107 } else if (!trylock_vm) { 2108 err = mutex_lock_interruptible_nested(&vm->mutex, !wakeref); 2109 if (err) 2110 goto out_rpm; 2111 } 2112 2113 fence = __i915_vma_unbind_async(vma); 2114 mutex_unlock(&vm->mutex); 2115 if (IS_ERR_OR_NULL(fence)) { 2116 err = PTR_ERR_OR_ZERO(fence); 2117 goto out_rpm; 2118 } 2119 2120 dma_resv_add_fence(obj->base.resv, fence, DMA_RESV_USAGE_READ); 2121 dma_fence_put(fence); 2122 2123 out_rpm: 2124 if (wakeref) 2125 intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref); 2126 return err; 2127 } 2128 2129 int i915_vma_unbind_unlocked(struct i915_vma *vma) 2130 { 2131 int err; 2132 2133 i915_gem_object_lock(vma->obj, NULL); 2134 err = i915_vma_unbind(vma); 2135 i915_gem_object_unlock(vma->obj); 2136 2137 return err; 2138 } 2139 2140 struct i915_vma *i915_vma_make_unshrinkable(struct i915_vma *vma) 2141 { 2142 i915_gem_object_make_unshrinkable(vma->obj); 2143 return vma; 2144 } 2145 2146 void i915_vma_make_shrinkable(struct i915_vma *vma) 2147 { 2148 i915_gem_object_make_shrinkable(vma->obj); 2149 } 2150 2151 void i915_vma_make_purgeable(struct i915_vma *vma) 2152 { 2153 i915_gem_object_make_purgeable(vma->obj); 2154 } 2155 2156 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) 2157 #include "selftests/i915_vma.c" 2158 #endif 2159 2160 void i915_vma_module_exit(void) 2161 { 2162 kmem_cache_destroy(slab_vmas); 2163 } 2164 2165 int __init i915_vma_module_init(void) 2166 { 2167 slab_vmas = KMEM_CACHE(i915_vma, SLAB_HWCACHE_ALIGN); 2168 if (!slab_vmas) 2169 return -ENOMEM; 2170 2171 return 0; 2172 } 2173