1 /* 2 * Copyright © 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #include <linux/sched/mm.h> 26 #include <drm/drm_gem.h> 27 28 #include "display/intel_frontbuffer.h" 29 30 #include "gt/intel_engine.h" 31 #include "gt/intel_engine_heartbeat.h" 32 #include "gt/intel_gt.h" 33 #include "gt/intel_gt_requests.h" 34 35 #include "i915_drv.h" 36 #include "i915_globals.h" 37 #include "i915_sw_fence_work.h" 38 #include "i915_trace.h" 39 #include "i915_vma.h" 40 41 static struct i915_global_vma { 42 struct i915_global base; 43 struct kmem_cache *slab_vmas; 44 } global; 45 46 struct i915_vma *i915_vma_alloc(void) 47 { 48 return kmem_cache_zalloc(global.slab_vmas, GFP_KERNEL); 49 } 50 51 void i915_vma_free(struct i915_vma *vma) 52 { 53 return kmem_cache_free(global.slab_vmas, vma); 54 } 55 56 #if IS_ENABLED(CONFIG_DRM_I915_ERRLOG_GEM) && IS_ENABLED(CONFIG_DRM_DEBUG_MM) 57 58 #include <linux/stackdepot.h> 59 60 static void vma_print_allocator(struct i915_vma *vma, const char *reason) 61 { 62 unsigned long *entries; 63 unsigned int nr_entries; 64 char buf[512]; 65 66 if (!vma->node.stack) { 67 DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n", 68 vma->node.start, vma->node.size, reason); 69 return; 70 } 71 72 nr_entries = stack_depot_fetch(vma->node.stack, &entries); 73 stack_trace_snprint(buf, sizeof(buf), entries, nr_entries, 0); 74 DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n", 75 vma->node.start, vma->node.size, reason, buf); 76 } 77 78 #else 79 80 static void vma_print_allocator(struct i915_vma *vma, const char *reason) 81 { 82 } 83 84 #endif 85 86 static inline struct i915_vma *active_to_vma(struct i915_active *ref) 87 { 88 return container_of(ref, typeof(struct i915_vma), active); 89 } 90 91 static int __i915_vma_active(struct i915_active *ref) 92 { 93 return i915_vma_tryget(active_to_vma(ref)) ? 0 : -ENOENT; 94 } 95 96 __i915_active_call 97 static void __i915_vma_retire(struct i915_active *ref) 98 { 99 i915_vma_put(active_to_vma(ref)); 100 } 101 102 static struct i915_vma * 103 vma_create(struct drm_i915_gem_object *obj, 104 struct i915_address_space *vm, 105 const struct i915_ggtt_view *view) 106 { 107 struct i915_vma *pos = ERR_PTR(-E2BIG); 108 struct i915_vma *vma; 109 struct rb_node *rb, **p; 110 111 /* The aliasing_ppgtt should never be used directly! */ 112 GEM_BUG_ON(vm == &vm->gt->ggtt->alias->vm); 113 114 vma = i915_vma_alloc(); 115 if (vma == NULL) 116 return ERR_PTR(-ENOMEM); 117 118 kref_init(&vma->ref); 119 mutex_init(&vma->pages_mutex); 120 vma->vm = i915_vm_get(vm); 121 vma->ops = &vm->vma_ops; 122 vma->obj = obj; 123 vma->resv = obj->base.resv; 124 vma->size = obj->base.size; 125 vma->display_alignment = I915_GTT_MIN_ALIGNMENT; 126 127 i915_active_init(&vma->active, __i915_vma_active, __i915_vma_retire); 128 129 /* Declare ourselves safe for use inside shrinkers */ 130 if (IS_ENABLED(CONFIG_LOCKDEP)) { 131 fs_reclaim_acquire(GFP_KERNEL); 132 might_lock(&vma->active.mutex); 133 fs_reclaim_release(GFP_KERNEL); 134 } 135 136 INIT_LIST_HEAD(&vma->closed_link); 137 138 if (view && view->type != I915_GGTT_VIEW_NORMAL) { 139 vma->ggtt_view = *view; 140 if (view->type == I915_GGTT_VIEW_PARTIAL) { 141 GEM_BUG_ON(range_overflows_t(u64, 142 view->partial.offset, 143 view->partial.size, 144 obj->base.size >> PAGE_SHIFT)); 145 vma->size = view->partial.size; 146 vma->size <<= PAGE_SHIFT; 147 GEM_BUG_ON(vma->size > obj->base.size); 148 } else if (view->type == I915_GGTT_VIEW_ROTATED) { 149 vma->size = intel_rotation_info_size(&view->rotated); 150 vma->size <<= PAGE_SHIFT; 151 } else if (view->type == I915_GGTT_VIEW_REMAPPED) { 152 vma->size = intel_remapped_info_size(&view->remapped); 153 vma->size <<= PAGE_SHIFT; 154 } 155 } 156 157 if (unlikely(vma->size > vm->total)) 158 goto err_vma; 159 160 GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE)); 161 162 spin_lock(&obj->vma.lock); 163 164 if (i915_is_ggtt(vm)) { 165 if (unlikely(overflows_type(vma->size, u32))) 166 goto err_unlock; 167 168 vma->fence_size = i915_gem_fence_size(vm->i915, vma->size, 169 i915_gem_object_get_tiling(obj), 170 i915_gem_object_get_stride(obj)); 171 if (unlikely(vma->fence_size < vma->size || /* overflow */ 172 vma->fence_size > vm->total)) 173 goto err_unlock; 174 175 GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT)); 176 177 vma->fence_alignment = i915_gem_fence_alignment(vm->i915, vma->size, 178 i915_gem_object_get_tiling(obj), 179 i915_gem_object_get_stride(obj)); 180 GEM_BUG_ON(!is_power_of_2(vma->fence_alignment)); 181 182 __set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma)); 183 } 184 185 rb = NULL; 186 p = &obj->vma.tree.rb_node; 187 while (*p) { 188 long cmp; 189 190 rb = *p; 191 pos = rb_entry(rb, struct i915_vma, obj_node); 192 193 /* 194 * If the view already exists in the tree, another thread 195 * already created a matching vma, so return the older instance 196 * and dispose of ours. 197 */ 198 cmp = i915_vma_compare(pos, vm, view); 199 if (cmp < 0) 200 p = &rb->rb_right; 201 else if (cmp > 0) 202 p = &rb->rb_left; 203 else 204 goto err_unlock; 205 } 206 rb_link_node(&vma->obj_node, rb, p); 207 rb_insert_color(&vma->obj_node, &obj->vma.tree); 208 209 if (i915_vma_is_ggtt(vma)) 210 /* 211 * We put the GGTT vma at the start of the vma-list, followed 212 * by the ppGGTT vma. This allows us to break early when 213 * iterating over only the GGTT vma for an object, see 214 * for_each_ggtt_vma() 215 */ 216 list_add(&vma->obj_link, &obj->vma.list); 217 else 218 list_add_tail(&vma->obj_link, &obj->vma.list); 219 220 spin_unlock(&obj->vma.lock); 221 222 return vma; 223 224 err_unlock: 225 spin_unlock(&obj->vma.lock); 226 err_vma: 227 i915_vm_put(vm); 228 i915_vma_free(vma); 229 return pos; 230 } 231 232 static struct i915_vma * 233 vma_lookup(struct drm_i915_gem_object *obj, 234 struct i915_address_space *vm, 235 const struct i915_ggtt_view *view) 236 { 237 struct rb_node *rb; 238 239 rb = obj->vma.tree.rb_node; 240 while (rb) { 241 struct i915_vma *vma = rb_entry(rb, struct i915_vma, obj_node); 242 long cmp; 243 244 cmp = i915_vma_compare(vma, vm, view); 245 if (cmp == 0) 246 return vma; 247 248 if (cmp < 0) 249 rb = rb->rb_right; 250 else 251 rb = rb->rb_left; 252 } 253 254 return NULL; 255 } 256 257 /** 258 * i915_vma_instance - return the singleton instance of the VMA 259 * @obj: parent &struct drm_i915_gem_object to be mapped 260 * @vm: address space in which the mapping is located 261 * @view: additional mapping requirements 262 * 263 * i915_vma_instance() looks up an existing VMA of the @obj in the @vm with 264 * the same @view characteristics. If a match is not found, one is created. 265 * Once created, the VMA is kept until either the object is freed, or the 266 * address space is closed. 267 * 268 * Returns the vma, or an error pointer. 269 */ 270 struct i915_vma * 271 i915_vma_instance(struct drm_i915_gem_object *obj, 272 struct i915_address_space *vm, 273 const struct i915_ggtt_view *view) 274 { 275 struct i915_vma *vma; 276 277 GEM_BUG_ON(view && !i915_is_ggtt(vm)); 278 GEM_BUG_ON(!atomic_read(&vm->open)); 279 280 spin_lock(&obj->vma.lock); 281 vma = vma_lookup(obj, vm, view); 282 spin_unlock(&obj->vma.lock); 283 284 /* vma_create() will resolve the race if another creates the vma */ 285 if (unlikely(!vma)) 286 vma = vma_create(obj, vm, view); 287 288 GEM_BUG_ON(!IS_ERR(vma) && i915_vma_compare(vma, vm, view)); 289 return vma; 290 } 291 292 struct i915_vma_work { 293 struct dma_fence_work base; 294 struct i915_vma *vma; 295 struct drm_i915_gem_object *pinned; 296 struct i915_sw_dma_fence_cb cb; 297 enum i915_cache_level cache_level; 298 unsigned int flags; 299 }; 300 301 static int __vma_bind(struct dma_fence_work *work) 302 { 303 struct i915_vma_work *vw = container_of(work, typeof(*vw), base); 304 struct i915_vma *vma = vw->vma; 305 int err; 306 307 err = vma->ops->bind_vma(vma->vm, vma, vw->cache_level, vw->flags); 308 if (err) 309 atomic_or(I915_VMA_ERROR, &vma->flags); 310 311 return err; 312 } 313 314 static void __vma_release(struct dma_fence_work *work) 315 { 316 struct i915_vma_work *vw = container_of(work, typeof(*vw), base); 317 318 if (vw->pinned) 319 __i915_gem_object_unpin_pages(vw->pinned); 320 } 321 322 static const struct dma_fence_work_ops bind_ops = { 323 .name = "bind", 324 .work = __vma_bind, 325 .release = __vma_release, 326 }; 327 328 struct i915_vma_work *i915_vma_work(void) 329 { 330 struct i915_vma_work *vw; 331 332 vw = kzalloc(sizeof(*vw), GFP_KERNEL); 333 if (!vw) 334 return NULL; 335 336 dma_fence_work_init(&vw->base, &bind_ops); 337 vw->base.dma.error = -EAGAIN; /* disable the worker by default */ 338 339 return vw; 340 } 341 342 int i915_vma_wait_for_bind(struct i915_vma *vma) 343 { 344 int err = 0; 345 346 if (rcu_access_pointer(vma->active.excl.fence)) { 347 struct dma_fence *fence; 348 349 rcu_read_lock(); 350 fence = dma_fence_get_rcu_safe(&vma->active.excl.fence); 351 rcu_read_unlock(); 352 if (fence) { 353 err = dma_fence_wait(fence, MAX_SCHEDULE_TIMEOUT); 354 dma_fence_put(fence); 355 } 356 } 357 358 return err; 359 } 360 361 /** 362 * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address space. 363 * @vma: VMA to map 364 * @cache_level: mapping cache level 365 * @flags: flags like global or local mapping 366 * @work: preallocated worker for allocating and binding the PTE 367 * 368 * DMA addresses are taken from the scatter-gather table of this object (or of 369 * this VMA in case of non-default GGTT views) and PTE entries set up. 370 * Note that DMA addresses are also the only part of the SG table we care about. 371 */ 372 int i915_vma_bind(struct i915_vma *vma, 373 enum i915_cache_level cache_level, 374 u32 flags, 375 struct i915_vma_work *work) 376 { 377 u32 bind_flags; 378 u32 vma_flags; 379 int ret; 380 381 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 382 GEM_BUG_ON(vma->size > vma->node.size); 383 384 if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start, 385 vma->node.size, 386 vma->vm->total))) 387 return -ENODEV; 388 389 if (GEM_DEBUG_WARN_ON(!flags)) 390 return -EINVAL; 391 392 bind_flags = flags; 393 bind_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND; 394 395 vma_flags = atomic_read(&vma->flags); 396 vma_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND; 397 398 bind_flags &= ~vma_flags; 399 if (bind_flags == 0) 400 return 0; 401 402 GEM_BUG_ON(!vma->pages); 403 404 trace_i915_vma_bind(vma, bind_flags); 405 if (work && bind_flags & vma->vm->bind_async_flags) { 406 struct dma_fence *prev; 407 408 work->vma = vma; 409 work->cache_level = cache_level; 410 work->flags = bind_flags; 411 412 /* 413 * Note we only want to chain up to the migration fence on 414 * the pages (not the object itself). As we don't track that, 415 * yet, we have to use the exclusive fence instead. 416 * 417 * Also note that we do not want to track the async vma as 418 * part of the obj->resv->excl_fence as it only affects 419 * execution and not content or object's backing store lifetime. 420 */ 421 prev = i915_active_set_exclusive(&vma->active, &work->base.dma); 422 if (prev) { 423 __i915_sw_fence_await_dma_fence(&work->base.chain, 424 prev, 425 &work->cb); 426 dma_fence_put(prev); 427 } 428 429 work->base.dma.error = 0; /* enable the queue_work() */ 430 431 if (vma->obj) { 432 __i915_gem_object_pin_pages(vma->obj); 433 work->pinned = vma->obj; 434 } 435 } else { 436 ret = vma->ops->bind_vma(vma->vm, vma, cache_level, bind_flags); 437 if (ret) 438 return ret; 439 } 440 441 atomic_or(bind_flags, &vma->flags); 442 return 0; 443 } 444 445 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma) 446 { 447 void __iomem *ptr; 448 int err; 449 450 if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) { 451 err = -ENODEV; 452 goto err; 453 } 454 455 GEM_BUG_ON(!i915_vma_is_ggtt(vma)); 456 GEM_BUG_ON(!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND)); 457 458 ptr = READ_ONCE(vma->iomap); 459 if (ptr == NULL) { 460 ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap, 461 vma->node.start, 462 vma->node.size); 463 if (ptr == NULL) { 464 err = -ENOMEM; 465 goto err; 466 } 467 468 if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) { 469 io_mapping_unmap(ptr); 470 ptr = vma->iomap; 471 } 472 } 473 474 __i915_vma_pin(vma); 475 476 err = i915_vma_pin_fence(vma); 477 if (err) 478 goto err_unpin; 479 480 i915_vma_set_ggtt_write(vma); 481 482 /* NB Access through the GTT requires the device to be awake. */ 483 return ptr; 484 485 err_unpin: 486 __i915_vma_unpin(vma); 487 err: 488 return IO_ERR_PTR(err); 489 } 490 491 void i915_vma_flush_writes(struct i915_vma *vma) 492 { 493 if (i915_vma_unset_ggtt_write(vma)) 494 intel_gt_flush_ggtt_writes(vma->vm->gt); 495 } 496 497 void i915_vma_unpin_iomap(struct i915_vma *vma) 498 { 499 GEM_BUG_ON(vma->iomap == NULL); 500 501 i915_vma_flush_writes(vma); 502 503 i915_vma_unpin_fence(vma); 504 i915_vma_unpin(vma); 505 } 506 507 void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags) 508 { 509 struct i915_vma *vma; 510 struct drm_i915_gem_object *obj; 511 512 vma = fetch_and_zero(p_vma); 513 if (!vma) 514 return; 515 516 obj = vma->obj; 517 GEM_BUG_ON(!obj); 518 519 i915_vma_unpin(vma); 520 521 if (flags & I915_VMA_RELEASE_MAP) 522 i915_gem_object_unpin_map(obj); 523 524 i915_gem_object_put(obj); 525 } 526 527 bool i915_vma_misplaced(const struct i915_vma *vma, 528 u64 size, u64 alignment, u64 flags) 529 { 530 if (!drm_mm_node_allocated(&vma->node)) 531 return false; 532 533 if (test_bit(I915_VMA_ERROR_BIT, __i915_vma_flags(vma))) 534 return true; 535 536 if (vma->node.size < size) 537 return true; 538 539 GEM_BUG_ON(alignment && !is_power_of_2(alignment)); 540 if (alignment && !IS_ALIGNED(vma->node.start, alignment)) 541 return true; 542 543 if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma)) 544 return true; 545 546 if (flags & PIN_OFFSET_BIAS && 547 vma->node.start < (flags & PIN_OFFSET_MASK)) 548 return true; 549 550 if (flags & PIN_OFFSET_FIXED && 551 vma->node.start != (flags & PIN_OFFSET_MASK)) 552 return true; 553 554 return false; 555 } 556 557 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma) 558 { 559 bool mappable, fenceable; 560 561 GEM_BUG_ON(!i915_vma_is_ggtt(vma)); 562 GEM_BUG_ON(!vma->fence_size); 563 564 fenceable = (vma->node.size >= vma->fence_size && 565 IS_ALIGNED(vma->node.start, vma->fence_alignment)); 566 567 mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end; 568 569 if (mappable && fenceable) 570 set_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma)); 571 else 572 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma)); 573 } 574 575 bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long color) 576 { 577 struct drm_mm_node *node = &vma->node; 578 struct drm_mm_node *other; 579 580 /* 581 * On some machines we have to be careful when putting differing types 582 * of snoopable memory together to avoid the prefetcher crossing memory 583 * domains and dying. During vm initialisation, we decide whether or not 584 * these constraints apply and set the drm_mm.color_adjust 585 * appropriately. 586 */ 587 if (!i915_vm_has_cache_coloring(vma->vm)) 588 return true; 589 590 /* Only valid to be called on an already inserted vma */ 591 GEM_BUG_ON(!drm_mm_node_allocated(node)); 592 GEM_BUG_ON(list_empty(&node->node_list)); 593 594 other = list_prev_entry(node, node_list); 595 if (i915_node_color_differs(other, color) && 596 !drm_mm_hole_follows(other)) 597 return false; 598 599 other = list_next_entry(node, node_list); 600 if (i915_node_color_differs(other, color) && 601 !drm_mm_hole_follows(node)) 602 return false; 603 604 return true; 605 } 606 607 /** 608 * i915_vma_insert - finds a slot for the vma in its address space 609 * @vma: the vma 610 * @size: requested size in bytes (can be larger than the VMA) 611 * @alignment: required alignment 612 * @flags: mask of PIN_* flags to use 613 * 614 * First we try to allocate some free space that meets the requirements for 615 * the VMA. Failiing that, if the flags permit, it will evict an old VMA, 616 * preferrably the oldest idle entry to make room for the new VMA. 617 * 618 * Returns: 619 * 0 on success, negative error code otherwise. 620 */ 621 static int 622 i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags) 623 { 624 unsigned long color; 625 u64 start, end; 626 int ret; 627 628 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)); 629 GEM_BUG_ON(drm_mm_node_allocated(&vma->node)); 630 631 size = max(size, vma->size); 632 alignment = max(alignment, vma->display_alignment); 633 if (flags & PIN_MAPPABLE) { 634 size = max_t(typeof(size), size, vma->fence_size); 635 alignment = max_t(typeof(alignment), 636 alignment, vma->fence_alignment); 637 } 638 639 GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE)); 640 GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); 641 GEM_BUG_ON(!is_power_of_2(alignment)); 642 643 start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0; 644 GEM_BUG_ON(!IS_ALIGNED(start, I915_GTT_PAGE_SIZE)); 645 646 end = vma->vm->total; 647 if (flags & PIN_MAPPABLE) 648 end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end); 649 if (flags & PIN_ZONE_4G) 650 end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE); 651 GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE)); 652 653 /* If binding the object/GGTT view requires more space than the entire 654 * aperture has, reject it early before evicting everything in a vain 655 * attempt to find space. 656 */ 657 if (size > end) { 658 DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n", 659 size, flags & PIN_MAPPABLE ? "mappable" : "total", 660 end); 661 return -ENOSPC; 662 } 663 664 color = 0; 665 if (vma->obj && i915_vm_has_cache_coloring(vma->vm)) 666 color = vma->obj->cache_level; 667 668 if (flags & PIN_OFFSET_FIXED) { 669 u64 offset = flags & PIN_OFFSET_MASK; 670 if (!IS_ALIGNED(offset, alignment) || 671 range_overflows(offset, size, end)) 672 return -EINVAL; 673 674 ret = i915_gem_gtt_reserve(vma->vm, &vma->node, 675 size, offset, color, 676 flags); 677 if (ret) 678 return ret; 679 } else { 680 /* 681 * We only support huge gtt pages through the 48b PPGTT, 682 * however we also don't want to force any alignment for 683 * objects which need to be tightly packed into the low 32bits. 684 * 685 * Note that we assume that GGTT are limited to 4GiB for the 686 * forseeable future. See also i915_ggtt_offset(). 687 */ 688 if (upper_32_bits(end - 1) && 689 vma->page_sizes.sg > I915_GTT_PAGE_SIZE) { 690 /* 691 * We can't mix 64K and 4K PTEs in the same page-table 692 * (2M block), and so to avoid the ugliness and 693 * complexity of coloring we opt for just aligning 64K 694 * objects to 2M. 695 */ 696 u64 page_alignment = 697 rounddown_pow_of_two(vma->page_sizes.sg | 698 I915_GTT_PAGE_SIZE_2M); 699 700 /* 701 * Check we don't expand for the limited Global GTT 702 * (mappable aperture is even more precious!). This 703 * also checks that we exclude the aliasing-ppgtt. 704 */ 705 GEM_BUG_ON(i915_vma_is_ggtt(vma)); 706 707 alignment = max(alignment, page_alignment); 708 709 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) 710 size = round_up(size, I915_GTT_PAGE_SIZE_2M); 711 } 712 713 ret = i915_gem_gtt_insert(vma->vm, &vma->node, 714 size, alignment, color, 715 start, end, flags); 716 if (ret) 717 return ret; 718 719 GEM_BUG_ON(vma->node.start < start); 720 GEM_BUG_ON(vma->node.start + vma->node.size > end); 721 } 722 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 723 GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, color)); 724 725 list_add_tail(&vma->vm_link, &vma->vm->bound_list); 726 727 return 0; 728 } 729 730 static void 731 i915_vma_detach(struct i915_vma *vma) 732 { 733 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); 734 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)); 735 736 /* 737 * And finally now the object is completely decoupled from this 738 * vma, we can drop its hold on the backing storage and allow 739 * it to be reaped by the shrinker. 740 */ 741 list_del(&vma->vm_link); 742 } 743 744 static bool try_qad_pin(struct i915_vma *vma, unsigned int flags) 745 { 746 unsigned int bound; 747 bool pinned = true; 748 749 bound = atomic_read(&vma->flags); 750 do { 751 if (unlikely(flags & ~bound)) 752 return false; 753 754 if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR))) 755 return false; 756 757 if (!(bound & I915_VMA_PIN_MASK)) 758 goto unpinned; 759 760 GEM_BUG_ON(((bound + 1) & I915_VMA_PIN_MASK) == 0); 761 } while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1)); 762 763 return true; 764 765 unpinned: 766 /* 767 * If pin_count==0, but we are bound, check under the lock to avoid 768 * racing with a concurrent i915_vma_unbind(). 769 */ 770 mutex_lock(&vma->vm->mutex); 771 do { 772 if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR))) { 773 pinned = false; 774 break; 775 } 776 777 if (unlikely(flags & ~bound)) { 778 pinned = false; 779 break; 780 } 781 } while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1)); 782 mutex_unlock(&vma->vm->mutex); 783 784 return pinned; 785 } 786 787 static int vma_get_pages(struct i915_vma *vma) 788 { 789 int err = 0; 790 791 if (atomic_add_unless(&vma->pages_count, 1, 0)) 792 return 0; 793 794 /* Allocations ahoy! */ 795 if (mutex_lock_interruptible(&vma->pages_mutex)) 796 return -EINTR; 797 798 if (!atomic_read(&vma->pages_count)) { 799 if (vma->obj) { 800 err = i915_gem_object_pin_pages(vma->obj); 801 if (err) 802 goto unlock; 803 } 804 805 err = vma->ops->set_pages(vma); 806 if (err) { 807 if (vma->obj) 808 i915_gem_object_unpin_pages(vma->obj); 809 goto unlock; 810 } 811 } 812 atomic_inc(&vma->pages_count); 813 814 unlock: 815 mutex_unlock(&vma->pages_mutex); 816 817 return err; 818 } 819 820 static void __vma_put_pages(struct i915_vma *vma, unsigned int count) 821 { 822 /* We allocate under vma_get_pages, so beware the shrinker */ 823 mutex_lock_nested(&vma->pages_mutex, SINGLE_DEPTH_NESTING); 824 GEM_BUG_ON(atomic_read(&vma->pages_count) < count); 825 if (atomic_sub_return(count, &vma->pages_count) == 0) { 826 vma->ops->clear_pages(vma); 827 GEM_BUG_ON(vma->pages); 828 if (vma->obj) 829 i915_gem_object_unpin_pages(vma->obj); 830 } 831 mutex_unlock(&vma->pages_mutex); 832 } 833 834 static void vma_put_pages(struct i915_vma *vma) 835 { 836 if (atomic_add_unless(&vma->pages_count, -1, 1)) 837 return; 838 839 __vma_put_pages(vma, 1); 840 } 841 842 static void vma_unbind_pages(struct i915_vma *vma) 843 { 844 unsigned int count; 845 846 lockdep_assert_held(&vma->vm->mutex); 847 848 /* The upper portion of pages_count is the number of bindings */ 849 count = atomic_read(&vma->pages_count); 850 count >>= I915_VMA_PAGES_BIAS; 851 GEM_BUG_ON(!count); 852 853 __vma_put_pages(vma, count | count << I915_VMA_PAGES_BIAS); 854 } 855 856 int i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags) 857 { 858 struct i915_vma_work *work = NULL; 859 intel_wakeref_t wakeref = 0; 860 unsigned int bound; 861 int err; 862 863 BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND); 864 BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND); 865 866 GEM_BUG_ON(!(flags & (PIN_USER | PIN_GLOBAL))); 867 868 /* First try and grab the pin without rebinding the vma */ 869 if (try_qad_pin(vma, flags & I915_VMA_BIND_MASK)) 870 return 0; 871 872 err = vma_get_pages(vma); 873 if (err) 874 return err; 875 876 if (flags & vma->vm->bind_async_flags) { 877 work = i915_vma_work(); 878 if (!work) { 879 err = -ENOMEM; 880 goto err_pages; 881 } 882 } 883 884 if (flags & PIN_GLOBAL) 885 wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm); 886 887 /* 888 * Differentiate between user/kernel vma inside the aliasing-ppgtt. 889 * 890 * We conflate the Global GTT with the user's vma when using the 891 * aliasing-ppgtt, but it is still vitally important to try and 892 * keep the use cases distinct. For example, userptr objects are 893 * not allowed inside the Global GTT as that will cause lock 894 * inversions when we have to evict them the mmu_notifier callbacks - 895 * but they are allowed to be part of the user ppGTT which can never 896 * be mapped. As such we try to give the distinct users of the same 897 * mutex, distinct lockclasses [equivalent to how we keep i915_ggtt 898 * and i915_ppgtt separate]. 899 * 900 * NB this may cause us to mask real lock inversions -- while the 901 * code is safe today, lockdep may not be able to spot future 902 * transgressions. 903 */ 904 err = mutex_lock_interruptible_nested(&vma->vm->mutex, 905 !(flags & PIN_GLOBAL)); 906 if (err) 907 goto err_fence; 908 909 /* No more allocations allowed now we hold vm->mutex */ 910 911 if (unlikely(i915_vma_is_closed(vma))) { 912 err = -ENOENT; 913 goto err_unlock; 914 } 915 916 bound = atomic_read(&vma->flags); 917 if (unlikely(bound & I915_VMA_ERROR)) { 918 err = -ENOMEM; 919 goto err_unlock; 920 } 921 922 if (unlikely(!((bound + 1) & I915_VMA_PIN_MASK))) { 923 err = -EAGAIN; /* pins are meant to be fairly temporary */ 924 goto err_unlock; 925 } 926 927 if (unlikely(!(flags & ~bound & I915_VMA_BIND_MASK))) { 928 __i915_vma_pin(vma); 929 goto err_unlock; 930 } 931 932 err = i915_active_acquire(&vma->active); 933 if (err) 934 goto err_unlock; 935 936 if (!(bound & I915_VMA_BIND_MASK)) { 937 err = i915_vma_insert(vma, size, alignment, flags); 938 if (err) 939 goto err_active; 940 941 if (i915_is_ggtt(vma->vm)) 942 __i915_vma_set_map_and_fenceable(vma); 943 } 944 945 GEM_BUG_ON(!vma->pages); 946 err = i915_vma_bind(vma, 947 vma->obj ? vma->obj->cache_level : 0, 948 flags, work); 949 if (err) 950 goto err_remove; 951 952 /* There should only be at most 2 active bindings (user, global) */ 953 GEM_BUG_ON(bound + I915_VMA_PAGES_ACTIVE < bound); 954 atomic_add(I915_VMA_PAGES_ACTIVE, &vma->pages_count); 955 list_move_tail(&vma->vm_link, &vma->vm->bound_list); 956 957 __i915_vma_pin(vma); 958 GEM_BUG_ON(!i915_vma_is_pinned(vma)); 959 GEM_BUG_ON(!i915_vma_is_bound(vma, flags)); 960 GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags)); 961 962 err_remove: 963 if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) { 964 i915_vma_detach(vma); 965 drm_mm_remove_node(&vma->node); 966 } 967 err_active: 968 i915_active_release(&vma->active); 969 err_unlock: 970 mutex_unlock(&vma->vm->mutex); 971 err_fence: 972 if (work) 973 dma_fence_work_commit_imm(&work->base); 974 if (wakeref) 975 intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref); 976 err_pages: 977 vma_put_pages(vma); 978 return err; 979 } 980 981 static void flush_idle_contexts(struct intel_gt *gt) 982 { 983 struct intel_engine_cs *engine; 984 enum intel_engine_id id; 985 986 for_each_engine(engine, gt, id) 987 intel_engine_flush_barriers(engine); 988 989 intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT); 990 } 991 992 int i915_ggtt_pin(struct i915_vma *vma, u32 align, unsigned int flags) 993 { 994 struct i915_address_space *vm = vma->vm; 995 int err; 996 997 GEM_BUG_ON(!i915_vma_is_ggtt(vma)); 998 999 do { 1000 err = i915_vma_pin(vma, 0, align, flags | PIN_GLOBAL); 1001 if (err != -ENOSPC) { 1002 if (!err) { 1003 err = i915_vma_wait_for_bind(vma); 1004 if (err) 1005 i915_vma_unpin(vma); 1006 } 1007 return err; 1008 } 1009 1010 /* Unlike i915_vma_pin, we don't take no for an answer! */ 1011 flush_idle_contexts(vm->gt); 1012 if (mutex_lock_interruptible(&vm->mutex) == 0) { 1013 i915_gem_evict_vm(vm); 1014 mutex_unlock(&vm->mutex); 1015 } 1016 } while (1); 1017 } 1018 1019 static void __vma_close(struct i915_vma *vma, struct intel_gt *gt) 1020 { 1021 /* 1022 * We defer actually closing, unbinding and destroying the VMA until 1023 * the next idle point, or if the object is freed in the meantime. By 1024 * postponing the unbind, we allow for it to be resurrected by the 1025 * client, avoiding the work required to rebind the VMA. This is 1026 * advantageous for DRI, where the client/server pass objects 1027 * between themselves, temporarily opening a local VMA to the 1028 * object, and then closing it again. The same object is then reused 1029 * on the next frame (or two, depending on the depth of the swap queue) 1030 * causing us to rebind the VMA once more. This ends up being a lot 1031 * of wasted work for the steady state. 1032 */ 1033 GEM_BUG_ON(i915_vma_is_closed(vma)); 1034 list_add(&vma->closed_link, >->closed_vma); 1035 } 1036 1037 void i915_vma_close(struct i915_vma *vma) 1038 { 1039 struct intel_gt *gt = vma->vm->gt; 1040 unsigned long flags; 1041 1042 if (i915_vma_is_ggtt(vma)) 1043 return; 1044 1045 GEM_BUG_ON(!atomic_read(&vma->open_count)); 1046 if (atomic_dec_and_lock_irqsave(&vma->open_count, 1047 >->closed_lock, 1048 flags)) { 1049 __vma_close(vma, gt); 1050 spin_unlock_irqrestore(>->closed_lock, flags); 1051 } 1052 } 1053 1054 static void __i915_vma_remove_closed(struct i915_vma *vma) 1055 { 1056 struct intel_gt *gt = vma->vm->gt; 1057 1058 spin_lock_irq(>->closed_lock); 1059 list_del_init(&vma->closed_link); 1060 spin_unlock_irq(>->closed_lock); 1061 } 1062 1063 void i915_vma_reopen(struct i915_vma *vma) 1064 { 1065 if (i915_vma_is_closed(vma)) 1066 __i915_vma_remove_closed(vma); 1067 } 1068 1069 void i915_vma_release(struct kref *ref) 1070 { 1071 struct i915_vma *vma = container_of(ref, typeof(*vma), ref); 1072 1073 if (drm_mm_node_allocated(&vma->node)) { 1074 mutex_lock(&vma->vm->mutex); 1075 atomic_and(~I915_VMA_PIN_MASK, &vma->flags); 1076 WARN_ON(__i915_vma_unbind(vma)); 1077 mutex_unlock(&vma->vm->mutex); 1078 GEM_BUG_ON(drm_mm_node_allocated(&vma->node)); 1079 } 1080 GEM_BUG_ON(i915_vma_is_active(vma)); 1081 1082 if (vma->obj) { 1083 struct drm_i915_gem_object *obj = vma->obj; 1084 1085 spin_lock(&obj->vma.lock); 1086 list_del(&vma->obj_link); 1087 if (!RB_EMPTY_NODE(&vma->obj_node)) 1088 rb_erase(&vma->obj_node, &obj->vma.tree); 1089 spin_unlock(&obj->vma.lock); 1090 } 1091 1092 __i915_vma_remove_closed(vma); 1093 i915_vm_put(vma->vm); 1094 1095 i915_active_fini(&vma->active); 1096 i915_vma_free(vma); 1097 } 1098 1099 void i915_vma_parked(struct intel_gt *gt) 1100 { 1101 struct i915_vma *vma, *next; 1102 LIST_HEAD(closed); 1103 1104 spin_lock_irq(>->closed_lock); 1105 list_for_each_entry_safe(vma, next, >->closed_vma, closed_link) { 1106 struct drm_i915_gem_object *obj = vma->obj; 1107 struct i915_address_space *vm = vma->vm; 1108 1109 /* XXX All to avoid keeping a reference on i915_vma itself */ 1110 1111 if (!kref_get_unless_zero(&obj->base.refcount)) 1112 continue; 1113 1114 if (!i915_vm_tryopen(vm)) { 1115 i915_gem_object_put(obj); 1116 continue; 1117 } 1118 1119 list_move(&vma->closed_link, &closed); 1120 } 1121 spin_unlock_irq(>->closed_lock); 1122 1123 /* As the GT is held idle, no vma can be reopened as we destroy them */ 1124 list_for_each_entry_safe(vma, next, &closed, closed_link) { 1125 struct drm_i915_gem_object *obj = vma->obj; 1126 struct i915_address_space *vm = vma->vm; 1127 1128 INIT_LIST_HEAD(&vma->closed_link); 1129 __i915_vma_put(vma); 1130 1131 i915_gem_object_put(obj); 1132 i915_vm_close(vm); 1133 } 1134 } 1135 1136 static void __i915_vma_iounmap(struct i915_vma *vma) 1137 { 1138 GEM_BUG_ON(i915_vma_is_pinned(vma)); 1139 1140 if (vma->iomap == NULL) 1141 return; 1142 1143 io_mapping_unmap(vma->iomap); 1144 vma->iomap = NULL; 1145 } 1146 1147 void i915_vma_revoke_mmap(struct i915_vma *vma) 1148 { 1149 struct drm_vma_offset_node *node; 1150 u64 vma_offset; 1151 1152 if (!i915_vma_has_userfault(vma)) 1153 return; 1154 1155 GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma)); 1156 GEM_BUG_ON(!vma->obj->userfault_count); 1157 1158 node = &vma->mmo->vma_node; 1159 vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT; 1160 unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping, 1161 drm_vma_node_offset_addr(node) + vma_offset, 1162 vma->size, 1163 1); 1164 1165 i915_vma_unset_userfault(vma); 1166 if (!--vma->obj->userfault_count) 1167 list_del(&vma->obj->userfault_link); 1168 } 1169 1170 int __i915_vma_move_to_active(struct i915_vma *vma, struct i915_request *rq) 1171 { 1172 int err; 1173 1174 GEM_BUG_ON(!i915_vma_is_pinned(vma)); 1175 1176 /* Wait for the vma to be bound before we start! */ 1177 err = i915_request_await_active(rq, &vma->active, 1178 I915_ACTIVE_AWAIT_EXCL); 1179 if (err) 1180 return err; 1181 1182 return i915_active_add_request(&vma->active, rq); 1183 } 1184 1185 int i915_vma_move_to_active(struct i915_vma *vma, 1186 struct i915_request *rq, 1187 unsigned int flags) 1188 { 1189 struct drm_i915_gem_object *obj = vma->obj; 1190 int err; 1191 1192 assert_object_held(obj); 1193 1194 err = __i915_vma_move_to_active(vma, rq); 1195 if (unlikely(err)) 1196 return err; 1197 1198 if (flags & EXEC_OBJECT_WRITE) { 1199 struct intel_frontbuffer *front; 1200 1201 front = __intel_frontbuffer_get(obj); 1202 if (unlikely(front)) { 1203 if (intel_frontbuffer_invalidate(front, ORIGIN_CS)) 1204 i915_active_add_request(&front->write, rq); 1205 intel_frontbuffer_put(front); 1206 } 1207 1208 dma_resv_add_excl_fence(vma->resv, &rq->fence); 1209 obj->write_domain = I915_GEM_DOMAIN_RENDER; 1210 obj->read_domains = 0; 1211 } else { 1212 err = dma_resv_reserve_shared(vma->resv, 1); 1213 if (unlikely(err)) 1214 return err; 1215 1216 dma_resv_add_shared_fence(vma->resv, &rq->fence); 1217 obj->write_domain = 0; 1218 } 1219 1220 if (flags & EXEC_OBJECT_NEEDS_FENCE && vma->fence) 1221 i915_active_add_request(&vma->fence->active, rq); 1222 1223 obj->read_domains |= I915_GEM_GPU_DOMAINS; 1224 obj->mm.dirty = true; 1225 1226 GEM_BUG_ON(!i915_vma_is_active(vma)); 1227 return 0; 1228 } 1229 1230 void __i915_vma_evict(struct i915_vma *vma) 1231 { 1232 GEM_BUG_ON(i915_vma_is_pinned(vma)); 1233 1234 if (i915_vma_is_map_and_fenceable(vma)) { 1235 /* Force a pagefault for domain tracking on next user access */ 1236 i915_vma_revoke_mmap(vma); 1237 1238 /* 1239 * Check that we have flushed all writes through the GGTT 1240 * before the unbind, other due to non-strict nature of those 1241 * indirect writes they may end up referencing the GGTT PTE 1242 * after the unbind. 1243 * 1244 * Note that we may be concurrently poking at the GGTT_WRITE 1245 * bit from set-domain, as we mark all GGTT vma associated 1246 * with an object. We know this is for another vma, as we 1247 * are currently unbinding this one -- so if this vma will be 1248 * reused, it will be refaulted and have its dirty bit set 1249 * before the next write. 1250 */ 1251 i915_vma_flush_writes(vma); 1252 1253 /* release the fence reg _after_ flushing */ 1254 i915_vma_revoke_fence(vma); 1255 1256 __i915_vma_iounmap(vma); 1257 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma)); 1258 } 1259 GEM_BUG_ON(vma->fence); 1260 GEM_BUG_ON(i915_vma_has_userfault(vma)); 1261 1262 if (likely(atomic_read(&vma->vm->open))) { 1263 trace_i915_vma_unbind(vma); 1264 vma->ops->unbind_vma(vma->vm, vma); 1265 } 1266 atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR | I915_VMA_GGTT_WRITE), 1267 &vma->flags); 1268 1269 i915_vma_detach(vma); 1270 vma_unbind_pages(vma); 1271 } 1272 1273 int __i915_vma_unbind(struct i915_vma *vma) 1274 { 1275 int ret; 1276 1277 lockdep_assert_held(&vma->vm->mutex); 1278 1279 if (!drm_mm_node_allocated(&vma->node)) 1280 return 0; 1281 1282 if (i915_vma_is_pinned(vma)) { 1283 vma_print_allocator(vma, "is pinned"); 1284 return -EAGAIN; 1285 } 1286 1287 /* 1288 * After confirming that no one else is pinning this vma, wait for 1289 * any laggards who may have crept in during the wait (through 1290 * a residual pin skipping the vm->mutex) to complete. 1291 */ 1292 ret = i915_vma_sync(vma); 1293 if (ret) 1294 return ret; 1295 1296 GEM_BUG_ON(i915_vma_is_active(vma)); 1297 __i915_vma_evict(vma); 1298 1299 drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */ 1300 return 0; 1301 } 1302 1303 int i915_vma_unbind(struct i915_vma *vma) 1304 { 1305 struct i915_address_space *vm = vma->vm; 1306 intel_wakeref_t wakeref = 0; 1307 int err; 1308 1309 /* Optimistic wait before taking the mutex */ 1310 err = i915_vma_sync(vma); 1311 if (err) 1312 return err; 1313 1314 if (!drm_mm_node_allocated(&vma->node)) 1315 return 0; 1316 1317 if (i915_vma_is_pinned(vma)) { 1318 vma_print_allocator(vma, "is pinned"); 1319 return -EAGAIN; 1320 } 1321 1322 if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND)) 1323 /* XXX not always required: nop_clear_range */ 1324 wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm); 1325 1326 err = mutex_lock_interruptible_nested(&vma->vm->mutex, !wakeref); 1327 if (err) 1328 goto out_rpm; 1329 1330 err = __i915_vma_unbind(vma); 1331 mutex_unlock(&vm->mutex); 1332 1333 out_rpm: 1334 if (wakeref) 1335 intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref); 1336 return err; 1337 } 1338 1339 struct i915_vma *i915_vma_make_unshrinkable(struct i915_vma *vma) 1340 { 1341 i915_gem_object_make_unshrinkable(vma->obj); 1342 return vma; 1343 } 1344 1345 void i915_vma_make_shrinkable(struct i915_vma *vma) 1346 { 1347 i915_gem_object_make_shrinkable(vma->obj); 1348 } 1349 1350 void i915_vma_make_purgeable(struct i915_vma *vma) 1351 { 1352 i915_gem_object_make_purgeable(vma->obj); 1353 } 1354 1355 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) 1356 #include "selftests/i915_vma.c" 1357 #endif 1358 1359 static void i915_global_vma_shrink(void) 1360 { 1361 kmem_cache_shrink(global.slab_vmas); 1362 } 1363 1364 static void i915_global_vma_exit(void) 1365 { 1366 kmem_cache_destroy(global.slab_vmas); 1367 } 1368 1369 static struct i915_global_vma global = { { 1370 .shrink = i915_global_vma_shrink, 1371 .exit = i915_global_vma_exit, 1372 } }; 1373 1374 int __init i915_global_vma_init(void) 1375 { 1376 global.slab_vmas = KMEM_CACHE(i915_vma, SLAB_HWCACHE_ALIGN); 1377 if (!global.slab_vmas) 1378 return -ENOMEM; 1379 1380 i915_global_register(&global.base); 1381 return 0; 1382 } 1383