1 /* 2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #include "intel_drv.h" 25 #include "i915_vgpu.h" 26 27 /** 28 * DOC: Intel GVT-g guest support 29 * 30 * Intel GVT-g is a graphics virtualization technology which shares the 31 * GPU among multiple virtual machines on a time-sharing basis. Each 32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent 33 * features as the underlying physical GPU (pGPU), so i915 driver can run 34 * seamlessly in a virtual machine. This file provides vGPU specific 35 * optimizations when running in a virtual machine, to reduce the complexity 36 * of vGPU emulation and to improve the overall performance. 37 * 38 * A primary function introduced here is so-called "address space ballooning" 39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs, 40 * so each VM can directly access a portion of the memory without hypervisor's 41 * intervention, e.g. filling textures or queuing commands. However with the 42 * partitioning an unmodified i915 driver would assume a smaller graphics 43 * memory starting from address ZERO, then requires vGPU emulation module to 44 * translate the graphics address between 'guest view' and 'host view', for 45 * all registers and command opcodes which contain a graphics memory address. 46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning", 47 * by telling the exact partitioning knowledge to each guest i915 driver, which 48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU 49 * emulation module only needs to scan and validate graphics addresses without 50 * complexity of address translation. 51 * 52 */ 53 54 /** 55 * i915_check_vgpu - detect virtual GPU 56 * @dev_priv: i915 device private 57 * 58 * This function is called at the initialization stage, to detect whether 59 * running on a vGPU. 60 */ 61 void i915_check_vgpu(struct drm_i915_private *dev_priv) 62 { 63 uint64_t magic; 64 uint32_t version; 65 66 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE); 67 68 if (!IS_HASWELL(dev_priv)) 69 return; 70 71 magic = __raw_i915_read64(dev_priv, vgtif_reg(magic)); 72 if (magic != VGT_MAGIC) 73 return; 74 75 version = INTEL_VGT_IF_VERSION_ENCODE( 76 __raw_i915_read16(dev_priv, vgtif_reg(version_major)), 77 __raw_i915_read16(dev_priv, vgtif_reg(version_minor))); 78 if (version != INTEL_VGT_IF_VERSION) { 79 DRM_INFO("VGT interface version mismatch!\n"); 80 return; 81 } 82 83 dev_priv->vgpu.active = true; 84 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); 85 } 86 87 struct _balloon_info_ { 88 /* 89 * There are up to 2 regions per mappable/unmappable graphic 90 * memory that might be ballooned. Here, index 0/1 is for mappable 91 * graphic memory, 2/3 for unmappable graphic memory. 92 */ 93 struct drm_mm_node space[4]; 94 }; 95 96 static struct _balloon_info_ bl_info; 97 98 /** 99 * intel_vgt_deballoon - deballoon reserved graphics address trunks 100 * 101 * This function is called to deallocate the ballooned-out graphic memory, when 102 * driver is unloaded or when ballooning fails. 103 */ 104 void intel_vgt_deballoon(struct drm_i915_private *dev_priv) 105 { 106 int i; 107 108 if (!intel_vgpu_active(dev_priv)) 109 return; 110 111 DRM_DEBUG("VGT deballoon.\n"); 112 113 for (i = 0; i < 4; i++) { 114 if (bl_info.space[i].allocated) 115 drm_mm_remove_node(&bl_info.space[i]); 116 } 117 118 memset(&bl_info, 0, sizeof(bl_info)); 119 } 120 121 static int vgt_balloon_space(struct drm_mm *mm, 122 struct drm_mm_node *node, 123 unsigned long start, unsigned long end) 124 { 125 unsigned long size = end - start; 126 127 if (start == end) 128 return -EINVAL; 129 130 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n", 131 start, end, size / 1024); 132 133 node->start = start; 134 node->size = size; 135 136 return drm_mm_reserve_node(mm, node); 137 } 138 139 /** 140 * intel_vgt_balloon - balloon out reserved graphics address trunks 141 * @dev: drm device 142 * 143 * This function is called at the initialization stage, to balloon out the 144 * graphic address space allocated to other vGPUs, by marking these spaces as 145 * reserved. The ballooning related knowledge(starting address and size of 146 * the mappable/unmappable graphic memory) is described in the vgt_if structure 147 * in a reserved mmio range. 148 * 149 * To give an example, the drawing below depicts one typical scenario after 150 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned 151 * out each for the mappable and the non-mappable part. From the vGPU1 point of 152 * view, the total size is the same as the physical one, with the start address 153 * of its graphic space being zero. Yet there are some portions ballooned out( 154 * the shadow part, which are marked as reserved by drm allocator). From the 155 * host point of view, the graphic address space is partitioned by multiple 156 * vGPUs in different VMs. :: 157 * 158 * vGPU1 view Host view 159 * 0 ------> +-----------+ +-----------+ 160 * ^ |###########| | vGPU3 | 161 * | |###########| +-----------+ 162 * | |###########| | vGPU2 | 163 * | +-----------+ +-----------+ 164 * mappable GM | available | ==> | vGPU1 | 165 * | +-----------+ +-----------+ 166 * | |###########| | | 167 * v |###########| | Host | 168 * +=======+===========+ +===========+ 169 * ^ |###########| | vGPU3 | 170 * | |###########| +-----------+ 171 * | |###########| | vGPU2 | 172 * | +-----------+ +-----------+ 173 * unmappable GM | available | ==> | vGPU1 | 174 * | +-----------+ +-----------+ 175 * | |###########| | | 176 * | |###########| | Host | 177 * v |###########| | | 178 * total GM size ------> +-----------+ +-----------+ 179 * 180 * Returns: 181 * zero on success, non-zero if configuration invalid or ballooning failed 182 */ 183 int intel_vgt_balloon(struct drm_i915_private *dev_priv) 184 { 185 struct i915_ggtt *ggtt = &dev_priv->ggtt; 186 unsigned long ggtt_end = ggtt->base.start + ggtt->base.total; 187 188 unsigned long mappable_base, mappable_size, mappable_end; 189 unsigned long unmappable_base, unmappable_size, unmappable_end; 190 int ret; 191 192 if (!intel_vgpu_active(dev_priv)) 193 return 0; 194 195 mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base)); 196 mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size)); 197 unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base)); 198 unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size)); 199 200 mappable_end = mappable_base + mappable_size; 201 unmappable_end = unmappable_base + unmappable_size; 202 203 DRM_INFO("VGT ballooning configuration:\n"); 204 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n", 205 mappable_base, mappable_size / 1024); 206 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n", 207 unmappable_base, unmappable_size / 1024); 208 209 if (mappable_base < ggtt->base.start || 210 mappable_end > ggtt->mappable_end || 211 unmappable_base < ggtt->mappable_end || 212 unmappable_end > ggtt_end) { 213 DRM_ERROR("Invalid ballooning configuration!\n"); 214 return -EINVAL; 215 } 216 217 /* Unmappable graphic memory ballooning */ 218 if (unmappable_base > ggtt->mappable_end) { 219 ret = vgt_balloon_space(&ggtt->base.mm, 220 &bl_info.space[2], 221 ggtt->mappable_end, 222 unmappable_base); 223 224 if (ret) 225 goto err; 226 } 227 228 /* 229 * No need to partition out the last physical page, 230 * because it is reserved to the guard page. 231 */ 232 if (unmappable_end < ggtt_end - PAGE_SIZE) { 233 ret = vgt_balloon_space(&ggtt->base.mm, 234 &bl_info.space[3], 235 unmappable_end, 236 ggtt_end - PAGE_SIZE); 237 if (ret) 238 goto err; 239 } 240 241 /* Mappable graphic memory ballooning */ 242 if (mappable_base > ggtt->base.start) { 243 ret = vgt_balloon_space(&ggtt->base.mm, 244 &bl_info.space[0], 245 ggtt->base.start, mappable_base); 246 247 if (ret) 248 goto err; 249 } 250 251 if (mappable_end < ggtt->mappable_end) { 252 ret = vgt_balloon_space(&ggtt->base.mm, 253 &bl_info.space[1], 254 mappable_end, 255 ggtt->mappable_end); 256 257 if (ret) 258 goto err; 259 } 260 261 DRM_INFO("VGT balloon successfully\n"); 262 return 0; 263 264 err: 265 DRM_ERROR("VGT balloon fail\n"); 266 intel_vgt_deballoon(dev_priv); 267 return ret; 268 } 269