1 /* 2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #include "intel_drv.h" 25 #include "i915_vgpu.h" 26 27 /** 28 * DOC: Intel GVT-g guest support 29 * 30 * Intel GVT-g is a graphics virtualization technology which shares the 31 * GPU among multiple virtual machines on a time-sharing basis. Each 32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent 33 * features as the underlying physical GPU (pGPU), so i915 driver can run 34 * seamlessly in a virtual machine. This file provides vGPU specific 35 * optimizations when running in a virtual machine, to reduce the complexity 36 * of vGPU emulation and to improve the overall performance. 37 * 38 * A primary function introduced here is so-called "address space ballooning" 39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs, 40 * so each VM can directly access a portion of the memory without hypervisor's 41 * intervention, e.g. filling textures or queuing commands. However with the 42 * partitioning an unmodified i915 driver would assume a smaller graphics 43 * memory starting from address ZERO, then requires vGPU emulation module to 44 * translate the graphics address between 'guest view' and 'host view', for 45 * all registers and command opcodes which contain a graphics memory address. 46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning", 47 * by telling the exact partitioning knowledge to each guest i915 driver, which 48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU 49 * emulation module only needs to scan and validate graphics addresses without 50 * complexity of address translation. 51 * 52 */ 53 54 /** 55 * i915_check_vgpu - detect virtual GPU 56 * @dev_priv: i915 device private 57 * 58 * This function is called at the initialization stage, to detect whether 59 * running on a vGPU. 60 */ 61 void i915_check_vgpu(struct drm_i915_private *dev_priv) 62 { 63 struct intel_uncore *uncore = &dev_priv->uncore; 64 u64 magic; 65 u16 version_major; 66 67 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE); 68 69 magic = __raw_uncore_read64(uncore, vgtif_reg(magic)); 70 if (magic != VGT_MAGIC) 71 return; 72 73 version_major = __raw_uncore_read16(uncore, vgtif_reg(version_major)); 74 if (version_major < VGT_VERSION_MAJOR) { 75 DRM_INFO("VGT interface version mismatch!\n"); 76 return; 77 } 78 79 dev_priv->vgpu.caps = __raw_uncore_read32(uncore, vgtif_reg(vgt_caps)); 80 81 dev_priv->vgpu.active = true; 82 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); 83 } 84 85 bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv) 86 { 87 return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT; 88 } 89 90 struct _balloon_info_ { 91 /* 92 * There are up to 2 regions per mappable/unmappable graphic 93 * memory that might be ballooned. Here, index 0/1 is for mappable 94 * graphic memory, 2/3 for unmappable graphic memory. 95 */ 96 struct drm_mm_node space[4]; 97 }; 98 99 static struct _balloon_info_ bl_info; 100 101 static void vgt_deballoon_space(struct i915_ggtt *ggtt, 102 struct drm_mm_node *node) 103 { 104 DRM_DEBUG_DRIVER("deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n", 105 node->start, 106 node->start + node->size, 107 node->size / 1024); 108 109 ggtt->vm.reserved -= node->size; 110 drm_mm_remove_node(node); 111 } 112 113 /** 114 * intel_vgt_deballoon - deballoon reserved graphics address trunks 115 * @dev_priv: i915 device private data 116 * 117 * This function is called to deallocate the ballooned-out graphic memory, when 118 * driver is unloaded or when ballooning fails. 119 */ 120 void intel_vgt_deballoon(struct drm_i915_private *dev_priv) 121 { 122 int i; 123 124 if (!intel_vgpu_active(dev_priv)) 125 return; 126 127 DRM_DEBUG("VGT deballoon.\n"); 128 129 for (i = 0; i < 4; i++) 130 vgt_deballoon_space(&dev_priv->ggtt, &bl_info.space[i]); 131 } 132 133 static int vgt_balloon_space(struct i915_ggtt *ggtt, 134 struct drm_mm_node *node, 135 unsigned long start, unsigned long end) 136 { 137 unsigned long size = end - start; 138 int ret; 139 140 if (start >= end) 141 return -EINVAL; 142 143 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n", 144 start, end, size / 1024); 145 ret = i915_gem_gtt_reserve(&ggtt->vm, node, 146 size, start, I915_COLOR_UNEVICTABLE, 147 0); 148 if (!ret) 149 ggtt->vm.reserved += size; 150 151 return ret; 152 } 153 154 /** 155 * intel_vgt_balloon - balloon out reserved graphics address trunks 156 * @dev_priv: i915 device private data 157 * 158 * This function is called at the initialization stage, to balloon out the 159 * graphic address space allocated to other vGPUs, by marking these spaces as 160 * reserved. The ballooning related knowledge(starting address and size of 161 * the mappable/unmappable graphic memory) is described in the vgt_if structure 162 * in a reserved mmio range. 163 * 164 * To give an example, the drawing below depicts one typical scenario after 165 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned 166 * out each for the mappable and the non-mappable part. From the vGPU1 point of 167 * view, the total size is the same as the physical one, with the start address 168 * of its graphic space being zero. Yet there are some portions ballooned out( 169 * the shadow part, which are marked as reserved by drm allocator). From the 170 * host point of view, the graphic address space is partitioned by multiple 171 * vGPUs in different VMs. :: 172 * 173 * vGPU1 view Host view 174 * 0 ------> +-----------+ +-----------+ 175 * ^ |###########| | vGPU3 | 176 * | |###########| +-----------+ 177 * | |###########| | vGPU2 | 178 * | +-----------+ +-----------+ 179 * mappable GM | available | ==> | vGPU1 | 180 * | +-----------+ +-----------+ 181 * | |###########| | | 182 * v |###########| | Host | 183 * +=======+===========+ +===========+ 184 * ^ |###########| | vGPU3 | 185 * | |###########| +-----------+ 186 * | |###########| | vGPU2 | 187 * | +-----------+ +-----------+ 188 * unmappable GM | available | ==> | vGPU1 | 189 * | +-----------+ +-----------+ 190 * | |###########| | | 191 * | |###########| | Host | 192 * v |###########| | | 193 * total GM size ------> +-----------+ +-----------+ 194 * 195 * Returns: 196 * zero on success, non-zero if configuration invalid or ballooning failed 197 */ 198 int intel_vgt_balloon(struct drm_i915_private *dev_priv) 199 { 200 struct i915_ggtt *ggtt = &dev_priv->ggtt; 201 unsigned long ggtt_end = ggtt->vm.total; 202 203 unsigned long mappable_base, mappable_size, mappable_end; 204 unsigned long unmappable_base, unmappable_size, unmappable_end; 205 int ret; 206 207 if (!intel_vgpu_active(dev_priv)) 208 return 0; 209 210 mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base)); 211 mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size)); 212 unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base)); 213 unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size)); 214 215 mappable_end = mappable_base + mappable_size; 216 unmappable_end = unmappable_base + unmappable_size; 217 218 DRM_INFO("VGT ballooning configuration:\n"); 219 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n", 220 mappable_base, mappable_size / 1024); 221 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n", 222 unmappable_base, unmappable_size / 1024); 223 224 if (mappable_end > ggtt->mappable_end || 225 unmappable_base < ggtt->mappable_end || 226 unmappable_end > ggtt_end) { 227 DRM_ERROR("Invalid ballooning configuration!\n"); 228 return -EINVAL; 229 } 230 231 /* Unmappable graphic memory ballooning */ 232 if (unmappable_base > ggtt->mappable_end) { 233 ret = vgt_balloon_space(ggtt, &bl_info.space[2], 234 ggtt->mappable_end, unmappable_base); 235 236 if (ret) 237 goto err; 238 } 239 240 if (unmappable_end < ggtt_end) { 241 ret = vgt_balloon_space(ggtt, &bl_info.space[3], 242 unmappable_end, ggtt_end); 243 if (ret) 244 goto err_upon_mappable; 245 } 246 247 /* Mappable graphic memory ballooning */ 248 if (mappable_base) { 249 ret = vgt_balloon_space(ggtt, &bl_info.space[0], 250 0, mappable_base); 251 252 if (ret) 253 goto err_upon_unmappable; 254 } 255 256 if (mappable_end < ggtt->mappable_end) { 257 ret = vgt_balloon_space(ggtt, &bl_info.space[1], 258 mappable_end, ggtt->mappable_end); 259 260 if (ret) 261 goto err_below_mappable; 262 } 263 264 DRM_INFO("VGT balloon successfully\n"); 265 return 0; 266 267 err_below_mappable: 268 vgt_deballoon_space(ggtt, &bl_info.space[0]); 269 err_upon_unmappable: 270 vgt_deballoon_space(ggtt, &bl_info.space[3]); 271 err_upon_mappable: 272 vgt_deballoon_space(ggtt, &bl_info.space[2]); 273 err: 274 DRM_ERROR("VGT balloon fail\n"); 275 return ret; 276 } 277