1 /* 2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #include "intel_drv.h" 25 #include "i915_vgpu.h" 26 27 /** 28 * DOC: Intel GVT-g guest support 29 * 30 * Intel GVT-g is a graphics virtualization technology which shares the 31 * GPU among multiple virtual machines on a time-sharing basis. Each 32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent 33 * features as the underlying physical GPU (pGPU), so i915 driver can run 34 * seamlessly in a virtual machine. This file provides vGPU specific 35 * optimizations when running in a virtual machine, to reduce the complexity 36 * of vGPU emulation and to improve the overall performance. 37 * 38 * A primary function introduced here is so-called "address space ballooning" 39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs, 40 * so each VM can directly access a portion of the memory without hypervisor's 41 * intervention, e.g. filling textures or queuing commands. However with the 42 * partitioning an unmodified i915 driver would assume a smaller graphics 43 * memory starting from address ZERO, then requires vGPU emulation module to 44 * translate the graphics address between 'guest view' and 'host view', for 45 * all registers and command opcodes which contain a graphics memory address. 46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning", 47 * by telling the exact partitioning knowledge to each guest i915 driver, which 48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU 49 * emulation module only needs to scan and validate graphics addresses without 50 * complexity of address translation. 51 * 52 */ 53 54 /** 55 * i915_check_vgpu - detect virtual GPU 56 * @dev_priv: i915 device private 57 * 58 * This function is called at the initialization stage, to detect whether 59 * running on a vGPU. 60 */ 61 void i915_check_vgpu(struct drm_i915_private *dev_priv) 62 { 63 uint64_t magic; 64 uint32_t version; 65 66 BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE); 67 68 magic = __raw_i915_read64(dev_priv, vgtif_reg(magic)); 69 if (magic != VGT_MAGIC) 70 return; 71 72 version = INTEL_VGT_IF_VERSION_ENCODE( 73 __raw_i915_read16(dev_priv, vgtif_reg(version_major)), 74 __raw_i915_read16(dev_priv, vgtif_reg(version_minor))); 75 if (version != INTEL_VGT_IF_VERSION) { 76 DRM_INFO("VGT interface version mismatch!\n"); 77 return; 78 } 79 80 dev_priv->vgpu.active = true; 81 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); 82 } 83 84 struct _balloon_info_ { 85 /* 86 * There are up to 2 regions per mappable/unmappable graphic 87 * memory that might be ballooned. Here, index 0/1 is for mappable 88 * graphic memory, 2/3 for unmappable graphic memory. 89 */ 90 struct drm_mm_node space[4]; 91 }; 92 93 static struct _balloon_info_ bl_info; 94 95 /** 96 * intel_vgt_deballoon - deballoon reserved graphics address trunks 97 * @dev_priv: i915 device private data 98 * 99 * This function is called to deallocate the ballooned-out graphic memory, when 100 * driver is unloaded or when ballooning fails. 101 */ 102 void intel_vgt_deballoon(struct drm_i915_private *dev_priv) 103 { 104 int i; 105 106 if (!intel_vgpu_active(dev_priv)) 107 return; 108 109 DRM_DEBUG("VGT deballoon.\n"); 110 111 for (i = 0; i < 4; i++) { 112 if (bl_info.space[i].allocated) 113 drm_mm_remove_node(&bl_info.space[i]); 114 } 115 116 memset(&bl_info, 0, sizeof(bl_info)); 117 } 118 119 static int vgt_balloon_space(struct i915_ggtt *ggtt, 120 struct drm_mm_node *node, 121 unsigned long start, unsigned long end) 122 { 123 unsigned long size = end - start; 124 125 if (start >= end) 126 return -EINVAL; 127 128 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n", 129 start, end, size / 1024); 130 return i915_gem_gtt_reserve(&ggtt->base, node, 131 size, start, I915_COLOR_UNEVICTABLE, 132 0); 133 } 134 135 /** 136 * intel_vgt_balloon - balloon out reserved graphics address trunks 137 * @dev_priv: i915 device private data 138 * 139 * This function is called at the initialization stage, to balloon out the 140 * graphic address space allocated to other vGPUs, by marking these spaces as 141 * reserved. The ballooning related knowledge(starting address and size of 142 * the mappable/unmappable graphic memory) is described in the vgt_if structure 143 * in a reserved mmio range. 144 * 145 * To give an example, the drawing below depicts one typical scenario after 146 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned 147 * out each for the mappable and the non-mappable part. From the vGPU1 point of 148 * view, the total size is the same as the physical one, with the start address 149 * of its graphic space being zero. Yet there are some portions ballooned out( 150 * the shadow part, which are marked as reserved by drm allocator). From the 151 * host point of view, the graphic address space is partitioned by multiple 152 * vGPUs in different VMs. :: 153 * 154 * vGPU1 view Host view 155 * 0 ------> +-----------+ +-----------+ 156 * ^ |###########| | vGPU3 | 157 * | |###########| +-----------+ 158 * | |###########| | vGPU2 | 159 * | +-----------+ +-----------+ 160 * mappable GM | available | ==> | vGPU1 | 161 * | +-----------+ +-----------+ 162 * | |###########| | | 163 * v |###########| | Host | 164 * +=======+===========+ +===========+ 165 * ^ |###########| | vGPU3 | 166 * | |###########| +-----------+ 167 * | |###########| | vGPU2 | 168 * | +-----------+ +-----------+ 169 * unmappable GM | available | ==> | vGPU1 | 170 * | +-----------+ +-----------+ 171 * | |###########| | | 172 * | |###########| | Host | 173 * v |###########| | | 174 * total GM size ------> +-----------+ +-----------+ 175 * 176 * Returns: 177 * zero on success, non-zero if configuration invalid or ballooning failed 178 */ 179 int intel_vgt_balloon(struct drm_i915_private *dev_priv) 180 { 181 struct i915_ggtt *ggtt = &dev_priv->ggtt; 182 unsigned long ggtt_end = ggtt->base.start + ggtt->base.total; 183 184 unsigned long mappable_base, mappable_size, mappable_end; 185 unsigned long unmappable_base, unmappable_size, unmappable_end; 186 int ret; 187 188 if (!intel_vgpu_active(dev_priv)) 189 return 0; 190 191 mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base)); 192 mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size)); 193 unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base)); 194 unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size)); 195 196 mappable_end = mappable_base + mappable_size; 197 unmappable_end = unmappable_base + unmappable_size; 198 199 DRM_INFO("VGT ballooning configuration:\n"); 200 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n", 201 mappable_base, mappable_size / 1024); 202 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n", 203 unmappable_base, unmappable_size / 1024); 204 205 if (mappable_base < ggtt->base.start || 206 mappable_end > ggtt->mappable_end || 207 unmappable_base < ggtt->mappable_end || 208 unmappable_end > ggtt_end) { 209 DRM_ERROR("Invalid ballooning configuration!\n"); 210 return -EINVAL; 211 } 212 213 /* Unmappable graphic memory ballooning */ 214 if (unmappable_base > ggtt->mappable_end) { 215 ret = vgt_balloon_space(ggtt, &bl_info.space[2], 216 ggtt->mappable_end, unmappable_base); 217 218 if (ret) 219 goto err; 220 } 221 222 /* 223 * No need to partition out the last physical page, 224 * because it is reserved to the guard page. 225 */ 226 if (unmappable_end < ggtt_end - PAGE_SIZE) { 227 ret = vgt_balloon_space(ggtt, &bl_info.space[3], 228 unmappable_end, ggtt_end - PAGE_SIZE); 229 if (ret) 230 goto err; 231 } 232 233 /* Mappable graphic memory ballooning */ 234 if (mappable_base > ggtt->base.start) { 235 ret = vgt_balloon_space(ggtt, &bl_info.space[0], 236 ggtt->base.start, mappable_base); 237 238 if (ret) 239 goto err; 240 } 241 242 if (mappable_end < ggtt->mappable_end) { 243 ret = vgt_balloon_space(ggtt, &bl_info.space[1], 244 mappable_end, ggtt->mappable_end); 245 246 if (ret) 247 goto err; 248 } 249 250 DRM_INFO("VGT balloon successfully\n"); 251 return 0; 252 253 err: 254 DRM_ERROR("VGT balloon fail\n"); 255 intel_vgt_deballoon(dev_priv); 256 return ret; 257 } 258