xref: /openbmc/linux/drivers/gpu/drm/i915/i915_vgpu.c (revision 15a1fbdcfb519c2bd291ed01c6c94e0b89537a77)
1 /*
2  * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  */
23 
24 #include "i915_vgpu.h"
25 
26 /**
27  * DOC: Intel GVT-g guest support
28  *
29  * Intel GVT-g is a graphics virtualization technology which shares the
30  * GPU among multiple virtual machines on a time-sharing basis. Each
31  * virtual machine is presented a virtual GPU (vGPU), which has equivalent
32  * features as the underlying physical GPU (pGPU), so i915 driver can run
33  * seamlessly in a virtual machine. This file provides vGPU specific
34  * optimizations when running in a virtual machine, to reduce the complexity
35  * of vGPU emulation and to improve the overall performance.
36  *
37  * A primary function introduced here is so-called "address space ballooning"
38  * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
39  * so each VM can directly access a portion of the memory without hypervisor's
40  * intervention, e.g. filling textures or queuing commands. However with the
41  * partitioning an unmodified i915 driver would assume a smaller graphics
42  * memory starting from address ZERO, then requires vGPU emulation module to
43  * translate the graphics address between 'guest view' and 'host view', for
44  * all registers and command opcodes which contain a graphics memory address.
45  * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
46  * by telling the exact partitioning knowledge to each guest i915 driver, which
47  * then reserves and prevents non-allocated portions from allocation. Thus vGPU
48  * emulation module only needs to scan and validate graphics addresses without
49  * complexity of address translation.
50  *
51  */
52 
53 /**
54  * i915_detect_vgpu - detect virtual GPU
55  * @dev_priv: i915 device private
56  *
57  * This function is called at the initialization stage, to detect whether
58  * running on a vGPU.
59  */
60 void i915_detect_vgpu(struct drm_i915_private *dev_priv)
61 {
62 	struct pci_dev *pdev = dev_priv->drm.pdev;
63 	u64 magic;
64 	u16 version_major;
65 	void __iomem *shared_area;
66 
67 	BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
68 
69 	/*
70 	 * This is called before we setup the main MMIO BAR mappings used via
71 	 * the uncore structure, so we need to access the BAR directly. Since
72 	 * we do not support VGT on older gens, return early so we don't have
73 	 * to consider differently numbered or sized MMIO bars
74 	 */
75 	if (INTEL_GEN(dev_priv) < 6)
76 		return;
77 
78 	shared_area = pci_iomap_range(pdev, 0, VGT_PVINFO_PAGE, VGT_PVINFO_SIZE);
79 	if (!shared_area) {
80 		drm_err(&dev_priv->drm,
81 			"failed to map MMIO bar to check for VGT\n");
82 		return;
83 	}
84 
85 	magic = readq(shared_area + vgtif_offset(magic));
86 	if (magic != VGT_MAGIC)
87 		goto out;
88 
89 	version_major = readw(shared_area + vgtif_offset(version_major));
90 	if (version_major < VGT_VERSION_MAJOR) {
91 		drm_info(&dev_priv->drm, "VGT interface version mismatch!\n");
92 		goto out;
93 	}
94 
95 	dev_priv->vgpu.caps = readl(shared_area + vgtif_offset(vgt_caps));
96 
97 	dev_priv->vgpu.active = true;
98 	mutex_init(&dev_priv->vgpu.lock);
99 	drm_info(&dev_priv->drm, "Virtual GPU for Intel GVT-g detected.\n");
100 
101 out:
102 	pci_iounmap(pdev, shared_area);
103 }
104 
105 bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)
106 {
107 	return dev_priv->vgpu.caps & VGT_CAPS_FULL_PPGTT;
108 }
109 
110 struct _balloon_info_ {
111 	/*
112 	 * There are up to 2 regions per mappable/unmappable graphic
113 	 * memory that might be ballooned. Here, index 0/1 is for mappable
114 	 * graphic memory, 2/3 for unmappable graphic memory.
115 	 */
116 	struct drm_mm_node space[4];
117 };
118 
119 static struct _balloon_info_ bl_info;
120 
121 static void vgt_deballoon_space(struct i915_ggtt *ggtt,
122 				struct drm_mm_node *node)
123 {
124 	struct drm_i915_private *dev_priv = ggtt->vm.i915;
125 	if (!drm_mm_node_allocated(node))
126 		return;
127 
128 	drm_dbg(&dev_priv->drm,
129 		"deballoon space: range [0x%llx - 0x%llx] %llu KiB.\n",
130 		node->start,
131 		node->start + node->size,
132 		node->size / 1024);
133 
134 	ggtt->vm.reserved -= node->size;
135 	drm_mm_remove_node(node);
136 }
137 
138 /**
139  * intel_vgt_deballoon - deballoon reserved graphics address trunks
140  * @ggtt: the global GGTT from which we reserved earlier
141  *
142  * This function is called to deallocate the ballooned-out graphic memory, when
143  * driver is unloaded or when ballooning fails.
144  */
145 void intel_vgt_deballoon(struct i915_ggtt *ggtt)
146 {
147 	struct drm_i915_private *dev_priv = ggtt->vm.i915;
148 	int i;
149 
150 	if (!intel_vgpu_active(ggtt->vm.i915))
151 		return;
152 
153 	drm_dbg(&dev_priv->drm, "VGT deballoon.\n");
154 
155 	for (i = 0; i < 4; i++)
156 		vgt_deballoon_space(ggtt, &bl_info.space[i]);
157 }
158 
159 static int vgt_balloon_space(struct i915_ggtt *ggtt,
160 			     struct drm_mm_node *node,
161 			     unsigned long start, unsigned long end)
162 {
163 	struct drm_i915_private *dev_priv = ggtt->vm.i915;
164 	unsigned long size = end - start;
165 	int ret;
166 
167 	if (start >= end)
168 		return -EINVAL;
169 
170 	drm_info(&dev_priv->drm,
171 		 "balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
172 		 start, end, size / 1024);
173 	ret = i915_gem_gtt_reserve(&ggtt->vm, node,
174 				   size, start, I915_COLOR_UNEVICTABLE,
175 				   0);
176 	if (!ret)
177 		ggtt->vm.reserved += size;
178 
179 	return ret;
180 }
181 
182 /**
183  * intel_vgt_balloon - balloon out reserved graphics address trunks
184  * @ggtt: the global GGTT from which to reserve
185  *
186  * This function is called at the initialization stage, to balloon out the
187  * graphic address space allocated to other vGPUs, by marking these spaces as
188  * reserved. The ballooning related knowledge(starting address and size of
189  * the mappable/unmappable graphic memory) is described in the vgt_if structure
190  * in a reserved mmio range.
191  *
192  * To give an example, the drawing below depicts one typical scenario after
193  * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
194  * out each for the mappable and the non-mappable part. From the vGPU1 point of
195  * view, the total size is the same as the physical one, with the start address
196  * of its graphic space being zero. Yet there are some portions ballooned out(
197  * the shadow part, which are marked as reserved by drm allocator). From the
198  * host point of view, the graphic address space is partitioned by multiple
199  * vGPUs in different VMs. ::
200  *
201  *                         vGPU1 view         Host view
202  *              0 ------> +-----------+     +-----------+
203  *                ^       |###########|     |   vGPU3   |
204  *                |       |###########|     +-----------+
205  *                |       |###########|     |   vGPU2   |
206  *                |       +-----------+     +-----------+
207  *         mappable GM    | available | ==> |   vGPU1   |
208  *                |       +-----------+     +-----------+
209  *                |       |###########|     |           |
210  *                v       |###########|     |   Host    |
211  *                +=======+===========+     +===========+
212  *                ^       |###########|     |   vGPU3   |
213  *                |       |###########|     +-----------+
214  *                |       |###########|     |   vGPU2   |
215  *                |       +-----------+     +-----------+
216  *       unmappable GM    | available | ==> |   vGPU1   |
217  *                |       +-----------+     +-----------+
218  *                |       |###########|     |           |
219  *                |       |###########|     |   Host    |
220  *                v       |###########|     |           |
221  *  total GM size ------> +-----------+     +-----------+
222  *
223  * Returns:
224  * zero on success, non-zero if configuration invalid or ballooning failed
225  */
226 int intel_vgt_balloon(struct i915_ggtt *ggtt)
227 {
228 	struct drm_i915_private *dev_priv = ggtt->vm.i915;
229 	struct intel_uncore *uncore = &dev_priv->uncore;
230 	unsigned long ggtt_end = ggtt->vm.total;
231 
232 	unsigned long mappable_base, mappable_size, mappable_end;
233 	unsigned long unmappable_base, unmappable_size, unmappable_end;
234 	int ret;
235 
236 	if (!intel_vgpu_active(ggtt->vm.i915))
237 		return 0;
238 
239 	mappable_base =
240 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base));
241 	mappable_size =
242 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size));
243 	unmappable_base =
244 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base));
245 	unmappable_size =
246 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size));
247 
248 	mappable_end = mappable_base + mappable_size;
249 	unmappable_end = unmappable_base + unmappable_size;
250 
251 	drm_info(&dev_priv->drm, "VGT ballooning configuration:\n");
252 	drm_info(&dev_priv->drm,
253 		 "Mappable graphic memory: base 0x%lx size %ldKiB\n",
254 		 mappable_base, mappable_size / 1024);
255 	drm_info(&dev_priv->drm,
256 		 "Unmappable graphic memory: base 0x%lx size %ldKiB\n",
257 		 unmappable_base, unmappable_size / 1024);
258 
259 	if (mappable_end > ggtt->mappable_end ||
260 	    unmappable_base < ggtt->mappable_end ||
261 	    unmappable_end > ggtt_end) {
262 		drm_err(&dev_priv->drm, "Invalid ballooning configuration!\n");
263 		return -EINVAL;
264 	}
265 
266 	/* Unmappable graphic memory ballooning */
267 	if (unmappable_base > ggtt->mappable_end) {
268 		ret = vgt_balloon_space(ggtt, &bl_info.space[2],
269 					ggtt->mappable_end, unmappable_base);
270 
271 		if (ret)
272 			goto err;
273 	}
274 
275 	if (unmappable_end < ggtt_end) {
276 		ret = vgt_balloon_space(ggtt, &bl_info.space[3],
277 					unmappable_end, ggtt_end);
278 		if (ret)
279 			goto err_upon_mappable;
280 	}
281 
282 	/* Mappable graphic memory ballooning */
283 	if (mappable_base) {
284 		ret = vgt_balloon_space(ggtt, &bl_info.space[0],
285 					0, mappable_base);
286 
287 		if (ret)
288 			goto err_upon_unmappable;
289 	}
290 
291 	if (mappable_end < ggtt->mappable_end) {
292 		ret = vgt_balloon_space(ggtt, &bl_info.space[1],
293 					mappable_end, ggtt->mappable_end);
294 
295 		if (ret)
296 			goto err_below_mappable;
297 	}
298 
299 	drm_info(&dev_priv->drm, "VGT balloon successfully\n");
300 	return 0;
301 
302 err_below_mappable:
303 	vgt_deballoon_space(ggtt, &bl_info.space[0]);
304 err_upon_unmappable:
305 	vgt_deballoon_space(ggtt, &bl_info.space[3]);
306 err_upon_mappable:
307 	vgt_deballoon_space(ggtt, &bl_info.space[2]);
308 err:
309 	drm_err(&dev_priv->drm, "VGT balloon fail\n");
310 	return ret;
311 }
312