1 /*
2  * Copyright © 2008-2018 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  */
24 
25 #ifndef I915_REQUEST_H
26 #define I915_REQUEST_H
27 
28 #include <linux/dma-fence.h>
29 #include <linux/lockdep.h>
30 
31 #include "i915_gem.h"
32 #include "i915_scheduler.h"
33 #include "i915_selftest.h"
34 #include "i915_sw_fence.h"
35 
36 #include <uapi/drm/i915_drm.h>
37 
38 struct drm_file;
39 struct drm_i915_gem_object;
40 struct i915_request;
41 struct i915_timeline;
42 struct i915_timeline_cacheline;
43 
44 struct i915_capture_list {
45 	struct i915_capture_list *next;
46 	struct i915_vma *vma;
47 };
48 
49 enum {
50 	/*
51 	 * I915_FENCE_FLAG_ACTIVE - this request is currently submitted to HW.
52 	 *
53 	 * Set by __i915_request_submit() on handing over to HW, and cleared
54 	 * by __i915_request_unsubmit() if we preempt this request.
55 	 *
56 	 * Finally cleared for consistency on retiring the request, when
57 	 * we know the HW is no longer running this request.
58 	 *
59 	 * See i915_request_is_active()
60 	 */
61 	I915_FENCE_FLAG_ACTIVE = DMA_FENCE_FLAG_USER_BITS,
62 
63 	/*
64 	 * I915_FENCE_FLAG_SIGNAL - this request is currently on signal_list
65 	 *
66 	 * Internal bookkeeping used by the breadcrumb code to track when
67 	 * a request is on the various signal_list.
68 	 */
69 	I915_FENCE_FLAG_SIGNAL,
70 };
71 
72 /**
73  * Request queue structure.
74  *
75  * The request queue allows us to note sequence numbers that have been emitted
76  * and may be associated with active buffers to be retired.
77  *
78  * By keeping this list, we can avoid having to do questionable sequence
79  * number comparisons on buffer last_read|write_seqno. It also allows an
80  * emission time to be associated with the request for tracking how far ahead
81  * of the GPU the submission is.
82  *
83  * When modifying this structure be very aware that we perform a lockless
84  * RCU lookup of it that may race against reallocation of the struct
85  * from the slab freelist. We intentionally do not zero the structure on
86  * allocation so that the lookup can use the dangling pointers (and is
87  * cogniscent that those pointers may be wrong). Instead, everything that
88  * needs to be initialised must be done so explicitly.
89  *
90  * The requests are reference counted.
91  */
92 struct i915_request {
93 	struct dma_fence fence;
94 	spinlock_t lock;
95 
96 	/** On Which ring this request was generated */
97 	struct drm_i915_private *i915;
98 
99 	/**
100 	 * Context and ring buffer related to this request
101 	 * Contexts are refcounted, so when this request is associated with a
102 	 * context, we must increment the context's refcount, to guarantee that
103 	 * it persists while any request is linked to it. Requests themselves
104 	 * are also refcounted, so the request will only be freed when the last
105 	 * reference to it is dismissed, and the code in
106 	 * i915_request_free() will then decrement the refcount on the
107 	 * context.
108 	 */
109 	struct i915_gem_context *gem_context;
110 	struct intel_engine_cs *engine;
111 	struct intel_context *hw_context;
112 	struct intel_ring *ring;
113 	struct i915_timeline *timeline;
114 	struct list_head signal_link;
115 
116 	/*
117 	 * The rcu epoch of when this request was allocated. Used to judiciously
118 	 * apply backpressure on future allocations to ensure that under
119 	 * mempressure there is sufficient RCU ticks for us to reclaim our
120 	 * RCU protected slabs.
121 	 */
122 	unsigned long rcustate;
123 
124 	/*
125 	 * We pin the timeline->mutex while constructing the request to
126 	 * ensure that no caller accidentally drops it during construction.
127 	 * The timeline->mutex must be held to ensure that only this caller
128 	 * can use the ring and manipulate the associated timeline during
129 	 * construction.
130 	 */
131 	struct pin_cookie cookie;
132 
133 	/*
134 	 * Fences for the various phases in the request's lifetime.
135 	 *
136 	 * The submit fence is used to await upon all of the request's
137 	 * dependencies. When it is signaled, the request is ready to run.
138 	 * It is used by the driver to then queue the request for execution.
139 	 */
140 	struct i915_sw_fence submit;
141 	union {
142 		wait_queue_entry_t submitq;
143 		struct i915_sw_dma_fence_cb dmaq;
144 	};
145 	struct list_head execute_cb;
146 	struct i915_sw_fence semaphore;
147 
148 	/*
149 	 * A list of everyone we wait upon, and everyone who waits upon us.
150 	 * Even though we will not be submitted to the hardware before the
151 	 * submit fence is signaled (it waits for all external events as well
152 	 * as our own requests), the scheduler still needs to know the
153 	 * dependency tree for the lifetime of the request (from execbuf
154 	 * to retirement), i.e. bidirectional dependency information for the
155 	 * request not tied to individual fences.
156 	 */
157 	struct i915_sched_node sched;
158 	struct i915_dependency dep;
159 
160 	/*
161 	 * A convenience pointer to the current breadcrumb value stored in
162 	 * the HW status page (or our timeline's local equivalent). The full
163 	 * path would be rq->hw_context->ring->timeline->hwsp_seqno.
164 	 */
165 	const u32 *hwsp_seqno;
166 
167 	/*
168 	 * If we need to access the timeline's seqno for this request in
169 	 * another request, we need to keep a read reference to this associated
170 	 * cacheline, so that we do not free and recycle it before the foreign
171 	 * observers have completed. Hence, we keep a pointer to the cacheline
172 	 * inside the timeline's HWSP vma, but it is only valid while this
173 	 * request has not completed and guarded by the timeline mutex.
174 	 */
175 	struct i915_timeline_cacheline *hwsp_cacheline;
176 
177 	/** Position in the ring of the start of the request */
178 	u32 head;
179 
180 	/** Position in the ring of the start of the user packets */
181 	u32 infix;
182 
183 	/**
184 	 * Position in the ring of the start of the postfix.
185 	 * This is required to calculate the maximum available ring space
186 	 * without overwriting the postfix.
187 	 */
188 	u32 postfix;
189 
190 	/** Position in the ring of the end of the whole request */
191 	u32 tail;
192 
193 	/** Position in the ring of the end of any workarounds after the tail */
194 	u32 wa_tail;
195 
196 	/** Preallocate space in the ring for the emitting the request */
197 	u32 reserved_space;
198 
199 	/** Batch buffer related to this request if any (used for
200 	 * error state dump only).
201 	 */
202 	struct i915_vma *batch;
203 	/**
204 	 * Additional buffers requested by userspace to be captured upon
205 	 * a GPU hang. The vma/obj on this list are protected by their
206 	 * active reference - all objects on this list must also be
207 	 * on the active_list (of their final request).
208 	 */
209 	struct i915_capture_list *capture_list;
210 	struct list_head active_list;
211 
212 	/** Time at which this request was emitted, in jiffies. */
213 	unsigned long emitted_jiffies;
214 
215 	bool waitboost;
216 
217 	/** engine->request_list entry for this request */
218 	struct list_head link;
219 
220 	/** ring->request_list entry for this request */
221 	struct list_head ring_link;
222 
223 	struct drm_i915_file_private *file_priv;
224 	/** file_priv list entry for this request */
225 	struct list_head client_link;
226 
227 	I915_SELFTEST_DECLARE(struct {
228 		struct list_head link;
229 		unsigned long delay;
230 	} mock;)
231 };
232 
233 #define I915_FENCE_GFP (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
234 
235 extern const struct dma_fence_ops i915_fence_ops;
236 
237 static inline bool dma_fence_is_i915(const struct dma_fence *fence)
238 {
239 	return fence->ops == &i915_fence_ops;
240 }
241 
242 struct i915_request * __must_check
243 i915_request_alloc(struct intel_engine_cs *engine,
244 		   struct i915_gem_context *ctx);
245 void i915_request_retire_upto(struct i915_request *rq);
246 
247 static inline struct i915_request *
248 to_request(struct dma_fence *fence)
249 {
250 	/* We assume that NULL fence/request are interoperable */
251 	BUILD_BUG_ON(offsetof(struct i915_request, fence) != 0);
252 	GEM_BUG_ON(fence && !dma_fence_is_i915(fence));
253 	return container_of(fence, struct i915_request, fence);
254 }
255 
256 static inline struct i915_request *
257 i915_request_get(struct i915_request *rq)
258 {
259 	return to_request(dma_fence_get(&rq->fence));
260 }
261 
262 static inline struct i915_request *
263 i915_request_get_rcu(struct i915_request *rq)
264 {
265 	return to_request(dma_fence_get_rcu(&rq->fence));
266 }
267 
268 static inline void
269 i915_request_put(struct i915_request *rq)
270 {
271 	dma_fence_put(&rq->fence);
272 }
273 
274 int i915_request_await_object(struct i915_request *to,
275 			      struct drm_i915_gem_object *obj,
276 			      bool write);
277 int i915_request_await_dma_fence(struct i915_request *rq,
278 				 struct dma_fence *fence);
279 
280 void i915_request_add(struct i915_request *rq);
281 
282 void __i915_request_submit(struct i915_request *request);
283 void i915_request_submit(struct i915_request *request);
284 
285 void i915_request_skip(struct i915_request *request, int error);
286 
287 void __i915_request_unsubmit(struct i915_request *request);
288 void i915_request_unsubmit(struct i915_request *request);
289 
290 /* Note: part of the intel_breadcrumbs family */
291 bool i915_request_enable_breadcrumb(struct i915_request *request);
292 void i915_request_cancel_breadcrumb(struct i915_request *request);
293 
294 long i915_request_wait(struct i915_request *rq,
295 		       unsigned int flags,
296 		       long timeout)
297 	__attribute__((nonnull(1)));
298 #define I915_WAIT_INTERRUPTIBLE	BIT(0)
299 #define I915_WAIT_LOCKED	BIT(1) /* struct_mutex held, handle GPU reset */
300 #define I915_WAIT_PRIORITY	BIT(2) /* small priority bump for the request */
301 #define I915_WAIT_ALL		BIT(3) /* used by i915_gem_object_wait() */
302 #define I915_WAIT_FOR_IDLE_BOOST BIT(4)
303 
304 static inline bool i915_request_signaled(const struct i915_request *rq)
305 {
306 	/* The request may live longer than its HWSP, so check flags first! */
307 	return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags);
308 }
309 
310 static inline bool i915_request_is_active(const struct i915_request *rq)
311 {
312 	return test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);
313 }
314 
315 /**
316  * Returns true if seq1 is later than seq2.
317  */
318 static inline bool i915_seqno_passed(u32 seq1, u32 seq2)
319 {
320 	return (s32)(seq1 - seq2) >= 0;
321 }
322 
323 static inline u32 __hwsp_seqno(const struct i915_request *rq)
324 {
325 	return READ_ONCE(*rq->hwsp_seqno);
326 }
327 
328 /**
329  * hwsp_seqno - the current breadcrumb value in the HW status page
330  * @rq: the request, to chase the relevant HW status page
331  *
332  * The emphasis in naming here is that hwsp_seqno() is not a property of the
333  * request, but an indication of the current HW state (associated with this
334  * request). Its value will change as the GPU executes more requests.
335  *
336  * Returns the current breadcrumb value in the associated HW status page (or
337  * the local timeline's equivalent) for this request. The request itself
338  * has the associated breadcrumb value of rq->fence.seqno, when the HW
339  * status page has that breadcrumb or later, this request is complete.
340  */
341 static inline u32 hwsp_seqno(const struct i915_request *rq)
342 {
343 	u32 seqno;
344 
345 	rcu_read_lock(); /* the HWSP may be freed at runtime */
346 	seqno = __hwsp_seqno(rq);
347 	rcu_read_unlock();
348 
349 	return seqno;
350 }
351 
352 static inline bool __i915_request_has_started(const struct i915_request *rq)
353 {
354 	return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno - 1);
355 }
356 
357 /**
358  * i915_request_started - check if the request has begun being executed
359  * @rq: the request
360  *
361  * If the timeline is not using initial breadcrumbs, a request is
362  * considered started if the previous request on its timeline (i.e.
363  * context) has been signaled.
364  *
365  * If the timeline is using semaphores, it will also be emitting an
366  * "initial breadcrumb" after the semaphores are complete and just before
367  * it began executing the user payload. A request can therefore be active
368  * on the HW and not yet started as it is still busywaiting on its
369  * dependencies (via HW semaphores).
370  *
371  * If the request has started, its dependencies will have been signaled
372  * (either by fences or by semaphores) and it will have begun processing
373  * the user payload.
374  *
375  * However, even if a request has started, it may have been preempted and
376  * so no longer active, or it may have already completed.
377  *
378  * See also i915_request_is_active().
379  *
380  * Returns true if the request has begun executing the user payload, or
381  * has completed:
382  */
383 static inline bool i915_request_started(const struct i915_request *rq)
384 {
385 	if (i915_request_signaled(rq))
386 		return true;
387 
388 	/* Remember: started but may have since been preempted! */
389 	return __i915_request_has_started(rq);
390 }
391 
392 /**
393  * i915_request_is_running - check if the request may actually be executing
394  * @rq: the request
395  *
396  * Returns true if the request is currently submitted to hardware, has passed
397  * its start point (i.e. the context is setup and not busywaiting). Note that
398  * it may no longer be running by the time the function returns!
399  */
400 static inline bool i915_request_is_running(const struct i915_request *rq)
401 {
402 	if (!i915_request_is_active(rq))
403 		return false;
404 
405 	return __i915_request_has_started(rq);
406 }
407 
408 static inline bool i915_request_completed(const struct i915_request *rq)
409 {
410 	if (i915_request_signaled(rq))
411 		return true;
412 
413 	return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno);
414 }
415 
416 static inline void i915_request_mark_complete(struct i915_request *rq)
417 {
418 	rq->hwsp_seqno = (u32 *)&rq->fence.seqno; /* decouple from HWSP */
419 }
420 
421 void i915_retire_requests(struct drm_i915_private *i915);
422 
423 #endif /* I915_REQUEST_H */
424