1 /* 2 * Copyright © 2008-2018 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #ifndef I915_REQUEST_H 26 #define I915_REQUEST_H 27 28 #include <linux/dma-fence.h> 29 #include <linux/irq_work.h> 30 #include <linux/lockdep.h> 31 32 #include "gem/i915_gem_context_types.h" 33 #include "gt/intel_context_types.h" 34 #include "gt/intel_engine_types.h" 35 #include "gt/intel_timeline_types.h" 36 37 #include "i915_gem.h" 38 #include "i915_scheduler.h" 39 #include "i915_selftest.h" 40 #include "i915_sw_fence.h" 41 42 #include <uapi/drm/i915_drm.h> 43 44 struct drm_file; 45 struct drm_i915_gem_object; 46 struct i915_request; 47 48 struct i915_capture_list { 49 struct i915_capture_list *next; 50 struct i915_vma *vma; 51 }; 52 53 #define RQ_TRACE(rq, fmt, ...) do { \ 54 const struct i915_request *rq__ = (rq); \ 55 ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \ 56 rq__->fence.context, rq__->fence.seqno, \ 57 hwsp_seqno(rq__), ##__VA_ARGS__); \ 58 } while (0) 59 60 enum { 61 /* 62 * I915_FENCE_FLAG_ACTIVE - this request is currently submitted to HW. 63 * 64 * Set by __i915_request_submit() on handing over to HW, and cleared 65 * by __i915_request_unsubmit() if we preempt this request. 66 * 67 * Finally cleared for consistency on retiring the request, when 68 * we know the HW is no longer running this request. 69 * 70 * See i915_request_is_active() 71 */ 72 I915_FENCE_FLAG_ACTIVE = DMA_FENCE_FLAG_USER_BITS, 73 74 /* 75 * I915_FENCE_FLAG_PQUEUE - this request is ready for execution 76 * 77 * Using the scheduler, when a request is ready for execution it is put 78 * into the priority queue, and removed from that queue when transferred 79 * to the HW runlists. We want to track its membership within the 80 * priority queue so that we can easily check before rescheduling. 81 * 82 * See i915_request_in_priority_queue() 83 */ 84 I915_FENCE_FLAG_PQUEUE, 85 86 /* 87 * I915_FENCE_FLAG_HOLD - this request is currently on hold 88 * 89 * This request has been suspended, pending an ongoing investigation. 90 */ 91 I915_FENCE_FLAG_HOLD, 92 93 /* 94 * I915_FENCE_FLAG_INITIAL_BREADCRUMB - this request has the initial 95 * breadcrumb that marks the end of semaphore waits and start of the 96 * user payload. 97 */ 98 I915_FENCE_FLAG_INITIAL_BREADCRUMB, 99 100 /* 101 * I915_FENCE_FLAG_SIGNAL - this request is currently on signal_list 102 * 103 * Internal bookkeeping used by the breadcrumb code to track when 104 * a request is on the various signal_list. 105 */ 106 I915_FENCE_FLAG_SIGNAL, 107 108 /* 109 * I915_FENCE_FLAG_NOPREEMPT - this request should not be preempted 110 * 111 * The execution of some requests should not be interrupted. This is 112 * a sensitive operation as it makes the request super important, 113 * blocking other higher priority work. Abuse of this flag will 114 * lead to quality of service issues. 115 */ 116 I915_FENCE_FLAG_NOPREEMPT, 117 118 /* 119 * I915_FENCE_FLAG_SENTINEL - this request should be last in the queue 120 * 121 * A high priority sentinel request may be submitted to clear the 122 * submission queue. As it will be the only request in-flight, upon 123 * execution all other active requests will have been preempted and 124 * unsubmitted. This preemptive pulse is used to re-evaluate the 125 * in-flight requests, particularly in cases where an active context 126 * is banned and those active requests need to be cancelled. 127 */ 128 I915_FENCE_FLAG_SENTINEL, 129 130 /* 131 * I915_FENCE_FLAG_BOOST - upclock the gpu for this request 132 * 133 * Some requests are more important than others! In particular, a 134 * request that the user is waiting on is typically required for 135 * interactive latency, for which we want to minimise by upclocking 136 * the GPU. Here we track such boost requests on a per-request basis. 137 */ 138 I915_FENCE_FLAG_BOOST, 139 }; 140 141 /** 142 * Request queue structure. 143 * 144 * The request queue allows us to note sequence numbers that have been emitted 145 * and may be associated with active buffers to be retired. 146 * 147 * By keeping this list, we can avoid having to do questionable sequence 148 * number comparisons on buffer last_read|write_seqno. It also allows an 149 * emission time to be associated with the request for tracking how far ahead 150 * of the GPU the submission is. 151 * 152 * When modifying this structure be very aware that we perform a lockless 153 * RCU lookup of it that may race against reallocation of the struct 154 * from the slab freelist. We intentionally do not zero the structure on 155 * allocation so that the lookup can use the dangling pointers (and is 156 * cogniscent that those pointers may be wrong). Instead, everything that 157 * needs to be initialised must be done so explicitly. 158 * 159 * The requests are reference counted. 160 */ 161 struct i915_request { 162 struct dma_fence fence; 163 spinlock_t lock; 164 165 /** 166 * Context and ring buffer related to this request 167 * Contexts are refcounted, so when this request is associated with a 168 * context, we must increment the context's refcount, to guarantee that 169 * it persists while any request is linked to it. Requests themselves 170 * are also refcounted, so the request will only be freed when the last 171 * reference to it is dismissed, and the code in 172 * i915_request_free() will then decrement the refcount on the 173 * context. 174 */ 175 struct intel_engine_cs *engine; 176 struct intel_context *context; 177 struct intel_ring *ring; 178 struct intel_timeline __rcu *timeline; 179 struct list_head signal_link; 180 181 /* 182 * The rcu epoch of when this request was allocated. Used to judiciously 183 * apply backpressure on future allocations to ensure that under 184 * mempressure there is sufficient RCU ticks for us to reclaim our 185 * RCU protected slabs. 186 */ 187 unsigned long rcustate; 188 189 /* 190 * We pin the timeline->mutex while constructing the request to 191 * ensure that no caller accidentally drops it during construction. 192 * The timeline->mutex must be held to ensure that only this caller 193 * can use the ring and manipulate the associated timeline during 194 * construction. 195 */ 196 struct pin_cookie cookie; 197 198 /* 199 * Fences for the various phases in the request's lifetime. 200 * 201 * The submit fence is used to await upon all of the request's 202 * dependencies. When it is signaled, the request is ready to run. 203 * It is used by the driver to then queue the request for execution. 204 */ 205 struct i915_sw_fence submit; 206 union { 207 wait_queue_entry_t submitq; 208 struct i915_sw_dma_fence_cb dmaq; 209 struct i915_request_duration_cb { 210 struct dma_fence_cb cb; 211 ktime_t emitted; 212 } duration; 213 }; 214 struct llist_head execute_cb; 215 struct i915_sw_fence semaphore; 216 217 /* 218 * A list of everyone we wait upon, and everyone who waits upon us. 219 * Even though we will not be submitted to the hardware before the 220 * submit fence is signaled (it waits for all external events as well 221 * as our own requests), the scheduler still needs to know the 222 * dependency tree for the lifetime of the request (from execbuf 223 * to retirement), i.e. bidirectional dependency information for the 224 * request not tied to individual fences. 225 */ 226 struct i915_sched_node sched; 227 struct i915_dependency dep; 228 intel_engine_mask_t execution_mask; 229 230 /* 231 * A convenience pointer to the current breadcrumb value stored in 232 * the HW status page (or our timeline's local equivalent). The full 233 * path would be rq->hw_context->ring->timeline->hwsp_seqno. 234 */ 235 const u32 *hwsp_seqno; 236 237 /* 238 * If we need to access the timeline's seqno for this request in 239 * another request, we need to keep a read reference to this associated 240 * cacheline, so that we do not free and recycle it before the foreign 241 * observers have completed. Hence, we keep a pointer to the cacheline 242 * inside the timeline's HWSP vma, but it is only valid while this 243 * request has not completed and guarded by the timeline mutex. 244 */ 245 struct intel_timeline_cacheline __rcu *hwsp_cacheline; 246 247 /** Position in the ring of the start of the request */ 248 u32 head; 249 250 /** Position in the ring of the start of the user packets */ 251 u32 infix; 252 253 /** 254 * Position in the ring of the start of the postfix. 255 * This is required to calculate the maximum available ring space 256 * without overwriting the postfix. 257 */ 258 u32 postfix; 259 260 /** Position in the ring of the end of the whole request */ 261 u32 tail; 262 263 /** Position in the ring of the end of any workarounds after the tail */ 264 u32 wa_tail; 265 266 /** Preallocate space in the ring for the emitting the request */ 267 u32 reserved_space; 268 269 /** Batch buffer related to this request if any (used for 270 * error state dump only). 271 */ 272 struct i915_vma *batch; 273 /** 274 * Additional buffers requested by userspace to be captured upon 275 * a GPU hang. The vma/obj on this list are protected by their 276 * active reference - all objects on this list must also be 277 * on the active_list (of their final request). 278 */ 279 struct i915_capture_list *capture_list; 280 281 /** Time at which this request was emitted, in jiffies. */ 282 unsigned long emitted_jiffies; 283 284 /** timeline->request entry for this request */ 285 struct list_head link; 286 287 I915_SELFTEST_DECLARE(struct { 288 struct list_head link; 289 unsigned long delay; 290 } mock;) 291 }; 292 293 #define I915_FENCE_GFP (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN) 294 295 extern const struct dma_fence_ops i915_fence_ops; 296 297 static inline bool dma_fence_is_i915(const struct dma_fence *fence) 298 { 299 return fence->ops == &i915_fence_ops; 300 } 301 302 struct kmem_cache *i915_request_slab_cache(void); 303 304 struct i915_request * __must_check 305 __i915_request_create(struct intel_context *ce, gfp_t gfp); 306 struct i915_request * __must_check 307 i915_request_create(struct intel_context *ce); 308 309 void i915_request_set_error_once(struct i915_request *rq, int error); 310 void __i915_request_skip(struct i915_request *rq); 311 312 struct i915_request *__i915_request_commit(struct i915_request *request); 313 void __i915_request_queue(struct i915_request *rq, 314 const struct i915_sched_attr *attr); 315 316 bool i915_request_retire(struct i915_request *rq); 317 void i915_request_retire_upto(struct i915_request *rq); 318 319 static inline struct i915_request * 320 to_request(struct dma_fence *fence) 321 { 322 /* We assume that NULL fence/request are interoperable */ 323 BUILD_BUG_ON(offsetof(struct i915_request, fence) != 0); 324 GEM_BUG_ON(fence && !dma_fence_is_i915(fence)); 325 return container_of(fence, struct i915_request, fence); 326 } 327 328 static inline struct i915_request * 329 i915_request_get(struct i915_request *rq) 330 { 331 return to_request(dma_fence_get(&rq->fence)); 332 } 333 334 static inline struct i915_request * 335 i915_request_get_rcu(struct i915_request *rq) 336 { 337 return to_request(dma_fence_get_rcu(&rq->fence)); 338 } 339 340 static inline void 341 i915_request_put(struct i915_request *rq) 342 { 343 dma_fence_put(&rq->fence); 344 } 345 346 int i915_request_await_object(struct i915_request *to, 347 struct drm_i915_gem_object *obj, 348 bool write); 349 int i915_request_await_dma_fence(struct i915_request *rq, 350 struct dma_fence *fence); 351 int i915_request_await_execution(struct i915_request *rq, 352 struct dma_fence *fence, 353 void (*hook)(struct i915_request *rq, 354 struct dma_fence *signal)); 355 356 void i915_request_add(struct i915_request *rq); 357 358 bool __i915_request_submit(struct i915_request *request); 359 void i915_request_submit(struct i915_request *request); 360 361 void __i915_request_unsubmit(struct i915_request *request); 362 void i915_request_unsubmit(struct i915_request *request); 363 364 long i915_request_wait(struct i915_request *rq, 365 unsigned int flags, 366 long timeout) 367 __attribute__((nonnull(1))); 368 #define I915_WAIT_INTERRUPTIBLE BIT(0) 369 #define I915_WAIT_PRIORITY BIT(1) /* small priority bump for the request */ 370 #define I915_WAIT_ALL BIT(2) /* used by i915_gem_object_wait() */ 371 372 static inline bool i915_request_signaled(const struct i915_request *rq) 373 { 374 /* The request may live longer than its HWSP, so check flags first! */ 375 return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags); 376 } 377 378 static inline bool i915_request_is_active(const struct i915_request *rq) 379 { 380 return test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags); 381 } 382 383 static inline bool i915_request_in_priority_queue(const struct i915_request *rq) 384 { 385 return test_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags); 386 } 387 388 static inline bool 389 i915_request_has_initial_breadcrumb(const struct i915_request *rq) 390 { 391 return test_bit(I915_FENCE_FLAG_INITIAL_BREADCRUMB, &rq->fence.flags); 392 } 393 394 /** 395 * Returns true if seq1 is later than seq2. 396 */ 397 static inline bool i915_seqno_passed(u32 seq1, u32 seq2) 398 { 399 return (s32)(seq1 - seq2) >= 0; 400 } 401 402 static inline u32 __hwsp_seqno(const struct i915_request *rq) 403 { 404 const u32 *hwsp = READ_ONCE(rq->hwsp_seqno); 405 406 return READ_ONCE(*hwsp); 407 } 408 409 /** 410 * hwsp_seqno - the current breadcrumb value in the HW status page 411 * @rq: the request, to chase the relevant HW status page 412 * 413 * The emphasis in naming here is that hwsp_seqno() is not a property of the 414 * request, but an indication of the current HW state (associated with this 415 * request). Its value will change as the GPU executes more requests. 416 * 417 * Returns the current breadcrumb value in the associated HW status page (or 418 * the local timeline's equivalent) for this request. The request itself 419 * has the associated breadcrumb value of rq->fence.seqno, when the HW 420 * status page has that breadcrumb or later, this request is complete. 421 */ 422 static inline u32 hwsp_seqno(const struct i915_request *rq) 423 { 424 u32 seqno; 425 426 rcu_read_lock(); /* the HWSP may be freed at runtime */ 427 seqno = __hwsp_seqno(rq); 428 rcu_read_unlock(); 429 430 return seqno; 431 } 432 433 static inline bool __i915_request_has_started(const struct i915_request *rq) 434 { 435 return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno - 1); 436 } 437 438 /** 439 * i915_request_started - check if the request has begun being executed 440 * @rq: the request 441 * 442 * If the timeline is not using initial breadcrumbs, a request is 443 * considered started if the previous request on its timeline (i.e. 444 * context) has been signaled. 445 * 446 * If the timeline is using semaphores, it will also be emitting an 447 * "initial breadcrumb" after the semaphores are complete and just before 448 * it began executing the user payload. A request can therefore be active 449 * on the HW and not yet started as it is still busywaiting on its 450 * dependencies (via HW semaphores). 451 * 452 * If the request has started, its dependencies will have been signaled 453 * (either by fences or by semaphores) and it will have begun processing 454 * the user payload. 455 * 456 * However, even if a request has started, it may have been preempted and 457 * so no longer active, or it may have already completed. 458 * 459 * See also i915_request_is_active(). 460 * 461 * Returns true if the request has begun executing the user payload, or 462 * has completed: 463 */ 464 static inline bool i915_request_started(const struct i915_request *rq) 465 { 466 if (i915_request_signaled(rq)) 467 return true; 468 469 /* Remember: started but may have since been preempted! */ 470 return __i915_request_has_started(rq); 471 } 472 473 /** 474 * i915_request_is_running - check if the request may actually be executing 475 * @rq: the request 476 * 477 * Returns true if the request is currently submitted to hardware, has passed 478 * its start point (i.e. the context is setup and not busywaiting). Note that 479 * it may no longer be running by the time the function returns! 480 */ 481 static inline bool i915_request_is_running(const struct i915_request *rq) 482 { 483 if (!i915_request_is_active(rq)) 484 return false; 485 486 return __i915_request_has_started(rq); 487 } 488 489 /** 490 * i915_request_is_ready - check if the request is ready for execution 491 * @rq: the request 492 * 493 * Upon construction, the request is instructed to wait upon various 494 * signals before it is ready to be executed by the HW. That is, we do 495 * not want to start execution and read data before it is written. In practice, 496 * this is controlled with a mixture of interrupts and semaphores. Once 497 * the submit fence is completed, the backend scheduler will place the 498 * request into its queue and from there submit it for execution. So we 499 * can detect when a request is eligible for execution (and is under control 500 * of the scheduler) by querying where it is in any of the scheduler's lists. 501 * 502 * Returns true if the request is ready for execution (it may be inflight), 503 * false otherwise. 504 */ 505 static inline bool i915_request_is_ready(const struct i915_request *rq) 506 { 507 return !list_empty(&rq->sched.link); 508 } 509 510 static inline bool i915_request_completed(const struct i915_request *rq) 511 { 512 if (i915_request_signaled(rq)) 513 return true; 514 515 return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno); 516 } 517 518 static inline void i915_request_mark_complete(struct i915_request *rq) 519 { 520 WRITE_ONCE(rq->hwsp_seqno, /* decouple from HWSP */ 521 (u32 *)&rq->fence.seqno); 522 } 523 524 static inline bool i915_request_has_waitboost(const struct i915_request *rq) 525 { 526 return test_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags); 527 } 528 529 static inline bool i915_request_has_nopreempt(const struct i915_request *rq) 530 { 531 /* Preemption should only be disabled very rarely */ 532 return unlikely(test_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags)); 533 } 534 535 static inline bool i915_request_has_sentinel(const struct i915_request *rq) 536 { 537 return unlikely(test_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags)); 538 } 539 540 static inline bool i915_request_on_hold(const struct i915_request *rq) 541 { 542 return unlikely(test_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags)); 543 } 544 545 static inline void i915_request_set_hold(struct i915_request *rq) 546 { 547 set_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags); 548 } 549 550 static inline void i915_request_clear_hold(struct i915_request *rq) 551 { 552 clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags); 553 } 554 555 static inline struct intel_timeline * 556 i915_request_timeline(const struct i915_request *rq) 557 { 558 /* Valid only while the request is being constructed (or retired). */ 559 return rcu_dereference_protected(rq->timeline, 560 lockdep_is_held(&rcu_access_pointer(rq->timeline)->mutex)); 561 } 562 563 static inline struct i915_gem_context * 564 i915_request_gem_context(const struct i915_request *rq) 565 { 566 /* Valid only while the request is being constructed (or retired). */ 567 return rcu_dereference_protected(rq->context->gem_context, true); 568 } 569 570 static inline struct intel_timeline * 571 i915_request_active_timeline(const struct i915_request *rq) 572 { 573 /* 574 * When in use during submission, we are protected by a guarantee that 575 * the context/timeline is pinned and must remain pinned until after 576 * this submission. 577 */ 578 return rcu_dereference_protected(rq->timeline, 579 lockdep_is_held(&rq->engine->active.lock)); 580 } 581 582 #endif /* I915_REQUEST_H */ 583