1 /* 2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #ifndef _I915_PVINFO_H_ 25 #define _I915_PVINFO_H_ 26 27 #include <linux/types.h> 28 29 /* The MMIO offset of the shared info between guest and host emulator */ 30 #define VGT_PVINFO_PAGE 0x78000 31 #define VGT_PVINFO_SIZE 0x1000 32 33 /* 34 * The following structure pages are defined in GEN MMIO space 35 * for virtualization. (One page for now) 36 */ 37 #define VGT_MAGIC 0x4776544776544776ULL /* 'vGTvGTvG' */ 38 #define VGT_VERSION_MAJOR 1 39 #define VGT_VERSION_MINOR 0 40 41 /* 42 * notifications from guest to vgpu device model 43 */ 44 enum vgt_g2v_type { 45 VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE = 2, 46 VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY, 47 VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE, 48 VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY, 49 VGT_G2V_EXECLIST_CONTEXT_CREATE, 50 VGT_G2V_EXECLIST_CONTEXT_DESTROY, 51 VGT_G2V_MAX, 52 }; 53 54 /* 55 * VGT capabilities type 56 */ 57 #define VGT_CAPS_FULL_PPGTT BIT(2) 58 #define VGT_CAPS_HWSP_EMULATION BIT(3) 59 #define VGT_CAPS_HUGE_GTT BIT(4) 60 61 struct vgt_if { 62 u64 magic; /* VGT_MAGIC */ 63 u16 version_major; 64 u16 version_minor; 65 u32 vgt_id; /* ID of vGT instance */ 66 u32 vgt_caps; /* VGT capabilities */ 67 u32 rsv1[11]; /* pad to offset 0x40 */ 68 /* 69 * Data structure to describe the balooning info of resources. 70 * Each VM can only have one portion of continuous area for now. 71 * (May support scattered resource in future) 72 * (starting from offset 0x40) 73 */ 74 struct { 75 /* Aperture register balooning */ 76 struct { 77 u32 base; 78 u32 size; 79 } mappable_gmadr; /* aperture */ 80 /* GMADR register balooning */ 81 struct { 82 u32 base; 83 u32 size; 84 } nonmappable_gmadr; /* non aperture */ 85 /* allowed fence registers */ 86 u32 fence_num; 87 u32 rsv2[3]; 88 } avail_rs; /* available/assigned resource */ 89 u32 rsv3[0x200 - 24]; /* pad to half page */ 90 /* 91 * The bottom half page is for response from Gfx driver to hypervisor. 92 */ 93 u32 rsv4; 94 u32 display_ready; /* ready for display owner switch */ 95 96 u32 rsv5[4]; 97 98 u32 g2v_notify; 99 u32 rsv6[5]; 100 101 u32 cursor_x_hot; 102 u32 cursor_y_hot; 103 104 struct { 105 u32 lo; 106 u32 hi; 107 } pdp[4]; 108 109 u32 execlist_context_descriptor_lo; 110 u32 execlist_context_descriptor_hi; 111 112 u32 rsv7[0x200 - 24]; /* pad to one page */ 113 } __packed; 114 115 #define vgtif_offset(x) (offsetof(struct vgt_if, x)) 116 117 #define vgtif_reg(x) _MMIO(VGT_PVINFO_PAGE + vgtif_offset(x)) 118 119 /* vGPU display status to be used by the host side */ 120 #define VGT_DRV_DISPLAY_NOT_READY 0 121 #define VGT_DRV_DISPLAY_READY 1 /* ready for display switch */ 122 123 #endif /* _I915_PVINFO_H_ */ 124