1 /* 2 * Copyright © 2014 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 25 #include "i915_params.h" 26 #include "i915_drv.h" 27 28 struct i915_params i915 __read_mostly = { 29 .modeset = -1, 30 .panel_ignore_lid = 1, 31 .semaphores = -1, 32 .lvds_channel_mode = 0, 33 .panel_use_ssc = -1, 34 .vbt_sdvo_panel_type = -1, 35 .enable_rc6 = -1, 36 .enable_dc = -1, 37 .enable_fbc = -1, 38 .enable_execlists = -1, 39 .enable_hangcheck = true, 40 .enable_ppgtt = -1, 41 .enable_psr = -1, 42 .alpha_support = IS_ENABLED(CONFIG_DRM_I915_ALPHA_SUPPORT), 43 .disable_power_well = -1, 44 .enable_ips = 1, 45 .fastboot = 0, 46 .prefault_disable = 0, 47 .load_detect_test = 0, 48 .force_reset_modeset_test = 0, 49 .reset = 2, 50 .error_capture = true, 51 .invert_brightness = 0, 52 .disable_display = 0, 53 .enable_cmd_parser = true, 54 .use_mmio_flip = 0, 55 .mmio_debug = 0, 56 .verbose_state_checks = 1, 57 .nuclear_pageflip = 0, 58 .edp_vswing = 0, 59 .enable_guc_loading = 0, 60 .enable_guc_submission = 0, 61 .guc_log_level = -1, 62 .guc_firmware_path = NULL, 63 .huc_firmware_path = NULL, 64 .enable_dp_mst = true, 65 .inject_load_failure = 0, 66 .enable_dpcd_backlight = false, 67 .enable_gvt = false, 68 }; 69 70 module_param_named(modeset, i915.modeset, int, 0400); 71 MODULE_PARM_DESC(modeset, 72 "Use kernel modesetting [KMS] (0=disable, " 73 "1=on, -1=force vga console preference [default])"); 74 75 module_param_named_unsafe(panel_ignore_lid, i915.panel_ignore_lid, int, 0600); 76 MODULE_PARM_DESC(panel_ignore_lid, 77 "Override lid status (0=autodetect, 1=autodetect disabled [default], " 78 "-1=force lid closed, -2=force lid open)"); 79 80 module_param_named_unsafe(semaphores, i915.semaphores, int, 0400); 81 MODULE_PARM_DESC(semaphores, 82 "Use semaphores for inter-ring sync " 83 "(default: -1 (use per-chip defaults))"); 84 85 module_param_named_unsafe(enable_rc6, i915.enable_rc6, int, 0400); 86 MODULE_PARM_DESC(enable_rc6, 87 "Enable power-saving render C-state 6. " 88 "Different stages can be selected via bitmask values " 89 "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). " 90 "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. " 91 "default: -1 (use per-chip default)"); 92 93 module_param_named_unsafe(enable_dc, i915.enable_dc, int, 0400); 94 MODULE_PARM_DESC(enable_dc, 95 "Enable power-saving display C-states. " 96 "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)"); 97 98 module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600); 99 MODULE_PARM_DESC(enable_fbc, 100 "Enable frame buffer compression for power savings " 101 "(default: -1 (use per-chip default))"); 102 103 module_param_named_unsafe(lvds_channel_mode, i915.lvds_channel_mode, int, 0400); 104 MODULE_PARM_DESC(lvds_channel_mode, 105 "Specify LVDS channel mode " 106 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)"); 107 108 module_param_named_unsafe(lvds_use_ssc, i915.panel_use_ssc, int, 0600); 109 MODULE_PARM_DESC(lvds_use_ssc, 110 "Use Spread Spectrum Clock with panels [LVDS/eDP] " 111 "(default: auto from VBT)"); 112 113 module_param_named_unsafe(vbt_sdvo_panel_type, i915.vbt_sdvo_panel_type, int, 0400); 114 MODULE_PARM_DESC(vbt_sdvo_panel_type, 115 "Override/Ignore selection of SDVO panel mode in the VBT " 116 "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); 117 118 module_param_named_unsafe(reset, i915.reset, int, 0600); 119 MODULE_PARM_DESC(reset, "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])"); 120 121 module_param_named_unsafe(vbt_firmware, i915.vbt_firmware, charp, 0400); 122 MODULE_PARM_DESC(vbt_firmware, 123 "Load VBT from specified file under /lib/firmware"); 124 125 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) 126 module_param_named(error_capture, i915.error_capture, bool, 0600); 127 MODULE_PARM_DESC(error_capture, 128 "Record the GPU state following a hang. " 129 "This information in /sys/class/drm/card<N>/error is vital for " 130 "triaging and debugging hangs."); 131 #endif 132 133 module_param_named_unsafe(enable_hangcheck, i915.enable_hangcheck, bool, 0644); 134 MODULE_PARM_DESC(enable_hangcheck, 135 "Periodically check GPU activity for detecting hangs. " 136 "WARNING: Disabling this can cause system wide hangs. " 137 "(default: true)"); 138 139 module_param_named_unsafe(enable_ppgtt, i915.enable_ppgtt, int, 0400); 140 MODULE_PARM_DESC(enable_ppgtt, 141 "Override PPGTT usage. " 142 "(-1=auto [default], 0=disabled, 1=aliasing, 2=full, 3=full with extended address space)"); 143 144 module_param_named_unsafe(enable_execlists, i915.enable_execlists, int, 0400); 145 MODULE_PARM_DESC(enable_execlists, 146 "Override execlists usage. " 147 "(-1=auto [default], 0=disabled, 1=enabled)"); 148 149 module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600); 150 MODULE_PARM_DESC(enable_psr, "Enable PSR " 151 "(0=disabled, 1=enabled - link mode chosen per-platform, 2=force link-standby mode, 3=force link-off mode) " 152 "Default: -1 (use per-chip default)"); 153 154 module_param_named_unsafe(alpha_support, i915.alpha_support, bool, 0400); 155 MODULE_PARM_DESC(alpha_support, 156 "Enable alpha quality driver support for latest hardware. " 157 "See also CONFIG_DRM_I915_ALPHA_SUPPORT."); 158 159 module_param_named_unsafe(disable_power_well, i915.disable_power_well, int, 0400); 160 MODULE_PARM_DESC(disable_power_well, 161 "Disable display power wells when possible " 162 "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)"); 163 164 module_param_named_unsafe(enable_ips, i915.enable_ips, int, 0600); 165 MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)"); 166 167 module_param_named(fastboot, i915.fastboot, bool, 0600); 168 MODULE_PARM_DESC(fastboot, 169 "Try to skip unnecessary mode sets at boot time (default: false)"); 170 171 module_param_named_unsafe(prefault_disable, i915.prefault_disable, bool, 0600); 172 MODULE_PARM_DESC(prefault_disable, 173 "Disable page prefaulting for pread/pwrite/reloc (default:false). " 174 "For developers only."); 175 176 module_param_named_unsafe(load_detect_test, i915.load_detect_test, bool, 0600); 177 MODULE_PARM_DESC(load_detect_test, 178 "Force-enable the VGA load detect code for testing (default:false). " 179 "For developers only."); 180 181 module_param_named_unsafe(force_reset_modeset_test, i915.force_reset_modeset_test, bool, 0600); 182 MODULE_PARM_DESC(force_reset_modeset_test, 183 "Force a modeset during gpu reset for testing (default:false). " 184 "For developers only."); 185 186 module_param_named_unsafe(invert_brightness, i915.invert_brightness, int, 0600); 187 MODULE_PARM_DESC(invert_brightness, 188 "Invert backlight brightness " 189 "(-1 force normal, 0 machine defaults, 1 force inversion), please " 190 "report PCI device ID, subsystem vendor and subsystem device ID " 191 "to dri-devel@lists.freedesktop.org, if your machine needs it. " 192 "It will then be included in an upcoming module version."); 193 194 module_param_named(disable_display, i915.disable_display, bool, 0400); 195 MODULE_PARM_DESC(disable_display, "Disable display (default: false)"); 196 197 module_param_named_unsafe(enable_cmd_parser, i915.enable_cmd_parser, bool, 0400); 198 MODULE_PARM_DESC(enable_cmd_parser, 199 "Enable command parsing (true=enabled [default], false=disabled)"); 200 201 module_param_named_unsafe(use_mmio_flip, i915.use_mmio_flip, int, 0600); 202 MODULE_PARM_DESC(use_mmio_flip, 203 "use MMIO flips (-1=never, 0=driver discretion [default], 1=always)"); 204 205 module_param_named(mmio_debug, i915.mmio_debug, int, 0600); 206 MODULE_PARM_DESC(mmio_debug, 207 "Enable the MMIO debug code for the first N failures (default: off). " 208 "This may negatively affect performance."); 209 210 module_param_named(verbose_state_checks, i915.verbose_state_checks, bool, 0600); 211 MODULE_PARM_DESC(verbose_state_checks, 212 "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions."); 213 214 module_param_named_unsafe(nuclear_pageflip, i915.nuclear_pageflip, bool, 0400); 215 MODULE_PARM_DESC(nuclear_pageflip, 216 "Force enable atomic functionality on platforms that don't have full support yet."); 217 218 /* WA to get away with the default setting in VBT for early platforms.Will be removed */ 219 module_param_named_unsafe(edp_vswing, i915.edp_vswing, int, 0400); 220 MODULE_PARM_DESC(edp_vswing, 221 "Ignore/Override vswing pre-emph table selection from VBT " 222 "(0=use value from vbt [default], 1=low power swing(200mV)," 223 "2=default swing(400mV))"); 224 225 module_param_named_unsafe(enable_guc_loading, i915.enable_guc_loading, int, 0400); 226 MODULE_PARM_DESC(enable_guc_loading, 227 "Enable GuC firmware loading " 228 "(-1=auto, 0=never [default], 1=if available, 2=required)"); 229 230 module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, int, 0400); 231 MODULE_PARM_DESC(enable_guc_submission, 232 "Enable GuC submission " 233 "(-1=auto, 0=never [default], 1=if available, 2=required)"); 234 235 module_param_named(guc_log_level, i915.guc_log_level, int, 0400); 236 MODULE_PARM_DESC(guc_log_level, 237 "GuC firmware logging level (-1:disabled (default), 0-3:enabled)"); 238 239 module_param_named_unsafe(guc_firmware_path, i915.guc_firmware_path, charp, 0400); 240 MODULE_PARM_DESC(guc_firmware_path, 241 "GuC firmware path to use instead of the default one"); 242 243 module_param_named_unsafe(huc_firmware_path, i915.huc_firmware_path, charp, 0400); 244 MODULE_PARM_DESC(huc_firmware_path, 245 "HuC firmware path to use instead of the default one"); 246 247 module_param_named_unsafe(enable_dp_mst, i915.enable_dp_mst, bool, 0600); 248 MODULE_PARM_DESC(enable_dp_mst, 249 "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)"); 250 module_param_named_unsafe(inject_load_failure, i915.inject_load_failure, uint, 0400); 251 MODULE_PARM_DESC(inject_load_failure, 252 "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)"); 253 module_param_named(enable_dpcd_backlight, i915.enable_dpcd_backlight, bool, 0600); 254 MODULE_PARM_DESC(enable_dpcd_backlight, 255 "Enable support for DPCD backlight control (default:false)"); 256 257 module_param_named(enable_gvt, i915.enable_gvt, bool, 0400); 258 MODULE_PARM_DESC(enable_gvt, 259 "Enable support for Intel GVT-g graphics virtualization host support(default:false)"); 260