1 /* 2 * Copyright (c) 2008 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * Keith Packard <keithp@keithp.com> 26 * Mika Kuoppala <mika.kuoppala@intel.com> 27 * 28 */ 29 30 #include <generated/utsrelease.h> 31 #include "i915_drv.h" 32 33 static const char *yesno(int v) 34 { 35 return v ? "yes" : "no"; 36 } 37 38 static const char *ring_str(int ring) 39 { 40 switch (ring) { 41 case RCS: return "render"; 42 case VCS: return "bsd"; 43 case BCS: return "blt"; 44 case VECS: return "vebox"; 45 default: return ""; 46 } 47 } 48 49 static const char *pin_flag(int pinned) 50 { 51 if (pinned > 0) 52 return " P"; 53 else if (pinned < 0) 54 return " p"; 55 else 56 return ""; 57 } 58 59 static const char *tiling_flag(int tiling) 60 { 61 switch (tiling) { 62 default: 63 case I915_TILING_NONE: return ""; 64 case I915_TILING_X: return " X"; 65 case I915_TILING_Y: return " Y"; 66 } 67 } 68 69 static const char *dirty_flag(int dirty) 70 { 71 return dirty ? " dirty" : ""; 72 } 73 74 static const char *purgeable_flag(int purgeable) 75 { 76 return purgeable ? " purgeable" : ""; 77 } 78 79 static bool __i915_error_ok(struct drm_i915_error_state_buf *e) 80 { 81 82 if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) { 83 e->err = -ENOSPC; 84 return false; 85 } 86 87 if (e->bytes == e->size - 1 || e->err) 88 return false; 89 90 return true; 91 } 92 93 static bool __i915_error_seek(struct drm_i915_error_state_buf *e, 94 unsigned len) 95 { 96 if (e->pos + len <= e->start) { 97 e->pos += len; 98 return false; 99 } 100 101 /* First vsnprintf needs to fit in its entirety for memmove */ 102 if (len >= e->size) { 103 e->err = -EIO; 104 return false; 105 } 106 107 return true; 108 } 109 110 static void __i915_error_advance(struct drm_i915_error_state_buf *e, 111 unsigned len) 112 { 113 /* If this is first printf in this window, adjust it so that 114 * start position matches start of the buffer 115 */ 116 117 if (e->pos < e->start) { 118 const size_t off = e->start - e->pos; 119 120 /* Should not happen but be paranoid */ 121 if (off > len || e->bytes) { 122 e->err = -EIO; 123 return; 124 } 125 126 memmove(e->buf, e->buf + off, len - off); 127 e->bytes = len - off; 128 e->pos = e->start; 129 return; 130 } 131 132 e->bytes += len; 133 e->pos += len; 134 } 135 136 static void i915_error_vprintf(struct drm_i915_error_state_buf *e, 137 const char *f, va_list args) 138 { 139 unsigned len; 140 141 if (!__i915_error_ok(e)) 142 return; 143 144 /* Seek the first printf which is hits start position */ 145 if (e->pos < e->start) { 146 va_list tmp; 147 148 va_copy(tmp, args); 149 if (!__i915_error_seek(e, vsnprintf(NULL, 0, f, tmp))) 150 return; 151 } 152 153 len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args); 154 if (len >= e->size - e->bytes) 155 len = e->size - e->bytes - 1; 156 157 __i915_error_advance(e, len); 158 } 159 160 static void i915_error_puts(struct drm_i915_error_state_buf *e, 161 const char *str) 162 { 163 unsigned len; 164 165 if (!__i915_error_ok(e)) 166 return; 167 168 len = strlen(str); 169 170 /* Seek the first printf which is hits start position */ 171 if (e->pos < e->start) { 172 if (!__i915_error_seek(e, len)) 173 return; 174 } 175 176 if (len >= e->size - e->bytes) 177 len = e->size - e->bytes - 1; 178 memcpy(e->buf + e->bytes, str, len); 179 180 __i915_error_advance(e, len); 181 } 182 183 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__) 184 #define err_puts(e, s) i915_error_puts(e, s) 185 186 static void print_error_buffers(struct drm_i915_error_state_buf *m, 187 const char *name, 188 struct drm_i915_error_buffer *err, 189 int count) 190 { 191 err_printf(m, "%s [%d]:\n", name, count); 192 193 while (count--) { 194 err_printf(m, " %08x %8u %02x %02x %x %x", 195 err->gtt_offset, 196 err->size, 197 err->read_domains, 198 err->write_domain, 199 err->rseqno, err->wseqno); 200 err_puts(m, pin_flag(err->pinned)); 201 err_puts(m, tiling_flag(err->tiling)); 202 err_puts(m, dirty_flag(err->dirty)); 203 err_puts(m, purgeable_flag(err->purgeable)); 204 err_puts(m, err->ring != -1 ? " " : ""); 205 err_puts(m, ring_str(err->ring)); 206 err_puts(m, i915_cache_level_str(err->cache_level)); 207 208 if (err->name) 209 err_printf(m, " (name: %d)", err->name); 210 if (err->fence_reg != I915_FENCE_REG_NONE) 211 err_printf(m, " (fence: %d)", err->fence_reg); 212 213 err_puts(m, "\n"); 214 err++; 215 } 216 } 217 218 static void i915_ring_error_state(struct drm_i915_error_state_buf *m, 219 struct drm_device *dev, 220 struct drm_i915_error_state *error, 221 unsigned ring) 222 { 223 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */ 224 err_printf(m, "%s command stream:\n", ring_str(ring)); 225 err_printf(m, " HEAD: 0x%08x\n", error->head[ring]); 226 err_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); 227 err_printf(m, " CTL: 0x%08x\n", error->ctl[ring]); 228 err_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); 229 err_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); 230 err_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); 231 err_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]); 232 if (ring == RCS && INTEL_INFO(dev)->gen >= 4) 233 err_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr); 234 235 if (INTEL_INFO(dev)->gen >= 4) 236 err_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]); 237 err_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]); 238 err_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]); 239 if (INTEL_INFO(dev)->gen >= 6) { 240 err_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]); 241 err_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]); 242 err_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n", 243 error->semaphore_mboxes[ring][0], 244 error->semaphore_seqno[ring][0]); 245 err_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n", 246 error->semaphore_mboxes[ring][1], 247 error->semaphore_seqno[ring][1]); 248 if (HAS_VEBOX(dev)) { 249 err_printf(m, " SYNC_2: 0x%08x [last synced 0x%08x]\n", 250 error->semaphore_mboxes[ring][2], 251 error->semaphore_seqno[ring][2]); 252 } 253 } 254 err_printf(m, " seqno: 0x%08x\n", error->seqno[ring]); 255 err_printf(m, " waiting: %s\n", yesno(error->waiting[ring])); 256 err_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]); 257 err_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]); 258 } 259 260 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) 261 { 262 va_list args; 263 264 va_start(args, f); 265 i915_error_vprintf(e, f, args); 266 va_end(args); 267 } 268 269 int i915_error_state_to_str(struct drm_i915_error_state_buf *m, 270 const struct i915_error_state_file_priv *error_priv) 271 { 272 struct drm_device *dev = error_priv->dev; 273 drm_i915_private_t *dev_priv = dev->dev_private; 274 struct drm_i915_error_state *error = error_priv->error; 275 struct intel_ring_buffer *ring; 276 int i, j, page, offset, elt; 277 278 if (!error) { 279 err_printf(m, "no error state collected\n"); 280 goto out; 281 } 282 283 err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, 284 error->time.tv_usec); 285 err_printf(m, "Kernel: " UTS_RELEASE "\n"); 286 err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); 287 err_printf(m, "EIR: 0x%08x\n", error->eir); 288 err_printf(m, "IER: 0x%08x\n", error->ier); 289 err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); 290 err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake); 291 err_printf(m, "DERRMR: 0x%08x\n", error->derrmr); 292 err_printf(m, "CCID: 0x%08x\n", error->ccid); 293 294 for (i = 0; i < dev_priv->num_fence_regs; i++) 295 err_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); 296 297 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++) 298 err_printf(m, " INSTDONE_%d: 0x%08x\n", i, 299 error->extra_instdone[i]); 300 301 if (INTEL_INFO(dev)->gen >= 6) { 302 err_printf(m, "ERROR: 0x%08x\n", error->error); 303 err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); 304 } 305 306 if (INTEL_INFO(dev)->gen == 7) 307 err_printf(m, "ERR_INT: 0x%08x\n", error->err_int); 308 309 for_each_ring(ring, dev_priv, i) 310 i915_ring_error_state(m, dev, error, i); 311 312 if (error->active_bo) 313 print_error_buffers(m, "Active", 314 error->active_bo[0], 315 error->active_bo_count[0]); 316 317 if (error->pinned_bo) 318 print_error_buffers(m, "Pinned", 319 error->pinned_bo[0], 320 error->pinned_bo_count[0]); 321 322 for (i = 0; i < ARRAY_SIZE(error->ring); i++) { 323 struct drm_i915_error_object *obj; 324 325 if ((obj = error->ring[i].batchbuffer)) { 326 err_printf(m, "%s --- gtt_offset = 0x%08x\n", 327 dev_priv->ring[i].name, 328 obj->gtt_offset); 329 offset = 0; 330 for (page = 0; page < obj->page_count; page++) { 331 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 332 err_printf(m, "%08x : %08x\n", offset, 333 obj->pages[page][elt]); 334 offset += 4; 335 } 336 } 337 } 338 339 if (error->ring[i].num_requests) { 340 err_printf(m, "%s --- %d requests\n", 341 dev_priv->ring[i].name, 342 error->ring[i].num_requests); 343 for (j = 0; j < error->ring[i].num_requests; j++) { 344 err_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n", 345 error->ring[i].requests[j].seqno, 346 error->ring[i].requests[j].jiffies, 347 error->ring[i].requests[j].tail); 348 } 349 } 350 351 if ((obj = error->ring[i].ringbuffer)) { 352 err_printf(m, "%s --- ringbuffer = 0x%08x\n", 353 dev_priv->ring[i].name, 354 obj->gtt_offset); 355 offset = 0; 356 for (page = 0; page < obj->page_count; page++) { 357 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 358 err_printf(m, "%08x : %08x\n", 359 offset, 360 obj->pages[page][elt]); 361 offset += 4; 362 } 363 } 364 } 365 366 obj = error->ring[i].ctx; 367 if (obj) { 368 err_printf(m, "%s --- HW Context = 0x%08x\n", 369 dev_priv->ring[i].name, 370 obj->gtt_offset); 371 offset = 0; 372 for (elt = 0; elt < PAGE_SIZE/16; elt += 4) { 373 err_printf(m, "[%04x] %08x %08x %08x %08x\n", 374 offset, 375 obj->pages[0][elt], 376 obj->pages[0][elt+1], 377 obj->pages[0][elt+2], 378 obj->pages[0][elt+3]); 379 offset += 16; 380 } 381 } 382 } 383 384 if (error->overlay) 385 intel_overlay_print_error_state(m, error->overlay); 386 387 if (error->display) 388 intel_display_print_error_state(m, dev, error->display); 389 390 out: 391 if (m->bytes == 0 && m->err) 392 return m->err; 393 394 return 0; 395 } 396 397 int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf, 398 size_t count, loff_t pos) 399 { 400 memset(ebuf, 0, sizeof(*ebuf)); 401 402 /* We need to have enough room to store any i915_error_state printf 403 * so that we can move it to start position. 404 */ 405 ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE; 406 ebuf->buf = kmalloc(ebuf->size, 407 GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN); 408 409 if (ebuf->buf == NULL) { 410 ebuf->size = PAGE_SIZE; 411 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); 412 } 413 414 if (ebuf->buf == NULL) { 415 ebuf->size = 128; 416 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY); 417 } 418 419 if (ebuf->buf == NULL) 420 return -ENOMEM; 421 422 ebuf->start = pos; 423 424 return 0; 425 } 426 427 static void i915_error_object_free(struct drm_i915_error_object *obj) 428 { 429 int page; 430 431 if (obj == NULL) 432 return; 433 434 for (page = 0; page < obj->page_count; page++) 435 kfree(obj->pages[page]); 436 437 kfree(obj); 438 } 439 440 static void i915_error_state_free(struct kref *error_ref) 441 { 442 struct drm_i915_error_state *error = container_of(error_ref, 443 typeof(*error), ref); 444 int i; 445 446 for (i = 0; i < ARRAY_SIZE(error->ring); i++) { 447 i915_error_object_free(error->ring[i].batchbuffer); 448 i915_error_object_free(error->ring[i].ringbuffer); 449 i915_error_object_free(error->ring[i].ctx); 450 kfree(error->ring[i].requests); 451 } 452 453 kfree(error->active_bo); 454 kfree(error->overlay); 455 kfree(error->display); 456 kfree(error); 457 } 458 459 static struct drm_i915_error_object * 460 i915_error_object_create_sized(struct drm_i915_private *dev_priv, 461 struct drm_i915_gem_object *src, 462 const int num_pages) 463 { 464 struct drm_i915_error_object *dst; 465 int i; 466 u32 reloc_offset; 467 468 if (src == NULL || src->pages == NULL) 469 return NULL; 470 471 dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC); 472 if (dst == NULL) 473 return NULL; 474 475 reloc_offset = dst->gtt_offset = i915_gem_obj_ggtt_offset(src); 476 for (i = 0; i < num_pages; i++) { 477 unsigned long flags; 478 void *d; 479 480 d = kmalloc(PAGE_SIZE, GFP_ATOMIC); 481 if (d == NULL) 482 goto unwind; 483 484 local_irq_save(flags); 485 if (reloc_offset < dev_priv->gtt.mappable_end && 486 src->has_global_gtt_mapping) { 487 void __iomem *s; 488 489 /* Simply ignore tiling or any overlapping fence. 490 * It's part of the error state, and this hopefully 491 * captures what the GPU read. 492 */ 493 494 s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, 495 reloc_offset); 496 memcpy_fromio(d, s, PAGE_SIZE); 497 io_mapping_unmap_atomic(s); 498 } else if (src->stolen) { 499 unsigned long offset; 500 501 offset = dev_priv->mm.stolen_base; 502 offset += src->stolen->start; 503 offset += i << PAGE_SHIFT; 504 505 memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE); 506 } else { 507 struct page *page; 508 void *s; 509 510 page = i915_gem_object_get_page(src, i); 511 512 drm_clflush_pages(&page, 1); 513 514 s = kmap_atomic(page); 515 memcpy(d, s, PAGE_SIZE); 516 kunmap_atomic(s); 517 518 drm_clflush_pages(&page, 1); 519 } 520 local_irq_restore(flags); 521 522 dst->pages[i] = d; 523 524 reloc_offset += PAGE_SIZE; 525 } 526 dst->page_count = num_pages; 527 528 return dst; 529 530 unwind: 531 while (i--) 532 kfree(dst->pages[i]); 533 kfree(dst); 534 return NULL; 535 } 536 #define i915_error_object_create(dev_priv, src) \ 537 i915_error_object_create_sized((dev_priv), (src), \ 538 (src)->base.size>>PAGE_SHIFT) 539 540 static void capture_bo(struct drm_i915_error_buffer *err, 541 struct drm_i915_gem_object *obj) 542 { 543 err->size = obj->base.size; 544 err->name = obj->base.name; 545 err->rseqno = obj->last_read_seqno; 546 err->wseqno = obj->last_write_seqno; 547 err->gtt_offset = i915_gem_obj_ggtt_offset(obj); 548 err->read_domains = obj->base.read_domains; 549 err->write_domain = obj->base.write_domain; 550 err->fence_reg = obj->fence_reg; 551 err->pinned = 0; 552 if (obj->pin_count > 0) 553 err->pinned = 1; 554 if (obj->user_pin_count > 0) 555 err->pinned = -1; 556 err->tiling = obj->tiling_mode; 557 err->dirty = obj->dirty; 558 err->purgeable = obj->madv != I915_MADV_WILLNEED; 559 err->ring = obj->ring ? obj->ring->id : -1; 560 err->cache_level = obj->cache_level; 561 } 562 563 static u32 capture_active_bo(struct drm_i915_error_buffer *err, 564 int count, struct list_head *head) 565 { 566 struct i915_vma *vma; 567 int i = 0; 568 569 list_for_each_entry(vma, head, mm_list) { 570 capture_bo(err++, vma->obj); 571 if (++i == count) 572 break; 573 } 574 575 return i; 576 } 577 578 static u32 capture_pinned_bo(struct drm_i915_error_buffer *err, 579 int count, struct list_head *head) 580 { 581 struct drm_i915_gem_object *obj; 582 int i = 0; 583 584 list_for_each_entry(obj, head, global_list) { 585 if (obj->pin_count == 0) 586 continue; 587 588 capture_bo(err++, obj); 589 if (++i == count) 590 break; 591 } 592 593 return i; 594 } 595 596 static void i915_gem_record_fences(struct drm_device *dev, 597 struct drm_i915_error_state *error) 598 { 599 struct drm_i915_private *dev_priv = dev->dev_private; 600 int i; 601 602 /* Fences */ 603 switch (INTEL_INFO(dev)->gen) { 604 case 7: 605 case 6: 606 for (i = 0; i < dev_priv->num_fence_regs; i++) 607 error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8)); 608 break; 609 case 5: 610 case 4: 611 for (i = 0; i < 16; i++) 612 error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); 613 break; 614 case 3: 615 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) 616 for (i = 0; i < 8; i++) 617 error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); 618 case 2: 619 for (i = 0; i < 8; i++) 620 error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); 621 break; 622 623 default: 624 BUG(); 625 } 626 } 627 628 static struct drm_i915_error_object * 629 i915_error_first_batchbuffer(struct drm_i915_private *dev_priv, 630 struct intel_ring_buffer *ring) 631 { 632 struct i915_address_space *vm; 633 struct i915_vma *vma; 634 struct drm_i915_gem_object *obj; 635 u32 seqno; 636 637 if (!ring->get_seqno) 638 return NULL; 639 640 if (HAS_BROKEN_CS_TLB(dev_priv->dev)) { 641 u32 acthd = I915_READ(ACTHD); 642 643 if (WARN_ON(ring->id != RCS)) 644 return NULL; 645 646 obj = ring->scratch.obj; 647 if (acthd >= i915_gem_obj_ggtt_offset(obj) && 648 acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size) 649 return i915_error_object_create(dev_priv, obj); 650 } 651 652 seqno = ring->get_seqno(ring, false); 653 list_for_each_entry(vm, &dev_priv->vm_list, global_link) { 654 list_for_each_entry(vma, &vm->active_list, mm_list) { 655 obj = vma->obj; 656 if (obj->ring != ring) 657 continue; 658 659 if (i915_seqno_passed(seqno, obj->last_read_seqno)) 660 continue; 661 662 if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0) 663 continue; 664 665 /* We need to copy these to an anonymous buffer as the simplest 666 * method to avoid being overwritten by userspace. 667 */ 668 return i915_error_object_create(dev_priv, obj); 669 } 670 } 671 672 return NULL; 673 } 674 675 static void i915_record_ring_state(struct drm_device *dev, 676 struct drm_i915_error_state *error, 677 struct intel_ring_buffer *ring) 678 { 679 struct drm_i915_private *dev_priv = dev->dev_private; 680 681 if (INTEL_INFO(dev)->gen >= 6) { 682 error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50); 683 error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring)); 684 error->semaphore_mboxes[ring->id][0] 685 = I915_READ(RING_SYNC_0(ring->mmio_base)); 686 error->semaphore_mboxes[ring->id][1] 687 = I915_READ(RING_SYNC_1(ring->mmio_base)); 688 error->semaphore_seqno[ring->id][0] = ring->sync_seqno[0]; 689 error->semaphore_seqno[ring->id][1] = ring->sync_seqno[1]; 690 } 691 692 if (HAS_VEBOX(dev)) { 693 error->semaphore_mboxes[ring->id][2] = 694 I915_READ(RING_SYNC_2(ring->mmio_base)); 695 error->semaphore_seqno[ring->id][2] = ring->sync_seqno[2]; 696 } 697 698 if (INTEL_INFO(dev)->gen >= 4) { 699 error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base)); 700 error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base)); 701 error->ipehr[ring->id] = I915_READ(RING_IPEHR(ring->mmio_base)); 702 error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base)); 703 error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base)); 704 if (ring->id == RCS) 705 error->bbaddr = I915_READ64(BB_ADDR); 706 } else { 707 error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX); 708 error->ipeir[ring->id] = I915_READ(IPEIR); 709 error->ipehr[ring->id] = I915_READ(IPEHR); 710 error->instdone[ring->id] = I915_READ(INSTDONE); 711 } 712 713 error->waiting[ring->id] = waitqueue_active(&ring->irq_queue); 714 error->instpm[ring->id] = I915_READ(RING_INSTPM(ring->mmio_base)); 715 error->seqno[ring->id] = ring->get_seqno(ring, false); 716 error->acthd[ring->id] = intel_ring_get_active_head(ring); 717 error->head[ring->id] = I915_READ_HEAD(ring); 718 error->tail[ring->id] = I915_READ_TAIL(ring); 719 error->ctl[ring->id] = I915_READ_CTL(ring); 720 721 error->cpu_ring_head[ring->id] = ring->head; 722 error->cpu_ring_tail[ring->id] = ring->tail; 723 } 724 725 726 static void i915_gem_record_active_context(struct intel_ring_buffer *ring, 727 struct drm_i915_error_state *error, 728 struct drm_i915_error_ring *ering) 729 { 730 struct drm_i915_private *dev_priv = ring->dev->dev_private; 731 struct drm_i915_gem_object *obj; 732 733 /* Currently render ring is the only HW context user */ 734 if (ring->id != RCS || !error->ccid) 735 return; 736 737 list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { 738 if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) { 739 ering->ctx = i915_error_object_create_sized(dev_priv, 740 obj, 1); 741 break; 742 } 743 } 744 } 745 746 static void i915_gem_record_rings(struct drm_device *dev, 747 struct drm_i915_error_state *error) 748 { 749 struct drm_i915_private *dev_priv = dev->dev_private; 750 struct intel_ring_buffer *ring; 751 struct drm_i915_gem_request *request; 752 int i, count; 753 754 for_each_ring(ring, dev_priv, i) { 755 i915_record_ring_state(dev, error, ring); 756 757 error->ring[i].batchbuffer = 758 i915_error_first_batchbuffer(dev_priv, ring); 759 760 error->ring[i].ringbuffer = 761 i915_error_object_create(dev_priv, ring->obj); 762 763 764 i915_gem_record_active_context(ring, error, &error->ring[i]); 765 766 count = 0; 767 list_for_each_entry(request, &ring->request_list, list) 768 count++; 769 770 error->ring[i].num_requests = count; 771 error->ring[i].requests = 772 kmalloc(count*sizeof(struct drm_i915_error_request), 773 GFP_ATOMIC); 774 if (error->ring[i].requests == NULL) { 775 error->ring[i].num_requests = 0; 776 continue; 777 } 778 779 count = 0; 780 list_for_each_entry(request, &ring->request_list, list) { 781 struct drm_i915_error_request *erq; 782 783 erq = &error->ring[i].requests[count++]; 784 erq->seqno = request->seqno; 785 erq->jiffies = request->emitted_jiffies; 786 erq->tail = request->tail; 787 } 788 } 789 } 790 791 /* FIXME: Since pin count/bound list is global, we duplicate what we capture per 792 * VM. 793 */ 794 static void i915_gem_capture_vm(struct drm_i915_private *dev_priv, 795 struct drm_i915_error_state *error, 796 struct i915_address_space *vm, 797 const int ndx) 798 { 799 struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL; 800 struct drm_i915_gem_object *obj; 801 struct i915_vma *vma; 802 int i; 803 804 i = 0; 805 list_for_each_entry(vma, &vm->active_list, mm_list) 806 i++; 807 error->active_bo_count[ndx] = i; 808 list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) 809 if (obj->pin_count) 810 i++; 811 error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx]; 812 813 if (i) { 814 active_bo = kmalloc(sizeof(*active_bo)*i, GFP_ATOMIC); 815 if (active_bo) 816 pinned_bo = active_bo + error->active_bo_count[ndx]; 817 } 818 819 if (active_bo) 820 error->active_bo_count[ndx] = 821 capture_active_bo(active_bo, 822 error->active_bo_count[ndx], 823 &vm->active_list); 824 825 if (pinned_bo) 826 error->pinned_bo_count[ndx] = 827 capture_pinned_bo(pinned_bo, 828 error->pinned_bo_count[ndx], 829 &dev_priv->mm.bound_list); 830 error->active_bo[ndx] = active_bo; 831 error->pinned_bo[ndx] = pinned_bo; 832 } 833 834 static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv, 835 struct drm_i915_error_state *error) 836 { 837 struct i915_address_space *vm; 838 int cnt = 0, i = 0; 839 840 list_for_each_entry(vm, &dev_priv->vm_list, global_link) 841 cnt++; 842 843 if (WARN(cnt > 1, "Multiple VMs not yet supported\n")) 844 cnt = 1; 845 846 vm = &dev_priv->gtt.base; 847 848 error->active_bo = kcalloc(cnt, sizeof(*error->active_bo), GFP_ATOMIC); 849 error->pinned_bo = kcalloc(cnt, sizeof(*error->pinned_bo), GFP_ATOMIC); 850 error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count), 851 GFP_ATOMIC); 852 error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count), 853 GFP_ATOMIC); 854 855 list_for_each_entry(vm, &dev_priv->vm_list, global_link) 856 i915_gem_capture_vm(dev_priv, error, vm, i++); 857 } 858 859 /** 860 * i915_capture_error_state - capture an error record for later analysis 861 * @dev: drm device 862 * 863 * Should be called when an error is detected (either a hang or an error 864 * interrupt) to capture error state from the time of the error. Fills 865 * out a structure which becomes available in debugfs for user level tools 866 * to pick up. 867 */ 868 void i915_capture_error_state(struct drm_device *dev) 869 { 870 struct drm_i915_private *dev_priv = dev->dev_private; 871 struct drm_i915_error_state *error; 872 unsigned long flags; 873 int pipe; 874 875 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 876 error = dev_priv->gpu_error.first_error; 877 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 878 if (error) 879 return; 880 881 /* Account for pipe specific data like PIPE*STAT */ 882 error = kzalloc(sizeof(*error), GFP_ATOMIC); 883 if (!error) { 884 DRM_DEBUG_DRIVER("out of memory, not capturing error state\n"); 885 return; 886 } 887 888 DRM_INFO("capturing error event; look for more information in " 889 "/sys/class/drm/card%d/error\n", dev->primary->index); 890 891 kref_init(&error->ref); 892 error->eir = I915_READ(EIR); 893 error->pgtbl_er = I915_READ(PGTBL_ER); 894 if (HAS_HW_CONTEXTS(dev)) 895 error->ccid = I915_READ(CCID); 896 897 if (HAS_PCH_SPLIT(dev)) 898 error->ier = I915_READ(DEIER) | I915_READ(GTIER); 899 else if (IS_VALLEYVIEW(dev)) 900 error->ier = I915_READ(GTIER) | I915_READ(VLV_IER); 901 else if (IS_GEN2(dev)) 902 error->ier = I915_READ16(IER); 903 else 904 error->ier = I915_READ(IER); 905 906 if (INTEL_INFO(dev)->gen >= 6) 907 error->derrmr = I915_READ(DERRMR); 908 909 if (IS_VALLEYVIEW(dev)) 910 error->forcewake = I915_READ(FORCEWAKE_VLV); 911 else if (INTEL_INFO(dev)->gen >= 7) 912 error->forcewake = I915_READ(FORCEWAKE_MT); 913 else if (INTEL_INFO(dev)->gen == 6) 914 error->forcewake = I915_READ(FORCEWAKE); 915 916 if (!HAS_PCH_SPLIT(dev)) 917 for_each_pipe(pipe) 918 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); 919 920 if (INTEL_INFO(dev)->gen >= 6) { 921 error->error = I915_READ(ERROR_GEN6); 922 error->done_reg = I915_READ(DONE_REG); 923 } 924 925 if (INTEL_INFO(dev)->gen == 7) 926 error->err_int = I915_READ(GEN7_ERR_INT); 927 928 i915_get_extra_instdone(dev, error->extra_instdone); 929 930 i915_gem_capture_buffers(dev_priv, error); 931 i915_gem_record_fences(dev, error); 932 i915_gem_record_rings(dev, error); 933 934 do_gettimeofday(&error->time); 935 936 error->overlay = intel_overlay_capture_error_state(dev); 937 error->display = intel_display_capture_error_state(dev); 938 939 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 940 if (dev_priv->gpu_error.first_error == NULL) { 941 dev_priv->gpu_error.first_error = error; 942 error = NULL; 943 } 944 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 945 946 if (error) 947 i915_error_state_free(&error->ref); 948 } 949 950 void i915_error_state_get(struct drm_device *dev, 951 struct i915_error_state_file_priv *error_priv) 952 { 953 struct drm_i915_private *dev_priv = dev->dev_private; 954 unsigned long flags; 955 956 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 957 error_priv->error = dev_priv->gpu_error.first_error; 958 if (error_priv->error) 959 kref_get(&error_priv->error->ref); 960 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 961 962 } 963 964 void i915_error_state_put(struct i915_error_state_file_priv *error_priv) 965 { 966 if (error_priv->error) 967 kref_put(&error_priv->error->ref, i915_error_state_free); 968 } 969 970 void i915_destroy_error_state(struct drm_device *dev) 971 { 972 struct drm_i915_private *dev_priv = dev->dev_private; 973 struct drm_i915_error_state *error; 974 unsigned long flags; 975 976 spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); 977 error = dev_priv->gpu_error.first_error; 978 dev_priv->gpu_error.first_error = NULL; 979 spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); 980 981 if (error) 982 kref_put(&error->ref, i915_error_state_free); 983 } 984 985 const char *i915_cache_level_str(int type) 986 { 987 switch (type) { 988 case I915_CACHE_NONE: return " uncached"; 989 case I915_CACHE_LLC: return " snooped or LLC"; 990 case I915_CACHE_L3_LLC: return " L3+LLC"; 991 default: return ""; 992 } 993 } 994 995 /* NB: please notice the memset */ 996 void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone) 997 { 998 struct drm_i915_private *dev_priv = dev->dev_private; 999 memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG); 1000 1001 switch (INTEL_INFO(dev)->gen) { 1002 case 2: 1003 case 3: 1004 instdone[0] = I915_READ(INSTDONE); 1005 break; 1006 case 4: 1007 case 5: 1008 case 6: 1009 instdone[0] = I915_READ(INSTDONE_I965); 1010 instdone[1] = I915_READ(INSTDONE1); 1011 break; 1012 default: 1013 WARN_ONCE(1, "Unsupported platform\n"); 1014 case 7: 1015 instdone[0] = I915_READ(GEN7_INSTDONE_1); 1016 instdone[1] = I915_READ(GEN7_SC_INSTDONE); 1017 instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE); 1018 instdone[3] = I915_READ(GEN7_ROW_INSTDONE); 1019 break; 1020 } 1021 } 1022