1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2010 Daniel Vetter
4  * Copyright © 2020 Intel Corporation
5  */
6 
7 #include <linux/slab.h> /* fault-inject.h is not standalone! */
8 
9 #include <linux/fault-inject.h>
10 #include <linux/log2.h>
11 #include <linux/random.h>
12 #include <linux/seq_file.h>
13 #include <linux/stop_machine.h>
14 
15 #include <asm/set_memory.h>
16 #include <asm/smp.h>
17 
18 #include "display/intel_frontbuffer.h"
19 #include "gt/intel_gt.h"
20 #include "gt/intel_gt_requests.h"
21 
22 #include "i915_drv.h"
23 #include "i915_gem_evict.h"
24 #include "i915_scatterlist.h"
25 #include "i915_trace.h"
26 #include "i915_vgpu.h"
27 
28 int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
29 			       struct sg_table *pages)
30 {
31 	do {
32 		if (dma_map_sg_attrs(obj->base.dev->dev,
33 				     pages->sgl, pages->nents,
34 				     DMA_BIDIRECTIONAL,
35 				     DMA_ATTR_SKIP_CPU_SYNC |
36 				     DMA_ATTR_NO_KERNEL_MAPPING |
37 				     DMA_ATTR_NO_WARN))
38 			return 0;
39 
40 		/*
41 		 * If the DMA remap fails, one cause can be that we have
42 		 * too many objects pinned in a small remapping table,
43 		 * such as swiotlb. Incrementally purge all other objects and
44 		 * try again - if there are no more pages to remove from
45 		 * the DMA remapper, i915_gem_shrink will return 0.
46 		 */
47 		GEM_BUG_ON(obj->mm.pages == pages);
48 	} while (i915_gem_shrink(NULL, to_i915(obj->base.dev),
49 				 obj->base.size >> PAGE_SHIFT, NULL,
50 				 I915_SHRINK_BOUND |
51 				 I915_SHRINK_UNBOUND));
52 
53 	return -ENOSPC;
54 }
55 
56 void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
57 			       struct sg_table *pages)
58 {
59 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
60 	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
61 
62 	/* XXX This does not prevent more requests being submitted! */
63 	if (unlikely(ggtt->do_idle_maps))
64 		/* Wait a bit, in the hope it avoids the hang */
65 		usleep_range(100, 250);
66 
67 	dma_unmap_sg(i915->drm.dev, pages->sgl, pages->nents,
68 		     DMA_BIDIRECTIONAL);
69 }
70 
71 /**
72  * i915_gem_gtt_reserve - reserve a node in an address_space (GTT)
73  * @vm: the &struct i915_address_space
74  * @ww: An optional struct i915_gem_ww_ctx.
75  * @node: the &struct drm_mm_node (typically i915_vma.mode)
76  * @size: how much space to allocate inside the GTT,
77  *        must be #I915_GTT_PAGE_SIZE aligned
78  * @offset: where to insert inside the GTT,
79  *          must be #I915_GTT_MIN_ALIGNMENT aligned, and the node
80  *          (@offset + @size) must fit within the address space
81  * @color: color to apply to node, if this node is not from a VMA,
82  *         color must be #I915_COLOR_UNEVICTABLE
83  * @flags: control search and eviction behaviour
84  *
85  * i915_gem_gtt_reserve() tries to insert the @node at the exact @offset inside
86  * the address space (using @size and @color). If the @node does not fit, it
87  * tries to evict any overlapping nodes from the GTT, including any
88  * neighbouring nodes if the colors do not match (to ensure guard pages between
89  * differing domains). See i915_gem_evict_for_node() for the gory details
90  * on the eviction algorithm. #PIN_NONBLOCK may used to prevent waiting on
91  * evicting active overlapping objects, and any overlapping node that is pinned
92  * or marked as unevictable will also result in failure.
93  *
94  * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
95  * asked to wait for eviction and interrupted.
96  */
97 int i915_gem_gtt_reserve(struct i915_address_space *vm,
98 			 struct i915_gem_ww_ctx *ww,
99 			 struct drm_mm_node *node,
100 			 u64 size, u64 offset, unsigned long color,
101 			 unsigned int flags)
102 {
103 	int err;
104 
105 	GEM_BUG_ON(!size);
106 	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
107 	GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
108 	GEM_BUG_ON(range_overflows(offset, size, vm->total));
109 	GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
110 	GEM_BUG_ON(drm_mm_node_allocated(node));
111 
112 	node->size = size;
113 	node->start = offset;
114 	node->color = color;
115 
116 	err = drm_mm_reserve_node(&vm->mm, node);
117 	if (err != -ENOSPC)
118 		return err;
119 
120 	if (flags & PIN_NOEVICT)
121 		return -ENOSPC;
122 
123 	err = i915_gem_evict_for_node(vm, ww, node, flags);
124 	if (err == 0)
125 		err = drm_mm_reserve_node(&vm->mm, node);
126 
127 	return err;
128 }
129 
130 static u64 random_offset(u64 start, u64 end, u64 len, u64 align)
131 {
132 	u64 range, addr;
133 
134 	GEM_BUG_ON(range_overflows(start, len, end));
135 	GEM_BUG_ON(round_up(start, align) > round_down(end - len, align));
136 
137 	range = round_down(end - len, align) - round_up(start, align);
138 	if (range) {
139 		if (sizeof(unsigned long) == sizeof(u64)) {
140 			addr = get_random_long();
141 		} else {
142 			addr = get_random_int();
143 			if (range > U32_MAX) {
144 				addr <<= 32;
145 				addr |= get_random_int();
146 			}
147 		}
148 		div64_u64_rem(addr, range, &addr);
149 		start += addr;
150 	}
151 
152 	return round_up(start, align);
153 }
154 
155 /**
156  * i915_gem_gtt_insert - insert a node into an address_space (GTT)
157  * @vm: the &struct i915_address_space
158  * @ww: An optional struct i915_gem_ww_ctx.
159  * @node: the &struct drm_mm_node (typically i915_vma.node)
160  * @size: how much space to allocate inside the GTT,
161  *        must be #I915_GTT_PAGE_SIZE aligned
162  * @alignment: required alignment of starting offset, may be 0 but
163  *             if specified, this must be a power-of-two and at least
164  *             #I915_GTT_MIN_ALIGNMENT
165  * @color: color to apply to node
166  * @start: start of any range restriction inside GTT (0 for all),
167  *         must be #I915_GTT_PAGE_SIZE aligned
168  * @end: end of any range restriction inside GTT (U64_MAX for all),
169  *       must be #I915_GTT_PAGE_SIZE aligned if not U64_MAX
170  * @flags: control search and eviction behaviour
171  *
172  * i915_gem_gtt_insert() first searches for an available hole into which
173  * is can insert the node. The hole address is aligned to @alignment and
174  * its @size must then fit entirely within the [@start, @end] bounds. The
175  * nodes on either side of the hole must match @color, or else a guard page
176  * will be inserted between the two nodes (or the node evicted). If no
177  * suitable hole is found, first a victim is randomly selected and tested
178  * for eviction, otherwise then the LRU list of objects within the GTT
179  * is scanned to find the first set of replacement nodes to create the hole.
180  * Those old overlapping nodes are evicted from the GTT (and so must be
181  * rebound before any future use). Any node that is currently pinned cannot
182  * be evicted (see i915_vma_pin()). Similar if the node's VMA is currently
183  * active and #PIN_NONBLOCK is specified, that node is also skipped when
184  * searching for an eviction candidate. See i915_gem_evict_something() for
185  * the gory details on the eviction algorithm.
186  *
187  * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
188  * asked to wait for eviction and interrupted.
189  */
190 int i915_gem_gtt_insert(struct i915_address_space *vm,
191 			struct i915_gem_ww_ctx *ww,
192 			struct drm_mm_node *node,
193 			u64 size, u64 alignment, unsigned long color,
194 			u64 start, u64 end, unsigned int flags)
195 {
196 	enum drm_mm_insert_mode mode;
197 	u64 offset;
198 	int err;
199 
200 	lockdep_assert_held(&vm->mutex);
201 
202 	GEM_BUG_ON(!size);
203 	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
204 	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
205 	GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
206 	GEM_BUG_ON(start >= end);
207 	GEM_BUG_ON(start > 0  && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
208 	GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
209 	GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
210 	GEM_BUG_ON(drm_mm_node_allocated(node));
211 
212 	if (unlikely(range_overflows(start, size, end)))
213 		return -ENOSPC;
214 
215 	if (unlikely(round_up(start, alignment) > round_down(end - size, alignment)))
216 		return -ENOSPC;
217 
218 	mode = DRM_MM_INSERT_BEST;
219 	if (flags & PIN_HIGH)
220 		mode = DRM_MM_INSERT_HIGHEST;
221 	if (flags & PIN_MAPPABLE)
222 		mode = DRM_MM_INSERT_LOW;
223 
224 	/* We only allocate in PAGE_SIZE/GTT_PAGE_SIZE (4096) chunks,
225 	 * so we know that we always have a minimum alignment of 4096.
226 	 * The drm_mm range manager is optimised to return results
227 	 * with zero alignment, so where possible use the optimal
228 	 * path.
229 	 */
230 	BUILD_BUG_ON(I915_GTT_MIN_ALIGNMENT > I915_GTT_PAGE_SIZE);
231 	if (alignment <= I915_GTT_MIN_ALIGNMENT)
232 		alignment = 0;
233 
234 	err = drm_mm_insert_node_in_range(&vm->mm, node,
235 					  size, alignment, color,
236 					  start, end, mode);
237 	if (err != -ENOSPC)
238 		return err;
239 
240 	if (mode & DRM_MM_INSERT_ONCE) {
241 		err = drm_mm_insert_node_in_range(&vm->mm, node,
242 						  size, alignment, color,
243 						  start, end,
244 						  DRM_MM_INSERT_BEST);
245 		if (err != -ENOSPC)
246 			return err;
247 	}
248 
249 	if (flags & PIN_NOEVICT)
250 		return -ENOSPC;
251 
252 	/*
253 	 * No free space, pick a slot at random.
254 	 *
255 	 * There is a pathological case here using a GTT shared between
256 	 * mmap and GPU (i.e. ggtt/aliasing_ppgtt but not full-ppgtt):
257 	 *
258 	 *    |<-- 256 MiB aperture -->||<-- 1792 MiB unmappable -->|
259 	 *         (64k objects)             (448k objects)
260 	 *
261 	 * Now imagine that the eviction LRU is ordered top-down (just because
262 	 * pathology meets real life), and that we need to evict an object to
263 	 * make room inside the aperture. The eviction scan then has to walk
264 	 * the 448k list before it finds one within range. And now imagine that
265 	 * it has to search for a new hole between every byte inside the memcpy,
266 	 * for several simultaneous clients.
267 	 *
268 	 * On a full-ppgtt system, if we have run out of available space, there
269 	 * will be lots and lots of objects in the eviction list! Again,
270 	 * searching that LRU list may be slow if we are also applying any
271 	 * range restrictions (e.g. restriction to low 4GiB) and so, for
272 	 * simplicity and similarilty between different GTT, try the single
273 	 * random replacement first.
274 	 */
275 	offset = random_offset(start, end,
276 			       size, alignment ?: I915_GTT_MIN_ALIGNMENT);
277 	err = i915_gem_gtt_reserve(vm, ww, node, size, offset, color, flags);
278 	if (err != -ENOSPC)
279 		return err;
280 
281 	if (flags & PIN_NOSEARCH)
282 		return -ENOSPC;
283 
284 	/* Randomly selected placement is pinned, do a search */
285 	err = i915_gem_evict_something(vm, ww, size, alignment, color,
286 				       start, end, flags);
287 	if (err)
288 		return err;
289 
290 	return drm_mm_insert_node_in_range(&vm->mm, node,
291 					   size, alignment, color,
292 					   start, end, DRM_MM_INSERT_EVICT);
293 }
294 
295 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
296 #include "selftests/i915_gem_gtt.c"
297 #endif
298