1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2018 Intel Corporation 4 */ 5 6 #ifndef _I915_FIXED_H_ 7 #define _I915_FIXED_H_ 8 9 typedef struct { 10 u32 val; 11 } uint_fixed_16_16_t; 12 13 #define FP_16_16_MAX ((uint_fixed_16_16_t){ .val = UINT_MAX }) 14 15 static inline bool is_fixed16_zero(uint_fixed_16_16_t val) 16 { 17 return val.val == 0; 18 } 19 20 static inline uint_fixed_16_16_t u32_to_fixed16(u32 val) 21 { 22 uint_fixed_16_16_t fp = { .val = val << 16 }; 23 24 WARN_ON(val > U16_MAX); 25 26 return fp; 27 } 28 29 static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp) 30 { 31 return DIV_ROUND_UP(fp.val, 1 << 16); 32 } 33 34 static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp) 35 { 36 return fp.val >> 16; 37 } 38 39 static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1, 40 uint_fixed_16_16_t min2) 41 { 42 uint_fixed_16_16_t min = { .val = min(min1.val, min2.val) }; 43 44 return min; 45 } 46 47 static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1, 48 uint_fixed_16_16_t max2) 49 { 50 uint_fixed_16_16_t max = { .val = max(max1.val, max2.val) }; 51 52 return max; 53 } 54 55 static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val) 56 { 57 uint_fixed_16_16_t fp = { .val = (u32)val }; 58 59 WARN_ON(val > U32_MAX); 60 61 return fp; 62 } 63 64 static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val, 65 uint_fixed_16_16_t d) 66 { 67 return DIV_ROUND_UP(val.val, d.val); 68 } 69 70 static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) 71 { 72 u64 tmp; 73 74 tmp = (u64)val * mul.val; 75 tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16); 76 WARN_ON(tmp > U32_MAX); 77 78 return (u32)tmp; 79 } 80 81 static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val, 82 uint_fixed_16_16_t mul) 83 { 84 u64 tmp; 85 86 tmp = (u64)val.val * mul.val; 87 tmp = tmp >> 16; 88 89 return clamp_u64_to_fixed16(tmp); 90 } 91 92 static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d) 93 { 94 u64 tmp; 95 96 tmp = (u64)val << 16; 97 tmp = DIV_ROUND_UP_ULL(tmp, d); 98 99 return clamp_u64_to_fixed16(tmp); 100 } 101 102 static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d) 103 { 104 u64 tmp; 105 106 tmp = (u64)val << 16; 107 tmp = DIV_ROUND_UP_ULL(tmp, d.val); 108 WARN_ON(tmp > U32_MAX); 109 110 return (u32)tmp; 111 } 112 113 static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) 114 { 115 u64 tmp; 116 117 tmp = (u64)val * mul.val; 118 119 return clamp_u64_to_fixed16(tmp); 120 } 121 122 static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1, 123 uint_fixed_16_16_t add2) 124 { 125 u64 tmp; 126 127 tmp = (u64)add1.val + add2.val; 128 129 return clamp_u64_to_fixed16(tmp); 130 } 131 132 static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1, 133 u32 add2) 134 { 135 uint_fixed_16_16_t tmp_add2 = u32_to_fixed16(add2); 136 u64 tmp; 137 138 tmp = (u64)add1.val + tmp_add2.val; 139 140 return clamp_u64_to_fixed16(tmp); 141 } 142 143 #endif /* _I915_FIXED_H_ */ 144