xref: /openbmc/linux/drivers/gpu/drm/i915/i915_debugfs.c (revision baa7eb025ab14f3cba2e35c0a8648f9c9f01d24f)
1 /*
2  * Copyright © 2008 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *    Keith Packard <keithp@keithp.com>
26  *
27  */
28 
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "intel_drv.h"
35 #include "i915_drm.h"
36 #include "i915_drv.h"
37 
38 #define DRM_I915_RING_DEBUG 1
39 
40 
41 #if defined(CONFIG_DEBUG_FS)
42 
43 enum {
44 	ACTIVE_LIST,
45 	FLUSHING_LIST,
46 	INACTIVE_LIST,
47 	PINNED_LIST,
48 	DEFERRED_FREE_LIST,
49 };
50 
51 static const char *yesno(int v)
52 {
53 	return v ? "yes" : "no";
54 }
55 
56 static int i915_capabilities(struct seq_file *m, void *data)
57 {
58 	struct drm_info_node *node = (struct drm_info_node *) m->private;
59 	struct drm_device *dev = node->minor->dev;
60 	const struct intel_device_info *info = INTEL_INFO(dev);
61 
62 	seq_printf(m, "gen: %d\n", info->gen);
63 #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
64 	B(is_mobile);
65 	B(is_i85x);
66 	B(is_i915g);
67 	B(is_i945gm);
68 	B(is_g33);
69 	B(need_gfx_hws);
70 	B(is_g4x);
71 	B(is_pineview);
72 	B(is_broadwater);
73 	B(is_crestline);
74 	B(has_fbc);
75 	B(has_rc6);
76 	B(has_pipe_cxsr);
77 	B(has_hotplug);
78 	B(cursor_needs_physical);
79 	B(has_overlay);
80 	B(overlay_needs_physical);
81 	B(supports_tv);
82 	B(has_bsd_ring);
83 	B(has_blt_ring);
84 #undef B
85 
86 	return 0;
87 }
88 
89 static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
90 {
91 	if (obj_priv->user_pin_count > 0)
92 		return "P";
93 	else if (obj_priv->pin_count > 0)
94 		return "p";
95 	else
96 		return " ";
97 }
98 
99 static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
100 {
101     switch (obj_priv->tiling_mode) {
102     default:
103     case I915_TILING_NONE: return " ";
104     case I915_TILING_X: return "X";
105     case I915_TILING_Y: return "Y";
106     }
107 }
108 
109 static void
110 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
111 {
112 	seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
113 		   &obj->base,
114 		   get_pin_flag(obj),
115 		   get_tiling_flag(obj),
116 		   obj->base.size,
117 		   obj->base.read_domains,
118 		   obj->base.write_domain,
119 		   obj->last_rendering_seqno,
120 		   obj->dirty ? " dirty" : "",
121 		   obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
122 	if (obj->base.name)
123 		seq_printf(m, " (name: %d)", obj->base.name);
124 	if (obj->fence_reg != I915_FENCE_REG_NONE)
125 		seq_printf(m, " (fence: %d)", obj->fence_reg);
126 	if (obj->gtt_space != NULL)
127 		seq_printf(m, " (gtt_offset: %08x)", obj->gtt_offset);
128 	if (obj->ring != NULL)
129 		seq_printf(m, " (%s)", obj->ring->name);
130 }
131 
132 static int i915_gem_object_list_info(struct seq_file *m, void *data)
133 {
134 	struct drm_info_node *node = (struct drm_info_node *) m->private;
135 	uintptr_t list = (uintptr_t) node->info_ent->data;
136 	struct list_head *head;
137 	struct drm_device *dev = node->minor->dev;
138 	drm_i915_private_t *dev_priv = dev->dev_private;
139 	struct drm_i915_gem_object *obj_priv;
140 	size_t total_obj_size, total_gtt_size;
141 	int count, ret;
142 
143 	ret = mutex_lock_interruptible(&dev->struct_mutex);
144 	if (ret)
145 		return ret;
146 
147 	switch (list) {
148 	case ACTIVE_LIST:
149 		seq_printf(m, "Active:\n");
150 		head = &dev_priv->mm.active_list;
151 		break;
152 	case INACTIVE_LIST:
153 		seq_printf(m, "Inactive:\n");
154 		head = &dev_priv->mm.inactive_list;
155 		break;
156 	case PINNED_LIST:
157 		seq_printf(m, "Pinned:\n");
158 		head = &dev_priv->mm.pinned_list;
159 		break;
160 	case FLUSHING_LIST:
161 		seq_printf(m, "Flushing:\n");
162 		head = &dev_priv->mm.flushing_list;
163 		break;
164 	case DEFERRED_FREE_LIST:
165 		seq_printf(m, "Deferred free:\n");
166 		head = &dev_priv->mm.deferred_free_list;
167 		break;
168 	default:
169 		mutex_unlock(&dev->struct_mutex);
170 		return -EINVAL;
171 	}
172 
173 	total_obj_size = total_gtt_size = count = 0;
174 	list_for_each_entry(obj_priv, head, mm_list) {
175 		seq_printf(m, "   ");
176 		describe_obj(m, obj_priv);
177 		seq_printf(m, "\n");
178 		total_obj_size += obj_priv->base.size;
179 		total_gtt_size += obj_priv->gtt_space->size;
180 		count++;
181 	}
182 	mutex_unlock(&dev->struct_mutex);
183 
184 	seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
185 		   count, total_obj_size, total_gtt_size);
186 	return 0;
187 }
188 
189 static int i915_gem_object_info(struct seq_file *m, void* data)
190 {
191 	struct drm_info_node *node = (struct drm_info_node *) m->private;
192 	struct drm_device *dev = node->minor->dev;
193 	struct drm_i915_private *dev_priv = dev->dev_private;
194 	int ret;
195 
196 	ret = mutex_lock_interruptible(&dev->struct_mutex);
197 	if (ret)
198 		return ret;
199 
200 	seq_printf(m, "%u objects\n", dev_priv->mm.object_count);
201 	seq_printf(m, "%zu object bytes\n", dev_priv->mm.object_memory);
202 	seq_printf(m, "%u pinned\n", dev_priv->mm.pin_count);
203 	seq_printf(m, "%zu pin bytes\n", dev_priv->mm.pin_memory);
204 	seq_printf(m, "%u objects in gtt\n", dev_priv->mm.gtt_count);
205 	seq_printf(m, "%zu gtt bytes\n", dev_priv->mm.gtt_memory);
206 	seq_printf(m, "%zu gtt total\n", dev_priv->mm.gtt_total);
207 
208 	mutex_unlock(&dev->struct_mutex);
209 
210 	return 0;
211 }
212 
213 
214 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
215 {
216 	struct drm_info_node *node = (struct drm_info_node *) m->private;
217 	struct drm_device *dev = node->minor->dev;
218 	unsigned long flags;
219 	struct intel_crtc *crtc;
220 
221 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
222 		const char *pipe = crtc->pipe ? "B" : "A";
223 		const char *plane = crtc->plane ? "B" : "A";
224 		struct intel_unpin_work *work;
225 
226 		spin_lock_irqsave(&dev->event_lock, flags);
227 		work = crtc->unpin_work;
228 		if (work == NULL) {
229 			seq_printf(m, "No flip due on pipe %s (plane %s)\n",
230 				   pipe, plane);
231 		} else {
232 			if (!work->pending) {
233 				seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
234 					   pipe, plane);
235 			} else {
236 				seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
237 					   pipe, plane);
238 			}
239 			if (work->enable_stall_check)
240 				seq_printf(m, "Stall check enabled, ");
241 			else
242 				seq_printf(m, "Stall check waiting for page flip ioctl, ");
243 			seq_printf(m, "%d prepares\n", work->pending);
244 
245 			if (work->old_fb_obj) {
246 				struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
247 				if(obj_priv)
248 					seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
249 			}
250 			if (work->pending_flip_obj) {
251 				struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
252 				if(obj_priv)
253 					seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
254 			}
255 		}
256 		spin_unlock_irqrestore(&dev->event_lock, flags);
257 	}
258 
259 	return 0;
260 }
261 
262 static int i915_gem_request_info(struct seq_file *m, void *data)
263 {
264 	struct drm_info_node *node = (struct drm_info_node *) m->private;
265 	struct drm_device *dev = node->minor->dev;
266 	drm_i915_private_t *dev_priv = dev->dev_private;
267 	struct drm_i915_gem_request *gem_request;
268 	int ret;
269 
270 	ret = mutex_lock_interruptible(&dev->struct_mutex);
271 	if (ret)
272 		return ret;
273 
274 	seq_printf(m, "Request:\n");
275 	list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
276 			list) {
277 		seq_printf(m, "    %d @ %d\n",
278 			   gem_request->seqno,
279 			   (int) (jiffies - gem_request->emitted_jiffies));
280 	}
281 	mutex_unlock(&dev->struct_mutex);
282 
283 	return 0;
284 }
285 
286 static int i915_gem_seqno_info(struct seq_file *m, void *data)
287 {
288 	struct drm_info_node *node = (struct drm_info_node *) m->private;
289 	struct drm_device *dev = node->minor->dev;
290 	drm_i915_private_t *dev_priv = dev->dev_private;
291 	int ret;
292 
293 	ret = mutex_lock_interruptible(&dev->struct_mutex);
294 	if (ret)
295 		return ret;
296 
297 	if (dev_priv->render_ring.status_page.page_addr != NULL) {
298 		seq_printf(m, "Current sequence: %d\n",
299 			   dev_priv->render_ring.get_seqno(dev, &dev_priv->render_ring));
300 	} else {
301 		seq_printf(m, "Current sequence: hws uninitialized\n");
302 	}
303 	seq_printf(m, "Waiter sequence:  %d\n",
304 			dev_priv->mm.waiting_gem_seqno);
305 	seq_printf(m, "IRQ sequence:     %d\n", dev_priv->mm.irq_gem_seqno);
306 
307 	mutex_unlock(&dev->struct_mutex);
308 
309 	return 0;
310 }
311 
312 
313 static int i915_interrupt_info(struct seq_file *m, void *data)
314 {
315 	struct drm_info_node *node = (struct drm_info_node *) m->private;
316 	struct drm_device *dev = node->minor->dev;
317 	drm_i915_private_t *dev_priv = dev->dev_private;
318 	int ret;
319 
320 	ret = mutex_lock_interruptible(&dev->struct_mutex);
321 	if (ret)
322 		return ret;
323 
324 	if (!HAS_PCH_SPLIT(dev)) {
325 		seq_printf(m, "Interrupt enable:    %08x\n",
326 			   I915_READ(IER));
327 		seq_printf(m, "Interrupt identity:  %08x\n",
328 			   I915_READ(IIR));
329 		seq_printf(m, "Interrupt mask:      %08x\n",
330 			   I915_READ(IMR));
331 		seq_printf(m, "Pipe A stat:         %08x\n",
332 			   I915_READ(PIPEASTAT));
333 		seq_printf(m, "Pipe B stat:         %08x\n",
334 			   I915_READ(PIPEBSTAT));
335 	} else {
336 		seq_printf(m, "North Display Interrupt enable:		%08x\n",
337 			   I915_READ(DEIER));
338 		seq_printf(m, "North Display Interrupt identity:	%08x\n",
339 			   I915_READ(DEIIR));
340 		seq_printf(m, "North Display Interrupt mask:		%08x\n",
341 			   I915_READ(DEIMR));
342 		seq_printf(m, "South Display Interrupt enable:		%08x\n",
343 			   I915_READ(SDEIER));
344 		seq_printf(m, "South Display Interrupt identity:	%08x\n",
345 			   I915_READ(SDEIIR));
346 		seq_printf(m, "South Display Interrupt mask:		%08x\n",
347 			   I915_READ(SDEIMR));
348 		seq_printf(m, "Graphics Interrupt enable:		%08x\n",
349 			   I915_READ(GTIER));
350 		seq_printf(m, "Graphics Interrupt identity:		%08x\n",
351 			   I915_READ(GTIIR));
352 		seq_printf(m, "Graphics Interrupt mask:		%08x\n",
353 			   I915_READ(GTIMR));
354 	}
355 	seq_printf(m, "Interrupts received: %d\n",
356 		   atomic_read(&dev_priv->irq_received));
357 	if (dev_priv->render_ring.status_page.page_addr != NULL) {
358 		seq_printf(m, "Current sequence:    %d\n",
359 			   dev_priv->render_ring.get_seqno(dev, &dev_priv->render_ring));
360 	} else {
361 		seq_printf(m, "Current sequence:    hws uninitialized\n");
362 	}
363 	seq_printf(m, "Waiter sequence:     %d\n",
364 		   dev_priv->mm.waiting_gem_seqno);
365 	seq_printf(m, "IRQ sequence:        %d\n",
366 		   dev_priv->mm.irq_gem_seqno);
367 	mutex_unlock(&dev->struct_mutex);
368 
369 	return 0;
370 }
371 
372 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
373 {
374 	struct drm_info_node *node = (struct drm_info_node *) m->private;
375 	struct drm_device *dev = node->minor->dev;
376 	drm_i915_private_t *dev_priv = dev->dev_private;
377 	int i, ret;
378 
379 	ret = mutex_lock_interruptible(&dev->struct_mutex);
380 	if (ret)
381 		return ret;
382 
383 	seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
384 	seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
385 	for (i = 0; i < dev_priv->num_fence_regs; i++) {
386 		struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
387 
388 		if (obj == NULL) {
389 			seq_printf(m, "Fenced object[%2d] = unused\n", i);
390 		} else {
391 			struct drm_i915_gem_object *obj_priv;
392 
393 			obj_priv = to_intel_bo(obj);
394 			seq_printf(m, "Fenced object[%2d] = %p: %s "
395 				   "%08x %08zx %08x %s %08x %08x %d",
396 				   i, obj, get_pin_flag(obj_priv),
397 				   obj_priv->gtt_offset,
398 				   obj->size, obj_priv->stride,
399 				   get_tiling_flag(obj_priv),
400 				   obj->read_domains, obj->write_domain,
401 				   obj_priv->last_rendering_seqno);
402 			if (obj->name)
403 				seq_printf(m, " (name: %d)", obj->name);
404 			seq_printf(m, "\n");
405 		}
406 	}
407 	mutex_unlock(&dev->struct_mutex);
408 
409 	return 0;
410 }
411 
412 static int i915_hws_info(struct seq_file *m, void *data)
413 {
414 	struct drm_info_node *node = (struct drm_info_node *) m->private;
415 	struct drm_device *dev = node->minor->dev;
416 	drm_i915_private_t *dev_priv = dev->dev_private;
417 	int i;
418 	volatile u32 *hws;
419 
420 	hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
421 	if (hws == NULL)
422 		return 0;
423 
424 	for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
425 		seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
426 			   i * 4,
427 			   hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
428 	}
429 	return 0;
430 }
431 
432 static void i915_dump_object(struct seq_file *m,
433 			     struct io_mapping *mapping,
434 			     struct drm_i915_gem_object *obj_priv)
435 {
436 	int page, page_count, i;
437 
438 	page_count = obj_priv->base.size / PAGE_SIZE;
439 	for (page = 0; page < page_count; page++) {
440 		u32 *mem = io_mapping_map_wc(mapping,
441 					     obj_priv->gtt_offset + page * PAGE_SIZE);
442 		for (i = 0; i < PAGE_SIZE; i += 4)
443 			seq_printf(m, "%08x :  %08x\n", i, mem[i / 4]);
444 		io_mapping_unmap(mem);
445 	}
446 }
447 
448 static int i915_batchbuffer_info(struct seq_file *m, void *data)
449 {
450 	struct drm_info_node *node = (struct drm_info_node *) m->private;
451 	struct drm_device *dev = node->minor->dev;
452 	drm_i915_private_t *dev_priv = dev->dev_private;
453 	struct drm_gem_object *obj;
454 	struct drm_i915_gem_object *obj_priv;
455 	int ret;
456 
457 	ret = mutex_lock_interruptible(&dev->struct_mutex);
458 	if (ret)
459 		return ret;
460 
461 	list_for_each_entry(obj_priv, &dev_priv->mm.active_list, mm_list) {
462 		obj = &obj_priv->base;
463 		if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
464 		    seq_printf(m, "--- gtt_offset = 0x%08x\n",
465 			       obj_priv->gtt_offset);
466 		    i915_dump_object(m, dev_priv->mm.gtt_mapping, obj_priv);
467 		}
468 	}
469 
470 	mutex_unlock(&dev->struct_mutex);
471 
472 	return 0;
473 }
474 
475 static int i915_ringbuffer_data(struct seq_file *m, void *data)
476 {
477 	struct drm_info_node *node = (struct drm_info_node *) m->private;
478 	struct drm_device *dev = node->minor->dev;
479 	drm_i915_private_t *dev_priv = dev->dev_private;
480 	int ret;
481 
482 	ret = mutex_lock_interruptible(&dev->struct_mutex);
483 	if (ret)
484 		return ret;
485 
486 	if (!dev_priv->render_ring.gem_object) {
487 		seq_printf(m, "No ringbuffer setup\n");
488 	} else {
489 		u8 *virt = dev_priv->render_ring.virtual_start;
490 		uint32_t off;
491 
492 		for (off = 0; off < dev_priv->render_ring.size; off += 4) {
493 			uint32_t *ptr = (uint32_t *)(virt + off);
494 			seq_printf(m, "%08x :  %08x\n", off, *ptr);
495 		}
496 	}
497 	mutex_unlock(&dev->struct_mutex);
498 
499 	return 0;
500 }
501 
502 static int i915_ringbuffer_info(struct seq_file *m, void *data)
503 {
504 	struct drm_info_node *node = (struct drm_info_node *) m->private;
505 	struct drm_device *dev = node->minor->dev;
506 	drm_i915_private_t *dev_priv = dev->dev_private;
507 	unsigned int head, tail;
508 
509 	head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
510 	tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
511 
512 	seq_printf(m, "RingHead :  %08x\n", head);
513 	seq_printf(m, "RingTail :  %08x\n", tail);
514 	seq_printf(m, "RingSize :  %08lx\n", dev_priv->render_ring.size);
515 	seq_printf(m, "Acthd :     %08x\n", I915_READ(INTEL_INFO(dev)->gen >= 4 ? ACTHD_I965 : ACTHD));
516 
517 	return 0;
518 }
519 
520 static const char *pin_flag(int pinned)
521 {
522 	if (pinned > 0)
523 		return " P";
524 	else if (pinned < 0)
525 		return " p";
526 	else
527 		return "";
528 }
529 
530 static const char *tiling_flag(int tiling)
531 {
532 	switch (tiling) {
533 	default:
534 	case I915_TILING_NONE: return "";
535 	case I915_TILING_X: return " X";
536 	case I915_TILING_Y: return " Y";
537 	}
538 }
539 
540 static const char *dirty_flag(int dirty)
541 {
542 	return dirty ? " dirty" : "";
543 }
544 
545 static const char *purgeable_flag(int purgeable)
546 {
547 	return purgeable ? " purgeable" : "";
548 }
549 
550 static int i915_error_state(struct seq_file *m, void *unused)
551 {
552 	struct drm_info_node *node = (struct drm_info_node *) m->private;
553 	struct drm_device *dev = node->minor->dev;
554 	drm_i915_private_t *dev_priv = dev->dev_private;
555 	struct drm_i915_error_state *error;
556 	unsigned long flags;
557 	int i, page, offset, elt;
558 
559 	spin_lock_irqsave(&dev_priv->error_lock, flags);
560 	if (!dev_priv->first_error) {
561 		seq_printf(m, "no error state collected\n");
562 		goto out;
563 	}
564 
565 	error = dev_priv->first_error;
566 
567 	seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
568 		   error->time.tv_usec);
569 	seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
570 	seq_printf(m, "EIR: 0x%08x\n", error->eir);
571 	seq_printf(m, "  PGTBL_ER: 0x%08x\n", error->pgtbl_er);
572 	seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm);
573 	seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir);
574 	seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr);
575 	seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone);
576 	seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd);
577 	if (INTEL_INFO(dev)->gen >= 4) {
578 		seq_printf(m, "  INSTPS: 0x%08x\n", error->instps);
579 		seq_printf(m, "  INSTDONE1: 0x%08x\n", error->instdone1);
580 	}
581 	seq_printf(m, "seqno: 0x%08x\n", error->seqno);
582 
583 	if (error->active_bo_count) {
584 		seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
585 
586 		for (i = 0; i < error->active_bo_count; i++) {
587 			seq_printf(m, "  %08x %8zd %08x %08x %08x%s%s%s%s",
588 				   error->active_bo[i].gtt_offset,
589 				   error->active_bo[i].size,
590 				   error->active_bo[i].read_domains,
591 				   error->active_bo[i].write_domain,
592 				   error->active_bo[i].seqno,
593 				   pin_flag(error->active_bo[i].pinned),
594 				   tiling_flag(error->active_bo[i].tiling),
595 				   dirty_flag(error->active_bo[i].dirty),
596 				   purgeable_flag(error->active_bo[i].purgeable));
597 
598 			if (error->active_bo[i].name)
599 				seq_printf(m, " (name: %d)", error->active_bo[i].name);
600 			if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
601 				seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
602 
603 			seq_printf(m, "\n");
604 		}
605 	}
606 
607 	for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
608 		if (error->batchbuffer[i]) {
609 			struct drm_i915_error_object *obj = error->batchbuffer[i];
610 
611 			seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
612 			offset = 0;
613 			for (page = 0; page < obj->page_count; page++) {
614 				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
615 					seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
616 					offset += 4;
617 				}
618 			}
619 		}
620 	}
621 
622 	if (error->ringbuffer) {
623 		struct drm_i915_error_object *obj = error->ringbuffer;
624 
625 		seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
626 		offset = 0;
627 		for (page = 0; page < obj->page_count; page++) {
628 			for (elt = 0; elt < PAGE_SIZE/4; elt++) {
629 				seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
630 				offset += 4;
631 			}
632 		}
633 	}
634 
635 	if (error->overlay)
636 		intel_overlay_print_error_state(m, error->overlay);
637 
638 out:
639 	spin_unlock_irqrestore(&dev_priv->error_lock, flags);
640 
641 	return 0;
642 }
643 
644 static int i915_rstdby_delays(struct seq_file *m, void *unused)
645 {
646 	struct drm_info_node *node = (struct drm_info_node *) m->private;
647 	struct drm_device *dev = node->minor->dev;
648 	drm_i915_private_t *dev_priv = dev->dev_private;
649 	u16 crstanddelay = I915_READ16(CRSTANDVID);
650 
651 	seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
652 
653 	return 0;
654 }
655 
656 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
657 {
658 	struct drm_info_node *node = (struct drm_info_node *) m->private;
659 	struct drm_device *dev = node->minor->dev;
660 	drm_i915_private_t *dev_priv = dev->dev_private;
661 	u16 rgvswctl = I915_READ16(MEMSWCTL);
662 	u16 rgvstat = I915_READ16(MEMSTAT_ILK);
663 
664 	seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
665 	seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
666 	seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
667 		   MEMSTAT_VID_SHIFT);
668 	seq_printf(m, "Current P-state: %d\n",
669 		   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
670 
671 	return 0;
672 }
673 
674 static int i915_delayfreq_table(struct seq_file *m, void *unused)
675 {
676 	struct drm_info_node *node = (struct drm_info_node *) m->private;
677 	struct drm_device *dev = node->minor->dev;
678 	drm_i915_private_t *dev_priv = dev->dev_private;
679 	u32 delayfreq;
680 	int i;
681 
682 	for (i = 0; i < 16; i++) {
683 		delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
684 		seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
685 			   (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
686 	}
687 
688 	return 0;
689 }
690 
691 static inline int MAP_TO_MV(int map)
692 {
693 	return 1250 - (map * 25);
694 }
695 
696 static int i915_inttoext_table(struct seq_file *m, void *unused)
697 {
698 	struct drm_info_node *node = (struct drm_info_node *) m->private;
699 	struct drm_device *dev = node->minor->dev;
700 	drm_i915_private_t *dev_priv = dev->dev_private;
701 	u32 inttoext;
702 	int i;
703 
704 	for (i = 1; i <= 32; i++) {
705 		inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
706 		seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
707 	}
708 
709 	return 0;
710 }
711 
712 static int i915_drpc_info(struct seq_file *m, void *unused)
713 {
714 	struct drm_info_node *node = (struct drm_info_node *) m->private;
715 	struct drm_device *dev = node->minor->dev;
716 	drm_i915_private_t *dev_priv = dev->dev_private;
717 	u32 rgvmodectl = I915_READ(MEMMODECTL);
718 	u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
719 	u16 crstandvid = I915_READ16(CRSTANDVID);
720 
721 	seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
722 		   "yes" : "no");
723 	seq_printf(m, "Boost freq: %d\n",
724 		   (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
725 		   MEMMODE_BOOST_FREQ_SHIFT);
726 	seq_printf(m, "HW control enabled: %s\n",
727 		   rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
728 	seq_printf(m, "SW control enabled: %s\n",
729 		   rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
730 	seq_printf(m, "Gated voltage change: %s\n",
731 		   rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
732 	seq_printf(m, "Starting frequency: P%d\n",
733 		   (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
734 	seq_printf(m, "Max P-state: P%d\n",
735 		   (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
736 	seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
737 	seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
738 	seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
739 	seq_printf(m, "Render standby enabled: %s\n",
740 		   (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
741 
742 	return 0;
743 }
744 
745 static int i915_fbc_status(struct seq_file *m, void *unused)
746 {
747 	struct drm_info_node *node = (struct drm_info_node *) m->private;
748 	struct drm_device *dev = node->minor->dev;
749 	drm_i915_private_t *dev_priv = dev->dev_private;
750 
751 	if (!I915_HAS_FBC(dev)) {
752 		seq_printf(m, "FBC unsupported on this chipset\n");
753 		return 0;
754 	}
755 
756 	if (intel_fbc_enabled(dev)) {
757 		seq_printf(m, "FBC enabled\n");
758 	} else {
759 		seq_printf(m, "FBC disabled: ");
760 		switch (dev_priv->no_fbc_reason) {
761 		case FBC_NO_OUTPUT:
762 			seq_printf(m, "no outputs");
763 			break;
764 		case FBC_STOLEN_TOO_SMALL:
765 			seq_printf(m, "not enough stolen memory");
766 			break;
767 		case FBC_UNSUPPORTED_MODE:
768 			seq_printf(m, "mode not supported");
769 			break;
770 		case FBC_MODE_TOO_LARGE:
771 			seq_printf(m, "mode too large");
772 			break;
773 		case FBC_BAD_PLANE:
774 			seq_printf(m, "FBC unsupported on plane");
775 			break;
776 		case FBC_NOT_TILED:
777 			seq_printf(m, "scanout buffer not tiled");
778 			break;
779 		case FBC_MULTIPLE_PIPES:
780 			seq_printf(m, "multiple pipes are enabled");
781 			break;
782 		default:
783 			seq_printf(m, "unknown reason");
784 		}
785 		seq_printf(m, "\n");
786 	}
787 	return 0;
788 }
789 
790 static int i915_sr_status(struct seq_file *m, void *unused)
791 {
792 	struct drm_info_node *node = (struct drm_info_node *) m->private;
793 	struct drm_device *dev = node->minor->dev;
794 	drm_i915_private_t *dev_priv = dev->dev_private;
795 	bool sr_enabled = false;
796 
797 	if (IS_GEN5(dev))
798 		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
799 	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
800 		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
801 	else if (IS_I915GM(dev))
802 		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
803 	else if (IS_PINEVIEW(dev))
804 		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
805 
806 	seq_printf(m, "self-refresh: %s\n",
807 		   sr_enabled ? "enabled" : "disabled");
808 
809 	return 0;
810 }
811 
812 static int i915_emon_status(struct seq_file *m, void *unused)
813 {
814 	struct drm_info_node *node = (struct drm_info_node *) m->private;
815 	struct drm_device *dev = node->minor->dev;
816 	drm_i915_private_t *dev_priv = dev->dev_private;
817 	unsigned long temp, chipset, gfx;
818 	int ret;
819 
820 	ret = mutex_lock_interruptible(&dev->struct_mutex);
821 	if (ret)
822 		return ret;
823 
824 	temp = i915_mch_val(dev_priv);
825 	chipset = i915_chipset_val(dev_priv);
826 	gfx = i915_gfx_val(dev_priv);
827 	mutex_unlock(&dev->struct_mutex);
828 
829 	seq_printf(m, "GMCH temp: %ld\n", temp);
830 	seq_printf(m, "Chipset power: %ld\n", chipset);
831 	seq_printf(m, "GFX power: %ld\n", gfx);
832 	seq_printf(m, "Total power: %ld\n", chipset + gfx);
833 
834 	return 0;
835 }
836 
837 static int i915_gfxec(struct seq_file *m, void *unused)
838 {
839 	struct drm_info_node *node = (struct drm_info_node *) m->private;
840 	struct drm_device *dev = node->minor->dev;
841 	drm_i915_private_t *dev_priv = dev->dev_private;
842 
843 	seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
844 
845 	return 0;
846 }
847 
848 static int i915_opregion(struct seq_file *m, void *unused)
849 {
850 	struct drm_info_node *node = (struct drm_info_node *) m->private;
851 	struct drm_device *dev = node->minor->dev;
852 	drm_i915_private_t *dev_priv = dev->dev_private;
853 	struct intel_opregion *opregion = &dev_priv->opregion;
854 	int ret;
855 
856 	ret = mutex_lock_interruptible(&dev->struct_mutex);
857 	if (ret)
858 		return ret;
859 
860 	if (opregion->header)
861 		seq_write(m, opregion->header, OPREGION_SIZE);
862 
863 	mutex_unlock(&dev->struct_mutex);
864 
865 	return 0;
866 }
867 
868 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
869 {
870 	struct drm_info_node *node = (struct drm_info_node *) m->private;
871 	struct drm_device *dev = node->minor->dev;
872 	drm_i915_private_t *dev_priv = dev->dev_private;
873 	struct intel_fbdev *ifbdev;
874 	struct intel_framebuffer *fb;
875 	int ret;
876 
877 	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
878 	if (ret)
879 		return ret;
880 
881 	ifbdev = dev_priv->fbdev;
882 	fb = to_intel_framebuffer(ifbdev->helper.fb);
883 
884 	seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
885 		   fb->base.width,
886 		   fb->base.height,
887 		   fb->base.depth,
888 		   fb->base.bits_per_pixel);
889 	describe_obj(m, to_intel_bo(fb->obj));
890 	seq_printf(m, "\n");
891 
892 	list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
893 		if (&fb->base == ifbdev->helper.fb)
894 			continue;
895 
896 		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
897 			   fb->base.width,
898 			   fb->base.height,
899 			   fb->base.depth,
900 			   fb->base.bits_per_pixel);
901 		describe_obj(m, to_intel_bo(fb->obj));
902 		seq_printf(m, "\n");
903 	}
904 
905 	mutex_unlock(&dev->mode_config.mutex);
906 
907 	return 0;
908 }
909 
910 static int
911 i915_wedged_open(struct inode *inode,
912 		 struct file *filp)
913 {
914 	filp->private_data = inode->i_private;
915 	return 0;
916 }
917 
918 static ssize_t
919 i915_wedged_read(struct file *filp,
920 		 char __user *ubuf,
921 		 size_t max,
922 		 loff_t *ppos)
923 {
924 	struct drm_device *dev = filp->private_data;
925 	drm_i915_private_t *dev_priv = dev->dev_private;
926 	char buf[80];
927 	int len;
928 
929 	len = snprintf(buf, sizeof (buf),
930 		       "wedged :  %d\n",
931 		       atomic_read(&dev_priv->mm.wedged));
932 
933 	if (len > sizeof (buf))
934 		len = sizeof (buf);
935 
936 	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
937 }
938 
939 static ssize_t
940 i915_wedged_write(struct file *filp,
941 		  const char __user *ubuf,
942 		  size_t cnt,
943 		  loff_t *ppos)
944 {
945 	struct drm_device *dev = filp->private_data;
946 	drm_i915_private_t *dev_priv = dev->dev_private;
947 	char buf[20];
948 	int val = 1;
949 
950 	if (cnt > 0) {
951 		if (cnt > sizeof (buf) - 1)
952 			return -EINVAL;
953 
954 		if (copy_from_user(buf, ubuf, cnt))
955 			return -EFAULT;
956 		buf[cnt] = 0;
957 
958 		val = simple_strtoul(buf, NULL, 0);
959 	}
960 
961 	DRM_INFO("Manually setting wedged to %d\n", val);
962 
963 	atomic_set(&dev_priv->mm.wedged, val);
964 	if (val) {
965 		wake_up_all(&dev_priv->irq_queue);
966 		queue_work(dev_priv->wq, &dev_priv->error_work);
967 	}
968 
969 	return cnt;
970 }
971 
972 static const struct file_operations i915_wedged_fops = {
973 	.owner = THIS_MODULE,
974 	.open = i915_wedged_open,
975 	.read = i915_wedged_read,
976 	.write = i915_wedged_write,
977 	.llseek = default_llseek,
978 };
979 
980 /* As the drm_debugfs_init() routines are called before dev->dev_private is
981  * allocated we need to hook into the minor for release. */
982 static int
983 drm_add_fake_info_node(struct drm_minor *minor,
984 		       struct dentry *ent,
985 		       const void *key)
986 {
987 	struct drm_info_node *node;
988 
989 	node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
990 	if (node == NULL) {
991 		debugfs_remove(ent);
992 		return -ENOMEM;
993 	}
994 
995 	node->minor = minor;
996 	node->dent = ent;
997 	node->info_ent = (void *) key;
998 	list_add(&node->list, &minor->debugfs_nodes.list);
999 
1000 	return 0;
1001 }
1002 
1003 static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1004 {
1005 	struct drm_device *dev = minor->dev;
1006 	struct dentry *ent;
1007 
1008 	ent = debugfs_create_file("i915_wedged",
1009 				  S_IRUGO | S_IWUSR,
1010 				  root, dev,
1011 				  &i915_wedged_fops);
1012 	if (IS_ERR(ent))
1013 		return PTR_ERR(ent);
1014 
1015 	return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1016 }
1017 
1018 static struct drm_info_list i915_debugfs_list[] = {
1019 	{"i915_capabilities", i915_capabilities, 0, 0},
1020 	{"i915_gem_objects", i915_gem_object_info, 0},
1021 	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1022 	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1023 	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
1024 	{"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
1025 	{"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
1026 	{"i915_gem_pageflip", i915_gem_pageflip_info, 0},
1027 	{"i915_gem_request", i915_gem_request_info, 0},
1028 	{"i915_gem_seqno", i915_gem_seqno_info, 0},
1029 	{"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
1030 	{"i915_gem_interrupt", i915_interrupt_info, 0},
1031 	{"i915_gem_hws", i915_hws_info, 0},
1032 	{"i915_ringbuffer_data", i915_ringbuffer_data, 0},
1033 	{"i915_ringbuffer_info", i915_ringbuffer_info, 0},
1034 	{"i915_batchbuffers", i915_batchbuffer_info, 0},
1035 	{"i915_error_state", i915_error_state, 0},
1036 	{"i915_rstdby_delays", i915_rstdby_delays, 0},
1037 	{"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1038 	{"i915_delayfreq_table", i915_delayfreq_table, 0},
1039 	{"i915_inttoext_table", i915_inttoext_table, 0},
1040 	{"i915_drpc_info", i915_drpc_info, 0},
1041 	{"i915_emon_status", i915_emon_status, 0},
1042 	{"i915_gfxec", i915_gfxec, 0},
1043 	{"i915_fbc_status", i915_fbc_status, 0},
1044 	{"i915_sr_status", i915_sr_status, 0},
1045 	{"i915_opregion", i915_opregion, 0},
1046 	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1047 };
1048 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
1049 
1050 int i915_debugfs_init(struct drm_minor *minor)
1051 {
1052 	int ret;
1053 
1054 	ret = i915_wedged_create(minor->debugfs_root, minor);
1055 	if (ret)
1056 		return ret;
1057 
1058 	return drm_debugfs_create_files(i915_debugfs_list,
1059 					I915_DEBUGFS_ENTRIES,
1060 					minor->debugfs_root, minor);
1061 }
1062 
1063 void i915_debugfs_cleanup(struct drm_minor *minor)
1064 {
1065 	drm_debugfs_remove_files(i915_debugfs_list,
1066 				 I915_DEBUGFS_ENTRIES, minor);
1067 	drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1068 				 1, minor);
1069 }
1070 
1071 #endif /* CONFIG_DEBUG_FS */
1072