1 /* 2 * Copyright © 2008 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * Keith Packard <keithp@keithp.com> 26 * 27 */ 28 29 #include <linux/seq_file.h> 30 #include <linux/debugfs.h> 31 #include <linux/slab.h> 32 #include <linux/export.h> 33 #include <drm/drmP.h> 34 #include "intel_drv.h" 35 #include "intel_ringbuffer.h" 36 #include <drm/i915_drm.h> 37 #include "i915_drv.h" 38 39 #define DRM_I915_RING_DEBUG 1 40 41 42 #if defined(CONFIG_DEBUG_FS) 43 44 enum { 45 ACTIVE_LIST, 46 INACTIVE_LIST, 47 PINNED_LIST, 48 }; 49 50 static const char *yesno(int v) 51 { 52 return v ? "yes" : "no"; 53 } 54 55 static int i915_capabilities(struct seq_file *m, void *data) 56 { 57 struct drm_info_node *node = (struct drm_info_node *) m->private; 58 struct drm_device *dev = node->minor->dev; 59 const struct intel_device_info *info = INTEL_INFO(dev); 60 61 seq_printf(m, "gen: %d\n", info->gen); 62 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev)); 63 #define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x)) 64 #define DEV_INFO_SEP ; 65 DEV_INFO_FLAGS; 66 #undef DEV_INFO_FLAG 67 #undef DEV_INFO_SEP 68 69 return 0; 70 } 71 72 static const char *get_pin_flag(struct drm_i915_gem_object *obj) 73 { 74 if (obj->user_pin_count > 0) 75 return "P"; 76 else if (obj->pin_count > 0) 77 return "p"; 78 else 79 return " "; 80 } 81 82 static const char *get_tiling_flag(struct drm_i915_gem_object *obj) 83 { 84 switch (obj->tiling_mode) { 85 default: 86 case I915_TILING_NONE: return " "; 87 case I915_TILING_X: return "X"; 88 case I915_TILING_Y: return "Y"; 89 } 90 } 91 92 static const char *cache_level_str(int type) 93 { 94 switch (type) { 95 case I915_CACHE_NONE: return " uncached"; 96 case I915_CACHE_LLC: return " snooped (LLC)"; 97 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)"; 98 default: return ""; 99 } 100 } 101 102 static void 103 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) 104 { 105 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s", 106 &obj->base, 107 get_pin_flag(obj), 108 get_tiling_flag(obj), 109 obj->base.size / 1024, 110 obj->base.read_domains, 111 obj->base.write_domain, 112 obj->last_read_seqno, 113 obj->last_write_seqno, 114 obj->last_fenced_seqno, 115 cache_level_str(obj->cache_level), 116 obj->dirty ? " dirty" : "", 117 obj->madv == I915_MADV_DONTNEED ? " purgeable" : ""); 118 if (obj->base.name) 119 seq_printf(m, " (name: %d)", obj->base.name); 120 if (obj->pin_count) 121 seq_printf(m, " (pinned x %d)", obj->pin_count); 122 if (obj->fence_reg != I915_FENCE_REG_NONE) 123 seq_printf(m, " (fence: %d)", obj->fence_reg); 124 if (obj->gtt_space != NULL) 125 seq_printf(m, " (gtt offset: %08x, size: %08x)", 126 obj->gtt_offset, (unsigned int)obj->gtt_space->size); 127 if (obj->pin_mappable || obj->fault_mappable) { 128 char s[3], *t = s; 129 if (obj->pin_mappable) 130 *t++ = 'p'; 131 if (obj->fault_mappable) 132 *t++ = 'f'; 133 *t = '\0'; 134 seq_printf(m, " (%s mappable)", s); 135 } 136 if (obj->ring != NULL) 137 seq_printf(m, " (%s)", obj->ring->name); 138 } 139 140 static int i915_gem_object_list_info(struct seq_file *m, void *data) 141 { 142 struct drm_info_node *node = (struct drm_info_node *) m->private; 143 uintptr_t list = (uintptr_t) node->info_ent->data; 144 struct list_head *head; 145 struct drm_device *dev = node->minor->dev; 146 drm_i915_private_t *dev_priv = dev->dev_private; 147 struct drm_i915_gem_object *obj; 148 size_t total_obj_size, total_gtt_size; 149 int count, ret; 150 151 ret = mutex_lock_interruptible(&dev->struct_mutex); 152 if (ret) 153 return ret; 154 155 switch (list) { 156 case ACTIVE_LIST: 157 seq_printf(m, "Active:\n"); 158 head = &dev_priv->mm.active_list; 159 break; 160 case INACTIVE_LIST: 161 seq_printf(m, "Inactive:\n"); 162 head = &dev_priv->mm.inactive_list; 163 break; 164 default: 165 mutex_unlock(&dev->struct_mutex); 166 return -EINVAL; 167 } 168 169 total_obj_size = total_gtt_size = count = 0; 170 list_for_each_entry(obj, head, mm_list) { 171 seq_printf(m, " "); 172 describe_obj(m, obj); 173 seq_printf(m, "\n"); 174 total_obj_size += obj->base.size; 175 total_gtt_size += obj->gtt_space->size; 176 count++; 177 } 178 mutex_unlock(&dev->struct_mutex); 179 180 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", 181 count, total_obj_size, total_gtt_size); 182 return 0; 183 } 184 185 #define count_objects(list, member) do { \ 186 list_for_each_entry(obj, list, member) { \ 187 size += obj->gtt_space->size; \ 188 ++count; \ 189 if (obj->map_and_fenceable) { \ 190 mappable_size += obj->gtt_space->size; \ 191 ++mappable_count; \ 192 } \ 193 } \ 194 } while (0) 195 196 static int i915_gem_object_info(struct seq_file *m, void* data) 197 { 198 struct drm_info_node *node = (struct drm_info_node *) m->private; 199 struct drm_device *dev = node->minor->dev; 200 struct drm_i915_private *dev_priv = dev->dev_private; 201 u32 count, mappable_count, purgeable_count; 202 size_t size, mappable_size, purgeable_size; 203 struct drm_i915_gem_object *obj; 204 int ret; 205 206 ret = mutex_lock_interruptible(&dev->struct_mutex); 207 if (ret) 208 return ret; 209 210 seq_printf(m, "%u objects, %zu bytes\n", 211 dev_priv->mm.object_count, 212 dev_priv->mm.object_memory); 213 214 size = count = mappable_size = mappable_count = 0; 215 count_objects(&dev_priv->mm.bound_list, gtt_list); 216 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n", 217 count, mappable_count, size, mappable_size); 218 219 size = count = mappable_size = mappable_count = 0; 220 count_objects(&dev_priv->mm.active_list, mm_list); 221 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n", 222 count, mappable_count, size, mappable_size); 223 224 size = count = mappable_size = mappable_count = 0; 225 count_objects(&dev_priv->mm.inactive_list, mm_list); 226 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n", 227 count, mappable_count, size, mappable_size); 228 229 size = count = purgeable_size = purgeable_count = 0; 230 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) { 231 size += obj->base.size, ++count; 232 if (obj->madv == I915_MADV_DONTNEED) 233 purgeable_size += obj->base.size, ++purgeable_count; 234 } 235 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size); 236 237 size = count = mappable_size = mappable_count = 0; 238 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) { 239 if (obj->fault_mappable) { 240 size += obj->gtt_space->size; 241 ++count; 242 } 243 if (obj->pin_mappable) { 244 mappable_size += obj->gtt_space->size; 245 ++mappable_count; 246 } 247 if (obj->madv == I915_MADV_DONTNEED) { 248 purgeable_size += obj->base.size; 249 ++purgeable_count; 250 } 251 } 252 seq_printf(m, "%u purgeable objects, %zu bytes\n", 253 purgeable_count, purgeable_size); 254 seq_printf(m, "%u pinned mappable objects, %zu bytes\n", 255 mappable_count, mappable_size); 256 seq_printf(m, "%u fault mappable objects, %zu bytes\n", 257 count, size); 258 259 seq_printf(m, "%zu [%zu] gtt total\n", 260 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total); 261 262 mutex_unlock(&dev->struct_mutex); 263 264 return 0; 265 } 266 267 static int i915_gem_gtt_info(struct seq_file *m, void* data) 268 { 269 struct drm_info_node *node = (struct drm_info_node *) m->private; 270 struct drm_device *dev = node->minor->dev; 271 uintptr_t list = (uintptr_t) node->info_ent->data; 272 struct drm_i915_private *dev_priv = dev->dev_private; 273 struct drm_i915_gem_object *obj; 274 size_t total_obj_size, total_gtt_size; 275 int count, ret; 276 277 ret = mutex_lock_interruptible(&dev->struct_mutex); 278 if (ret) 279 return ret; 280 281 total_obj_size = total_gtt_size = count = 0; 282 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) { 283 if (list == PINNED_LIST && obj->pin_count == 0) 284 continue; 285 286 seq_printf(m, " "); 287 describe_obj(m, obj); 288 seq_printf(m, "\n"); 289 total_obj_size += obj->base.size; 290 total_gtt_size += obj->gtt_space->size; 291 count++; 292 } 293 294 mutex_unlock(&dev->struct_mutex); 295 296 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n", 297 count, total_obj_size, total_gtt_size); 298 299 return 0; 300 } 301 302 static int i915_gem_pageflip_info(struct seq_file *m, void *data) 303 { 304 struct drm_info_node *node = (struct drm_info_node *) m->private; 305 struct drm_device *dev = node->minor->dev; 306 unsigned long flags; 307 struct intel_crtc *crtc; 308 309 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) { 310 const char pipe = pipe_name(crtc->pipe); 311 const char plane = plane_name(crtc->plane); 312 struct intel_unpin_work *work; 313 314 spin_lock_irqsave(&dev->event_lock, flags); 315 work = crtc->unpin_work; 316 if (work == NULL) { 317 seq_printf(m, "No flip due on pipe %c (plane %c)\n", 318 pipe, plane); 319 } else { 320 if (!work->pending) { 321 seq_printf(m, "Flip queued on pipe %c (plane %c)\n", 322 pipe, plane); 323 } else { 324 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n", 325 pipe, plane); 326 } 327 if (work->enable_stall_check) 328 seq_printf(m, "Stall check enabled, "); 329 else 330 seq_printf(m, "Stall check waiting for page flip ioctl, "); 331 seq_printf(m, "%d prepares\n", work->pending); 332 333 if (work->old_fb_obj) { 334 struct drm_i915_gem_object *obj = work->old_fb_obj; 335 if (obj) 336 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); 337 } 338 if (work->pending_flip_obj) { 339 struct drm_i915_gem_object *obj = work->pending_flip_obj; 340 if (obj) 341 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset); 342 } 343 } 344 spin_unlock_irqrestore(&dev->event_lock, flags); 345 } 346 347 return 0; 348 } 349 350 static int i915_gem_request_info(struct seq_file *m, void *data) 351 { 352 struct drm_info_node *node = (struct drm_info_node *) m->private; 353 struct drm_device *dev = node->minor->dev; 354 drm_i915_private_t *dev_priv = dev->dev_private; 355 struct intel_ring_buffer *ring; 356 struct drm_i915_gem_request *gem_request; 357 int ret, count, i; 358 359 ret = mutex_lock_interruptible(&dev->struct_mutex); 360 if (ret) 361 return ret; 362 363 count = 0; 364 for_each_ring(ring, dev_priv, i) { 365 if (list_empty(&ring->request_list)) 366 continue; 367 368 seq_printf(m, "%s requests:\n", ring->name); 369 list_for_each_entry(gem_request, 370 &ring->request_list, 371 list) { 372 seq_printf(m, " %d @ %d\n", 373 gem_request->seqno, 374 (int) (jiffies - gem_request->emitted_jiffies)); 375 } 376 count++; 377 } 378 mutex_unlock(&dev->struct_mutex); 379 380 if (count == 0) 381 seq_printf(m, "No requests\n"); 382 383 return 0; 384 } 385 386 static void i915_ring_seqno_info(struct seq_file *m, 387 struct intel_ring_buffer *ring) 388 { 389 if (ring->get_seqno) { 390 seq_printf(m, "Current sequence (%s): %d\n", 391 ring->name, ring->get_seqno(ring, false)); 392 } 393 } 394 395 static int i915_gem_seqno_info(struct seq_file *m, void *data) 396 { 397 struct drm_info_node *node = (struct drm_info_node *) m->private; 398 struct drm_device *dev = node->minor->dev; 399 drm_i915_private_t *dev_priv = dev->dev_private; 400 struct intel_ring_buffer *ring; 401 int ret, i; 402 403 ret = mutex_lock_interruptible(&dev->struct_mutex); 404 if (ret) 405 return ret; 406 407 for_each_ring(ring, dev_priv, i) 408 i915_ring_seqno_info(m, ring); 409 410 mutex_unlock(&dev->struct_mutex); 411 412 return 0; 413 } 414 415 416 static int i915_interrupt_info(struct seq_file *m, void *data) 417 { 418 struct drm_info_node *node = (struct drm_info_node *) m->private; 419 struct drm_device *dev = node->minor->dev; 420 drm_i915_private_t *dev_priv = dev->dev_private; 421 struct intel_ring_buffer *ring; 422 int ret, i, pipe; 423 424 ret = mutex_lock_interruptible(&dev->struct_mutex); 425 if (ret) 426 return ret; 427 428 if (IS_VALLEYVIEW(dev)) { 429 seq_printf(m, "Display IER:\t%08x\n", 430 I915_READ(VLV_IER)); 431 seq_printf(m, "Display IIR:\t%08x\n", 432 I915_READ(VLV_IIR)); 433 seq_printf(m, "Display IIR_RW:\t%08x\n", 434 I915_READ(VLV_IIR_RW)); 435 seq_printf(m, "Display IMR:\t%08x\n", 436 I915_READ(VLV_IMR)); 437 for_each_pipe(pipe) 438 seq_printf(m, "Pipe %c stat:\t%08x\n", 439 pipe_name(pipe), 440 I915_READ(PIPESTAT(pipe))); 441 442 seq_printf(m, "Master IER:\t%08x\n", 443 I915_READ(VLV_MASTER_IER)); 444 445 seq_printf(m, "Render IER:\t%08x\n", 446 I915_READ(GTIER)); 447 seq_printf(m, "Render IIR:\t%08x\n", 448 I915_READ(GTIIR)); 449 seq_printf(m, "Render IMR:\t%08x\n", 450 I915_READ(GTIMR)); 451 452 seq_printf(m, "PM IER:\t\t%08x\n", 453 I915_READ(GEN6_PMIER)); 454 seq_printf(m, "PM IIR:\t\t%08x\n", 455 I915_READ(GEN6_PMIIR)); 456 seq_printf(m, "PM IMR:\t\t%08x\n", 457 I915_READ(GEN6_PMIMR)); 458 459 seq_printf(m, "Port hotplug:\t%08x\n", 460 I915_READ(PORT_HOTPLUG_EN)); 461 seq_printf(m, "DPFLIPSTAT:\t%08x\n", 462 I915_READ(VLV_DPFLIPSTAT)); 463 seq_printf(m, "DPINVGTT:\t%08x\n", 464 I915_READ(DPINVGTT)); 465 466 } else if (!HAS_PCH_SPLIT(dev)) { 467 seq_printf(m, "Interrupt enable: %08x\n", 468 I915_READ(IER)); 469 seq_printf(m, "Interrupt identity: %08x\n", 470 I915_READ(IIR)); 471 seq_printf(m, "Interrupt mask: %08x\n", 472 I915_READ(IMR)); 473 for_each_pipe(pipe) 474 seq_printf(m, "Pipe %c stat: %08x\n", 475 pipe_name(pipe), 476 I915_READ(PIPESTAT(pipe))); 477 } else { 478 seq_printf(m, "North Display Interrupt enable: %08x\n", 479 I915_READ(DEIER)); 480 seq_printf(m, "North Display Interrupt identity: %08x\n", 481 I915_READ(DEIIR)); 482 seq_printf(m, "North Display Interrupt mask: %08x\n", 483 I915_READ(DEIMR)); 484 seq_printf(m, "South Display Interrupt enable: %08x\n", 485 I915_READ(SDEIER)); 486 seq_printf(m, "South Display Interrupt identity: %08x\n", 487 I915_READ(SDEIIR)); 488 seq_printf(m, "South Display Interrupt mask: %08x\n", 489 I915_READ(SDEIMR)); 490 seq_printf(m, "Graphics Interrupt enable: %08x\n", 491 I915_READ(GTIER)); 492 seq_printf(m, "Graphics Interrupt identity: %08x\n", 493 I915_READ(GTIIR)); 494 seq_printf(m, "Graphics Interrupt mask: %08x\n", 495 I915_READ(GTIMR)); 496 } 497 seq_printf(m, "Interrupts received: %d\n", 498 atomic_read(&dev_priv->irq_received)); 499 for_each_ring(ring, dev_priv, i) { 500 if (IS_GEN6(dev) || IS_GEN7(dev)) { 501 seq_printf(m, 502 "Graphics Interrupt mask (%s): %08x\n", 503 ring->name, I915_READ_IMR(ring)); 504 } 505 i915_ring_seqno_info(m, ring); 506 } 507 mutex_unlock(&dev->struct_mutex); 508 509 return 0; 510 } 511 512 static int i915_gem_fence_regs_info(struct seq_file *m, void *data) 513 { 514 struct drm_info_node *node = (struct drm_info_node *) m->private; 515 struct drm_device *dev = node->minor->dev; 516 drm_i915_private_t *dev_priv = dev->dev_private; 517 int i, ret; 518 519 ret = mutex_lock_interruptible(&dev->struct_mutex); 520 if (ret) 521 return ret; 522 523 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start); 524 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); 525 for (i = 0; i < dev_priv->num_fence_regs; i++) { 526 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj; 527 528 seq_printf(m, "Fence %d, pin count = %d, object = ", 529 i, dev_priv->fence_regs[i].pin_count); 530 if (obj == NULL) 531 seq_printf(m, "unused"); 532 else 533 describe_obj(m, obj); 534 seq_printf(m, "\n"); 535 } 536 537 mutex_unlock(&dev->struct_mutex); 538 return 0; 539 } 540 541 static int i915_hws_info(struct seq_file *m, void *data) 542 { 543 struct drm_info_node *node = (struct drm_info_node *) m->private; 544 struct drm_device *dev = node->minor->dev; 545 drm_i915_private_t *dev_priv = dev->dev_private; 546 struct intel_ring_buffer *ring; 547 const volatile u32 __iomem *hws; 548 int i; 549 550 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data]; 551 hws = (volatile u32 __iomem *)ring->status_page.page_addr; 552 if (hws == NULL) 553 return 0; 554 555 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) { 556 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", 557 i * 4, 558 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]); 559 } 560 return 0; 561 } 562 563 static const char *ring_str(int ring) 564 { 565 switch (ring) { 566 case RCS: return "render"; 567 case VCS: return "bsd"; 568 case BCS: return "blt"; 569 default: return ""; 570 } 571 } 572 573 static const char *pin_flag(int pinned) 574 { 575 if (pinned > 0) 576 return " P"; 577 else if (pinned < 0) 578 return " p"; 579 else 580 return ""; 581 } 582 583 static const char *tiling_flag(int tiling) 584 { 585 switch (tiling) { 586 default: 587 case I915_TILING_NONE: return ""; 588 case I915_TILING_X: return " X"; 589 case I915_TILING_Y: return " Y"; 590 } 591 } 592 593 static const char *dirty_flag(int dirty) 594 { 595 return dirty ? " dirty" : ""; 596 } 597 598 static const char *purgeable_flag(int purgeable) 599 { 600 return purgeable ? " purgeable" : ""; 601 } 602 603 static void print_error_buffers(struct seq_file *m, 604 const char *name, 605 struct drm_i915_error_buffer *err, 606 int count) 607 { 608 seq_printf(m, "%s [%d]:\n", name, count); 609 610 while (count--) { 611 seq_printf(m, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s", 612 err->gtt_offset, 613 err->size, 614 err->read_domains, 615 err->write_domain, 616 err->rseqno, err->wseqno, 617 pin_flag(err->pinned), 618 tiling_flag(err->tiling), 619 dirty_flag(err->dirty), 620 purgeable_flag(err->purgeable), 621 err->ring != -1 ? " " : "", 622 ring_str(err->ring), 623 cache_level_str(err->cache_level)); 624 625 if (err->name) 626 seq_printf(m, " (name: %d)", err->name); 627 if (err->fence_reg != I915_FENCE_REG_NONE) 628 seq_printf(m, " (fence: %d)", err->fence_reg); 629 630 seq_printf(m, "\n"); 631 err++; 632 } 633 } 634 635 static void i915_ring_error_state(struct seq_file *m, 636 struct drm_device *dev, 637 struct drm_i915_error_state *error, 638 unsigned ring) 639 { 640 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */ 641 seq_printf(m, "%s command stream:\n", ring_str(ring)); 642 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); 643 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); 644 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); 645 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); 646 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); 647 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]); 648 if (ring == RCS && INTEL_INFO(dev)->gen >= 4) 649 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr); 650 651 if (INTEL_INFO(dev)->gen >= 4) 652 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]); 653 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]); 654 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]); 655 if (INTEL_INFO(dev)->gen >= 6) { 656 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]); 657 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]); 658 seq_printf(m, " SYNC_0: 0x%08x\n", 659 error->semaphore_mboxes[ring][0]); 660 seq_printf(m, " SYNC_1: 0x%08x\n", 661 error->semaphore_mboxes[ring][1]); 662 } 663 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]); 664 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring])); 665 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]); 666 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]); 667 } 668 669 struct i915_error_state_file_priv { 670 struct drm_device *dev; 671 struct drm_i915_error_state *error; 672 }; 673 674 static int i915_error_state(struct seq_file *m, void *unused) 675 { 676 struct i915_error_state_file_priv *error_priv = m->private; 677 struct drm_device *dev = error_priv->dev; 678 drm_i915_private_t *dev_priv = dev->dev_private; 679 struct drm_i915_error_state *error = error_priv->error; 680 struct intel_ring_buffer *ring; 681 int i, j, page, offset, elt; 682 683 if (!error) { 684 seq_printf(m, "no error state collected\n"); 685 return 0; 686 } 687 688 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, 689 error->time.tv_usec); 690 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); 691 seq_printf(m, "EIR: 0x%08x\n", error->eir); 692 seq_printf(m, "IER: 0x%08x\n", error->ier); 693 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); 694 seq_printf(m, "CCID: 0x%08x\n", error->ccid); 695 696 for (i = 0; i < dev_priv->num_fence_regs; i++) 697 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); 698 699 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++) 700 seq_printf(m, " INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]); 701 702 if (INTEL_INFO(dev)->gen >= 6) { 703 seq_printf(m, "ERROR: 0x%08x\n", error->error); 704 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg); 705 } 706 707 if (INTEL_INFO(dev)->gen == 7) 708 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int); 709 710 for_each_ring(ring, dev_priv, i) 711 i915_ring_error_state(m, dev, error, i); 712 713 if (error->active_bo) 714 print_error_buffers(m, "Active", 715 error->active_bo, 716 error->active_bo_count); 717 718 if (error->pinned_bo) 719 print_error_buffers(m, "Pinned", 720 error->pinned_bo, 721 error->pinned_bo_count); 722 723 for (i = 0; i < ARRAY_SIZE(error->ring); i++) { 724 struct drm_i915_error_object *obj; 725 726 if ((obj = error->ring[i].batchbuffer)) { 727 seq_printf(m, "%s --- gtt_offset = 0x%08x\n", 728 dev_priv->ring[i].name, 729 obj->gtt_offset); 730 offset = 0; 731 for (page = 0; page < obj->page_count; page++) { 732 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 733 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]); 734 offset += 4; 735 } 736 } 737 } 738 739 if (error->ring[i].num_requests) { 740 seq_printf(m, "%s --- %d requests\n", 741 dev_priv->ring[i].name, 742 error->ring[i].num_requests); 743 for (j = 0; j < error->ring[i].num_requests; j++) { 744 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n", 745 error->ring[i].requests[j].seqno, 746 error->ring[i].requests[j].jiffies, 747 error->ring[i].requests[j].tail); 748 } 749 } 750 751 if ((obj = error->ring[i].ringbuffer)) { 752 seq_printf(m, "%s --- ringbuffer = 0x%08x\n", 753 dev_priv->ring[i].name, 754 obj->gtt_offset); 755 offset = 0; 756 for (page = 0; page < obj->page_count; page++) { 757 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 758 seq_printf(m, "%08x : %08x\n", 759 offset, 760 obj->pages[page][elt]); 761 offset += 4; 762 } 763 } 764 } 765 } 766 767 if (error->overlay) 768 intel_overlay_print_error_state(m, error->overlay); 769 770 if (error->display) 771 intel_display_print_error_state(m, dev, error->display); 772 773 return 0; 774 } 775 776 static ssize_t 777 i915_error_state_write(struct file *filp, 778 const char __user *ubuf, 779 size_t cnt, 780 loff_t *ppos) 781 { 782 struct seq_file *m = filp->private_data; 783 struct i915_error_state_file_priv *error_priv = m->private; 784 struct drm_device *dev = error_priv->dev; 785 int ret; 786 787 DRM_DEBUG_DRIVER("Resetting error state\n"); 788 789 ret = mutex_lock_interruptible(&dev->struct_mutex); 790 if (ret) 791 return ret; 792 793 i915_destroy_error_state(dev); 794 mutex_unlock(&dev->struct_mutex); 795 796 return cnt; 797 } 798 799 static int i915_error_state_open(struct inode *inode, struct file *file) 800 { 801 struct drm_device *dev = inode->i_private; 802 drm_i915_private_t *dev_priv = dev->dev_private; 803 struct i915_error_state_file_priv *error_priv; 804 unsigned long flags; 805 806 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL); 807 if (!error_priv) 808 return -ENOMEM; 809 810 error_priv->dev = dev; 811 812 spin_lock_irqsave(&dev_priv->error_lock, flags); 813 error_priv->error = dev_priv->first_error; 814 if (error_priv->error) 815 kref_get(&error_priv->error->ref); 816 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 817 818 return single_open(file, i915_error_state, error_priv); 819 } 820 821 static int i915_error_state_release(struct inode *inode, struct file *file) 822 { 823 struct seq_file *m = file->private_data; 824 struct i915_error_state_file_priv *error_priv = m->private; 825 826 if (error_priv->error) 827 kref_put(&error_priv->error->ref, i915_error_state_free); 828 kfree(error_priv); 829 830 return single_release(inode, file); 831 } 832 833 static const struct file_operations i915_error_state_fops = { 834 .owner = THIS_MODULE, 835 .open = i915_error_state_open, 836 .read = seq_read, 837 .write = i915_error_state_write, 838 .llseek = default_llseek, 839 .release = i915_error_state_release, 840 }; 841 842 static int i915_rstdby_delays(struct seq_file *m, void *unused) 843 { 844 struct drm_info_node *node = (struct drm_info_node *) m->private; 845 struct drm_device *dev = node->minor->dev; 846 drm_i915_private_t *dev_priv = dev->dev_private; 847 u16 crstanddelay; 848 int ret; 849 850 ret = mutex_lock_interruptible(&dev->struct_mutex); 851 if (ret) 852 return ret; 853 854 crstanddelay = I915_READ16(CRSTANDVID); 855 856 mutex_unlock(&dev->struct_mutex); 857 858 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f)); 859 860 return 0; 861 } 862 863 static int i915_cur_delayinfo(struct seq_file *m, void *unused) 864 { 865 struct drm_info_node *node = (struct drm_info_node *) m->private; 866 struct drm_device *dev = node->minor->dev; 867 drm_i915_private_t *dev_priv = dev->dev_private; 868 int ret; 869 870 if (IS_GEN5(dev)) { 871 u16 rgvswctl = I915_READ16(MEMSWCTL); 872 u16 rgvstat = I915_READ16(MEMSTAT_ILK); 873 874 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); 875 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f); 876 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> 877 MEMSTAT_VID_SHIFT); 878 seq_printf(m, "Current P-state: %d\n", 879 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT); 880 } else if (IS_GEN6(dev) || IS_GEN7(dev)) { 881 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS); 882 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS); 883 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP); 884 u32 rpstat; 885 u32 rpupei, rpcurup, rpprevup; 886 u32 rpdownei, rpcurdown, rpprevdown; 887 int max_freq; 888 889 /* RPSTAT1 is in the GT power well */ 890 ret = mutex_lock_interruptible(&dev->struct_mutex); 891 if (ret) 892 return ret; 893 894 gen6_gt_force_wake_get(dev_priv); 895 896 rpstat = I915_READ(GEN6_RPSTAT1); 897 rpupei = I915_READ(GEN6_RP_CUR_UP_EI); 898 rpcurup = I915_READ(GEN6_RP_CUR_UP); 899 rpprevup = I915_READ(GEN6_RP_PREV_UP); 900 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI); 901 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN); 902 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN); 903 904 gen6_gt_force_wake_put(dev_priv); 905 mutex_unlock(&dev->struct_mutex); 906 907 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); 908 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); 909 seq_printf(m, "Render p-state ratio: %d\n", 910 (gt_perf_status & 0xff00) >> 8); 911 seq_printf(m, "Render p-state VID: %d\n", 912 gt_perf_status & 0xff); 913 seq_printf(m, "Render p-state limit: %d\n", 914 rp_state_limits & 0xff); 915 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >> 916 GEN6_CAGF_SHIFT) * GT_FREQUENCY_MULTIPLIER); 917 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei & 918 GEN6_CURICONT_MASK); 919 seq_printf(m, "RP CUR UP: %dus\n", rpcurup & 920 GEN6_CURBSYTAVG_MASK); 921 seq_printf(m, "RP PREV UP: %dus\n", rpprevup & 922 GEN6_CURBSYTAVG_MASK); 923 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei & 924 GEN6_CURIAVG_MASK); 925 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown & 926 GEN6_CURBSYTAVG_MASK); 927 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown & 928 GEN6_CURBSYTAVG_MASK); 929 930 max_freq = (rp_state_cap & 0xff0000) >> 16; 931 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n", 932 max_freq * GT_FREQUENCY_MULTIPLIER); 933 934 max_freq = (rp_state_cap & 0xff00) >> 8; 935 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n", 936 max_freq * GT_FREQUENCY_MULTIPLIER); 937 938 max_freq = rp_state_cap & 0xff; 939 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", 940 max_freq * GT_FREQUENCY_MULTIPLIER); 941 } else { 942 seq_printf(m, "no P-state info available\n"); 943 } 944 945 return 0; 946 } 947 948 static int i915_delayfreq_table(struct seq_file *m, void *unused) 949 { 950 struct drm_info_node *node = (struct drm_info_node *) m->private; 951 struct drm_device *dev = node->minor->dev; 952 drm_i915_private_t *dev_priv = dev->dev_private; 953 u32 delayfreq; 954 int ret, i; 955 956 ret = mutex_lock_interruptible(&dev->struct_mutex); 957 if (ret) 958 return ret; 959 960 for (i = 0; i < 16; i++) { 961 delayfreq = I915_READ(PXVFREQ_BASE + i * 4); 962 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq, 963 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT); 964 } 965 966 mutex_unlock(&dev->struct_mutex); 967 968 return 0; 969 } 970 971 static inline int MAP_TO_MV(int map) 972 { 973 return 1250 - (map * 25); 974 } 975 976 static int i915_inttoext_table(struct seq_file *m, void *unused) 977 { 978 struct drm_info_node *node = (struct drm_info_node *) m->private; 979 struct drm_device *dev = node->minor->dev; 980 drm_i915_private_t *dev_priv = dev->dev_private; 981 u32 inttoext; 982 int ret, i; 983 984 ret = mutex_lock_interruptible(&dev->struct_mutex); 985 if (ret) 986 return ret; 987 988 for (i = 1; i <= 32; i++) { 989 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4); 990 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext); 991 } 992 993 mutex_unlock(&dev->struct_mutex); 994 995 return 0; 996 } 997 998 static int ironlake_drpc_info(struct seq_file *m) 999 { 1000 struct drm_info_node *node = (struct drm_info_node *) m->private; 1001 struct drm_device *dev = node->minor->dev; 1002 drm_i915_private_t *dev_priv = dev->dev_private; 1003 u32 rgvmodectl, rstdbyctl; 1004 u16 crstandvid; 1005 int ret; 1006 1007 ret = mutex_lock_interruptible(&dev->struct_mutex); 1008 if (ret) 1009 return ret; 1010 1011 rgvmodectl = I915_READ(MEMMODECTL); 1012 rstdbyctl = I915_READ(RSTDBYCTL); 1013 crstandvid = I915_READ16(CRSTANDVID); 1014 1015 mutex_unlock(&dev->struct_mutex); 1016 1017 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ? 1018 "yes" : "no"); 1019 seq_printf(m, "Boost freq: %d\n", 1020 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >> 1021 MEMMODE_BOOST_FREQ_SHIFT); 1022 seq_printf(m, "HW control enabled: %s\n", 1023 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no"); 1024 seq_printf(m, "SW control enabled: %s\n", 1025 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no"); 1026 seq_printf(m, "Gated voltage change: %s\n", 1027 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no"); 1028 seq_printf(m, "Starting frequency: P%d\n", 1029 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT); 1030 seq_printf(m, "Max P-state: P%d\n", 1031 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT); 1032 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); 1033 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); 1034 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); 1035 seq_printf(m, "Render standby enabled: %s\n", 1036 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes"); 1037 seq_printf(m, "Current RS state: "); 1038 switch (rstdbyctl & RSX_STATUS_MASK) { 1039 case RSX_STATUS_ON: 1040 seq_printf(m, "on\n"); 1041 break; 1042 case RSX_STATUS_RC1: 1043 seq_printf(m, "RC1\n"); 1044 break; 1045 case RSX_STATUS_RC1E: 1046 seq_printf(m, "RC1E\n"); 1047 break; 1048 case RSX_STATUS_RS1: 1049 seq_printf(m, "RS1\n"); 1050 break; 1051 case RSX_STATUS_RS2: 1052 seq_printf(m, "RS2 (RC6)\n"); 1053 break; 1054 case RSX_STATUS_RS3: 1055 seq_printf(m, "RC3 (RC6+)\n"); 1056 break; 1057 default: 1058 seq_printf(m, "unknown\n"); 1059 break; 1060 } 1061 1062 return 0; 1063 } 1064 1065 static int gen6_drpc_info(struct seq_file *m) 1066 { 1067 1068 struct drm_info_node *node = (struct drm_info_node *) m->private; 1069 struct drm_device *dev = node->minor->dev; 1070 struct drm_i915_private *dev_priv = dev->dev_private; 1071 u32 rpmodectl1, gt_core_status, rcctl1; 1072 unsigned forcewake_count; 1073 int count=0, ret; 1074 1075 1076 ret = mutex_lock_interruptible(&dev->struct_mutex); 1077 if (ret) 1078 return ret; 1079 1080 spin_lock_irq(&dev_priv->gt_lock); 1081 forcewake_count = dev_priv->forcewake_count; 1082 spin_unlock_irq(&dev_priv->gt_lock); 1083 1084 if (forcewake_count) { 1085 seq_printf(m, "RC information inaccurate because somebody " 1086 "holds a forcewake reference \n"); 1087 } else { 1088 /* NB: we cannot use forcewake, else we read the wrong values */ 1089 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1)) 1090 udelay(10); 1091 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51)); 1092 } 1093 1094 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS); 1095 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4); 1096 1097 rpmodectl1 = I915_READ(GEN6_RP_CONTROL); 1098 rcctl1 = I915_READ(GEN6_RC_CONTROL); 1099 mutex_unlock(&dev->struct_mutex); 1100 1101 seq_printf(m, "Video Turbo Mode: %s\n", 1102 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO)); 1103 seq_printf(m, "HW control enabled: %s\n", 1104 yesno(rpmodectl1 & GEN6_RP_ENABLE)); 1105 seq_printf(m, "SW control enabled: %s\n", 1106 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) == 1107 GEN6_RP_MEDIA_SW_MODE)); 1108 seq_printf(m, "RC1e Enabled: %s\n", 1109 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE)); 1110 seq_printf(m, "RC6 Enabled: %s\n", 1111 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE)); 1112 seq_printf(m, "Deep RC6 Enabled: %s\n", 1113 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE)); 1114 seq_printf(m, "Deepest RC6 Enabled: %s\n", 1115 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE)); 1116 seq_printf(m, "Current RC state: "); 1117 switch (gt_core_status & GEN6_RCn_MASK) { 1118 case GEN6_RC0: 1119 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK) 1120 seq_printf(m, "Core Power Down\n"); 1121 else 1122 seq_printf(m, "on\n"); 1123 break; 1124 case GEN6_RC3: 1125 seq_printf(m, "RC3\n"); 1126 break; 1127 case GEN6_RC6: 1128 seq_printf(m, "RC6\n"); 1129 break; 1130 case GEN6_RC7: 1131 seq_printf(m, "RC7\n"); 1132 break; 1133 default: 1134 seq_printf(m, "Unknown\n"); 1135 break; 1136 } 1137 1138 seq_printf(m, "Core Power Down: %s\n", 1139 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK)); 1140 1141 /* Not exactly sure what this is */ 1142 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n", 1143 I915_READ(GEN6_GT_GFX_RC6_LOCKED)); 1144 seq_printf(m, "RC6 residency since boot: %u\n", 1145 I915_READ(GEN6_GT_GFX_RC6)); 1146 seq_printf(m, "RC6+ residency since boot: %u\n", 1147 I915_READ(GEN6_GT_GFX_RC6p)); 1148 seq_printf(m, "RC6++ residency since boot: %u\n", 1149 I915_READ(GEN6_GT_GFX_RC6pp)); 1150 1151 return 0; 1152 } 1153 1154 static int i915_drpc_info(struct seq_file *m, void *unused) 1155 { 1156 struct drm_info_node *node = (struct drm_info_node *) m->private; 1157 struct drm_device *dev = node->minor->dev; 1158 1159 if (IS_GEN6(dev) || IS_GEN7(dev)) 1160 return gen6_drpc_info(m); 1161 else 1162 return ironlake_drpc_info(m); 1163 } 1164 1165 static int i915_fbc_status(struct seq_file *m, void *unused) 1166 { 1167 struct drm_info_node *node = (struct drm_info_node *) m->private; 1168 struct drm_device *dev = node->minor->dev; 1169 drm_i915_private_t *dev_priv = dev->dev_private; 1170 1171 if (!I915_HAS_FBC(dev)) { 1172 seq_printf(m, "FBC unsupported on this chipset\n"); 1173 return 0; 1174 } 1175 1176 if (intel_fbc_enabled(dev)) { 1177 seq_printf(m, "FBC enabled\n"); 1178 } else { 1179 seq_printf(m, "FBC disabled: "); 1180 switch (dev_priv->no_fbc_reason) { 1181 case FBC_NO_OUTPUT: 1182 seq_printf(m, "no outputs"); 1183 break; 1184 case FBC_STOLEN_TOO_SMALL: 1185 seq_printf(m, "not enough stolen memory"); 1186 break; 1187 case FBC_UNSUPPORTED_MODE: 1188 seq_printf(m, "mode not supported"); 1189 break; 1190 case FBC_MODE_TOO_LARGE: 1191 seq_printf(m, "mode too large"); 1192 break; 1193 case FBC_BAD_PLANE: 1194 seq_printf(m, "FBC unsupported on plane"); 1195 break; 1196 case FBC_NOT_TILED: 1197 seq_printf(m, "scanout buffer not tiled"); 1198 break; 1199 case FBC_MULTIPLE_PIPES: 1200 seq_printf(m, "multiple pipes are enabled"); 1201 break; 1202 case FBC_MODULE_PARAM: 1203 seq_printf(m, "disabled per module param (default off)"); 1204 break; 1205 default: 1206 seq_printf(m, "unknown reason"); 1207 } 1208 seq_printf(m, "\n"); 1209 } 1210 return 0; 1211 } 1212 1213 static int i915_sr_status(struct seq_file *m, void *unused) 1214 { 1215 struct drm_info_node *node = (struct drm_info_node *) m->private; 1216 struct drm_device *dev = node->minor->dev; 1217 drm_i915_private_t *dev_priv = dev->dev_private; 1218 bool sr_enabled = false; 1219 1220 if (HAS_PCH_SPLIT(dev)) 1221 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN; 1222 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev)) 1223 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; 1224 else if (IS_I915GM(dev)) 1225 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; 1226 else if (IS_PINEVIEW(dev)) 1227 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 1228 1229 seq_printf(m, "self-refresh: %s\n", 1230 sr_enabled ? "enabled" : "disabled"); 1231 1232 return 0; 1233 } 1234 1235 static int i915_emon_status(struct seq_file *m, void *unused) 1236 { 1237 struct drm_info_node *node = (struct drm_info_node *) m->private; 1238 struct drm_device *dev = node->minor->dev; 1239 drm_i915_private_t *dev_priv = dev->dev_private; 1240 unsigned long temp, chipset, gfx; 1241 int ret; 1242 1243 if (!IS_GEN5(dev)) 1244 return -ENODEV; 1245 1246 ret = mutex_lock_interruptible(&dev->struct_mutex); 1247 if (ret) 1248 return ret; 1249 1250 temp = i915_mch_val(dev_priv); 1251 chipset = i915_chipset_val(dev_priv); 1252 gfx = i915_gfx_val(dev_priv); 1253 mutex_unlock(&dev->struct_mutex); 1254 1255 seq_printf(m, "GMCH temp: %ld\n", temp); 1256 seq_printf(m, "Chipset power: %ld\n", chipset); 1257 seq_printf(m, "GFX power: %ld\n", gfx); 1258 seq_printf(m, "Total power: %ld\n", chipset + gfx); 1259 1260 return 0; 1261 } 1262 1263 static int i915_ring_freq_table(struct seq_file *m, void *unused) 1264 { 1265 struct drm_info_node *node = (struct drm_info_node *) m->private; 1266 struct drm_device *dev = node->minor->dev; 1267 drm_i915_private_t *dev_priv = dev->dev_private; 1268 int ret; 1269 int gpu_freq, ia_freq; 1270 1271 if (!(IS_GEN6(dev) || IS_GEN7(dev))) { 1272 seq_printf(m, "unsupported on this chipset\n"); 1273 return 0; 1274 } 1275 1276 ret = mutex_lock_interruptible(&dev->struct_mutex); 1277 if (ret) 1278 return ret; 1279 1280 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n"); 1281 1282 for (gpu_freq = dev_priv->rps.min_delay; 1283 gpu_freq <= dev_priv->rps.max_delay; 1284 gpu_freq++) { 1285 I915_WRITE(GEN6_PCODE_DATA, gpu_freq); 1286 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY | 1287 GEN6_PCODE_READ_MIN_FREQ_TABLE); 1288 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) & 1289 GEN6_PCODE_READY) == 0, 10)) { 1290 DRM_ERROR("pcode read of freq table timed out\n"); 1291 continue; 1292 } 1293 ia_freq = I915_READ(GEN6_PCODE_DATA); 1294 seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100); 1295 } 1296 1297 mutex_unlock(&dev->struct_mutex); 1298 1299 return 0; 1300 } 1301 1302 static int i915_gfxec(struct seq_file *m, void *unused) 1303 { 1304 struct drm_info_node *node = (struct drm_info_node *) m->private; 1305 struct drm_device *dev = node->minor->dev; 1306 drm_i915_private_t *dev_priv = dev->dev_private; 1307 int ret; 1308 1309 ret = mutex_lock_interruptible(&dev->struct_mutex); 1310 if (ret) 1311 return ret; 1312 1313 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4)); 1314 1315 mutex_unlock(&dev->struct_mutex); 1316 1317 return 0; 1318 } 1319 1320 static int i915_opregion(struct seq_file *m, void *unused) 1321 { 1322 struct drm_info_node *node = (struct drm_info_node *) m->private; 1323 struct drm_device *dev = node->minor->dev; 1324 drm_i915_private_t *dev_priv = dev->dev_private; 1325 struct intel_opregion *opregion = &dev_priv->opregion; 1326 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL); 1327 int ret; 1328 1329 if (data == NULL) 1330 return -ENOMEM; 1331 1332 ret = mutex_lock_interruptible(&dev->struct_mutex); 1333 if (ret) 1334 goto out; 1335 1336 if (opregion->header) { 1337 memcpy_fromio(data, opregion->header, OPREGION_SIZE); 1338 seq_write(m, data, OPREGION_SIZE); 1339 } 1340 1341 mutex_unlock(&dev->struct_mutex); 1342 1343 out: 1344 kfree(data); 1345 return 0; 1346 } 1347 1348 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 1349 { 1350 struct drm_info_node *node = (struct drm_info_node *) m->private; 1351 struct drm_device *dev = node->minor->dev; 1352 drm_i915_private_t *dev_priv = dev->dev_private; 1353 struct intel_fbdev *ifbdev; 1354 struct intel_framebuffer *fb; 1355 int ret; 1356 1357 ret = mutex_lock_interruptible(&dev->mode_config.mutex); 1358 if (ret) 1359 return ret; 1360 1361 ifbdev = dev_priv->fbdev; 1362 fb = to_intel_framebuffer(ifbdev->helper.fb); 1363 1364 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ", 1365 fb->base.width, 1366 fb->base.height, 1367 fb->base.depth, 1368 fb->base.bits_per_pixel); 1369 describe_obj(m, fb->obj); 1370 seq_printf(m, "\n"); 1371 1372 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) { 1373 if (&fb->base == ifbdev->helper.fb) 1374 continue; 1375 1376 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ", 1377 fb->base.width, 1378 fb->base.height, 1379 fb->base.depth, 1380 fb->base.bits_per_pixel); 1381 describe_obj(m, fb->obj); 1382 seq_printf(m, "\n"); 1383 } 1384 1385 mutex_unlock(&dev->mode_config.mutex); 1386 1387 return 0; 1388 } 1389 1390 static int i915_context_status(struct seq_file *m, void *unused) 1391 { 1392 struct drm_info_node *node = (struct drm_info_node *) m->private; 1393 struct drm_device *dev = node->minor->dev; 1394 drm_i915_private_t *dev_priv = dev->dev_private; 1395 int ret; 1396 1397 ret = mutex_lock_interruptible(&dev->mode_config.mutex); 1398 if (ret) 1399 return ret; 1400 1401 if (dev_priv->pwrctx) { 1402 seq_printf(m, "power context "); 1403 describe_obj(m, dev_priv->pwrctx); 1404 seq_printf(m, "\n"); 1405 } 1406 1407 if (dev_priv->renderctx) { 1408 seq_printf(m, "render context "); 1409 describe_obj(m, dev_priv->renderctx); 1410 seq_printf(m, "\n"); 1411 } 1412 1413 mutex_unlock(&dev->mode_config.mutex); 1414 1415 return 0; 1416 } 1417 1418 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data) 1419 { 1420 struct drm_info_node *node = (struct drm_info_node *) m->private; 1421 struct drm_device *dev = node->minor->dev; 1422 struct drm_i915_private *dev_priv = dev->dev_private; 1423 unsigned forcewake_count; 1424 1425 spin_lock_irq(&dev_priv->gt_lock); 1426 forcewake_count = dev_priv->forcewake_count; 1427 spin_unlock_irq(&dev_priv->gt_lock); 1428 1429 seq_printf(m, "forcewake count = %u\n", forcewake_count); 1430 1431 return 0; 1432 } 1433 1434 static const char *swizzle_string(unsigned swizzle) 1435 { 1436 switch(swizzle) { 1437 case I915_BIT_6_SWIZZLE_NONE: 1438 return "none"; 1439 case I915_BIT_6_SWIZZLE_9: 1440 return "bit9"; 1441 case I915_BIT_6_SWIZZLE_9_10: 1442 return "bit9/bit10"; 1443 case I915_BIT_6_SWIZZLE_9_11: 1444 return "bit9/bit11"; 1445 case I915_BIT_6_SWIZZLE_9_10_11: 1446 return "bit9/bit10/bit11"; 1447 case I915_BIT_6_SWIZZLE_9_17: 1448 return "bit9/bit17"; 1449 case I915_BIT_6_SWIZZLE_9_10_17: 1450 return "bit9/bit10/bit17"; 1451 case I915_BIT_6_SWIZZLE_UNKNOWN: 1452 return "unkown"; 1453 } 1454 1455 return "bug"; 1456 } 1457 1458 static int i915_swizzle_info(struct seq_file *m, void *data) 1459 { 1460 struct drm_info_node *node = (struct drm_info_node *) m->private; 1461 struct drm_device *dev = node->minor->dev; 1462 struct drm_i915_private *dev_priv = dev->dev_private; 1463 int ret; 1464 1465 ret = mutex_lock_interruptible(&dev->struct_mutex); 1466 if (ret) 1467 return ret; 1468 1469 seq_printf(m, "bit6 swizzle for X-tiling = %s\n", 1470 swizzle_string(dev_priv->mm.bit_6_swizzle_x)); 1471 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n", 1472 swizzle_string(dev_priv->mm.bit_6_swizzle_y)); 1473 1474 if (IS_GEN3(dev) || IS_GEN4(dev)) { 1475 seq_printf(m, "DDC = 0x%08x\n", 1476 I915_READ(DCC)); 1477 seq_printf(m, "C0DRB3 = 0x%04x\n", 1478 I915_READ16(C0DRB3)); 1479 seq_printf(m, "C1DRB3 = 0x%04x\n", 1480 I915_READ16(C1DRB3)); 1481 } else if (IS_GEN6(dev) || IS_GEN7(dev)) { 1482 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", 1483 I915_READ(MAD_DIMM_C0)); 1484 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", 1485 I915_READ(MAD_DIMM_C1)); 1486 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n", 1487 I915_READ(MAD_DIMM_C2)); 1488 seq_printf(m, "TILECTL = 0x%08x\n", 1489 I915_READ(TILECTL)); 1490 seq_printf(m, "ARB_MODE = 0x%08x\n", 1491 I915_READ(ARB_MODE)); 1492 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n", 1493 I915_READ(DISP_ARB_CTL)); 1494 } 1495 mutex_unlock(&dev->struct_mutex); 1496 1497 return 0; 1498 } 1499 1500 static int i915_ppgtt_info(struct seq_file *m, void *data) 1501 { 1502 struct drm_info_node *node = (struct drm_info_node *) m->private; 1503 struct drm_device *dev = node->minor->dev; 1504 struct drm_i915_private *dev_priv = dev->dev_private; 1505 struct intel_ring_buffer *ring; 1506 int i, ret; 1507 1508 1509 ret = mutex_lock_interruptible(&dev->struct_mutex); 1510 if (ret) 1511 return ret; 1512 if (INTEL_INFO(dev)->gen == 6) 1513 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); 1514 1515 for_each_ring(ring, dev_priv, i) { 1516 seq_printf(m, "%s\n", ring->name); 1517 if (INTEL_INFO(dev)->gen == 7) 1518 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring))); 1519 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring))); 1520 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring))); 1521 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring))); 1522 } 1523 if (dev_priv->mm.aliasing_ppgtt) { 1524 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt; 1525 1526 seq_printf(m, "aliasing PPGTT:\n"); 1527 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset); 1528 } 1529 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); 1530 mutex_unlock(&dev->struct_mutex); 1531 1532 return 0; 1533 } 1534 1535 static int i915_dpio_info(struct seq_file *m, void *data) 1536 { 1537 struct drm_info_node *node = (struct drm_info_node *) m->private; 1538 struct drm_device *dev = node->minor->dev; 1539 struct drm_i915_private *dev_priv = dev->dev_private; 1540 int ret; 1541 1542 1543 if (!IS_VALLEYVIEW(dev)) { 1544 seq_printf(m, "unsupported\n"); 1545 return 0; 1546 } 1547 1548 ret = mutex_lock_interruptible(&dev->mode_config.mutex); 1549 if (ret) 1550 return ret; 1551 1552 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL)); 1553 1554 seq_printf(m, "DPIO_DIV_A: 0x%08x\n", 1555 intel_dpio_read(dev_priv, _DPIO_DIV_A)); 1556 seq_printf(m, "DPIO_DIV_B: 0x%08x\n", 1557 intel_dpio_read(dev_priv, _DPIO_DIV_B)); 1558 1559 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n", 1560 intel_dpio_read(dev_priv, _DPIO_REFSFR_A)); 1561 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n", 1562 intel_dpio_read(dev_priv, _DPIO_REFSFR_B)); 1563 1564 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n", 1565 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A)); 1566 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n", 1567 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B)); 1568 1569 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n", 1570 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A)); 1571 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n", 1572 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B)); 1573 1574 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n", 1575 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE)); 1576 1577 mutex_unlock(&dev->mode_config.mutex); 1578 1579 return 0; 1580 } 1581 1582 static ssize_t 1583 i915_wedged_read(struct file *filp, 1584 char __user *ubuf, 1585 size_t max, 1586 loff_t *ppos) 1587 { 1588 struct drm_device *dev = filp->private_data; 1589 drm_i915_private_t *dev_priv = dev->dev_private; 1590 char buf[80]; 1591 int len; 1592 1593 len = snprintf(buf, sizeof(buf), 1594 "wedged : %d\n", 1595 atomic_read(&dev_priv->mm.wedged)); 1596 1597 if (len > sizeof(buf)) 1598 len = sizeof(buf); 1599 1600 return simple_read_from_buffer(ubuf, max, ppos, buf, len); 1601 } 1602 1603 static ssize_t 1604 i915_wedged_write(struct file *filp, 1605 const char __user *ubuf, 1606 size_t cnt, 1607 loff_t *ppos) 1608 { 1609 struct drm_device *dev = filp->private_data; 1610 char buf[20]; 1611 int val = 1; 1612 1613 if (cnt > 0) { 1614 if (cnt > sizeof(buf) - 1) 1615 return -EINVAL; 1616 1617 if (copy_from_user(buf, ubuf, cnt)) 1618 return -EFAULT; 1619 buf[cnt] = 0; 1620 1621 val = simple_strtoul(buf, NULL, 0); 1622 } 1623 1624 DRM_INFO("Manually setting wedged to %d\n", val); 1625 i915_handle_error(dev, val); 1626 1627 return cnt; 1628 } 1629 1630 static const struct file_operations i915_wedged_fops = { 1631 .owner = THIS_MODULE, 1632 .open = simple_open, 1633 .read = i915_wedged_read, 1634 .write = i915_wedged_write, 1635 .llseek = default_llseek, 1636 }; 1637 1638 static ssize_t 1639 i915_ring_stop_read(struct file *filp, 1640 char __user *ubuf, 1641 size_t max, 1642 loff_t *ppos) 1643 { 1644 struct drm_device *dev = filp->private_data; 1645 drm_i915_private_t *dev_priv = dev->dev_private; 1646 char buf[20]; 1647 int len; 1648 1649 len = snprintf(buf, sizeof(buf), 1650 "0x%08x\n", dev_priv->stop_rings); 1651 1652 if (len > sizeof(buf)) 1653 len = sizeof(buf); 1654 1655 return simple_read_from_buffer(ubuf, max, ppos, buf, len); 1656 } 1657 1658 static ssize_t 1659 i915_ring_stop_write(struct file *filp, 1660 const char __user *ubuf, 1661 size_t cnt, 1662 loff_t *ppos) 1663 { 1664 struct drm_device *dev = filp->private_data; 1665 struct drm_i915_private *dev_priv = dev->dev_private; 1666 char buf[20]; 1667 int val = 0, ret; 1668 1669 if (cnt > 0) { 1670 if (cnt > sizeof(buf) - 1) 1671 return -EINVAL; 1672 1673 if (copy_from_user(buf, ubuf, cnt)) 1674 return -EFAULT; 1675 buf[cnt] = 0; 1676 1677 val = simple_strtoul(buf, NULL, 0); 1678 } 1679 1680 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val); 1681 1682 ret = mutex_lock_interruptible(&dev->struct_mutex); 1683 if (ret) 1684 return ret; 1685 1686 dev_priv->stop_rings = val; 1687 mutex_unlock(&dev->struct_mutex); 1688 1689 return cnt; 1690 } 1691 1692 static const struct file_operations i915_ring_stop_fops = { 1693 .owner = THIS_MODULE, 1694 .open = simple_open, 1695 .read = i915_ring_stop_read, 1696 .write = i915_ring_stop_write, 1697 .llseek = default_llseek, 1698 }; 1699 1700 static ssize_t 1701 i915_max_freq_read(struct file *filp, 1702 char __user *ubuf, 1703 size_t max, 1704 loff_t *ppos) 1705 { 1706 struct drm_device *dev = filp->private_data; 1707 drm_i915_private_t *dev_priv = dev->dev_private; 1708 char buf[80]; 1709 int len, ret; 1710 1711 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 1712 return -ENODEV; 1713 1714 ret = mutex_lock_interruptible(&dev->struct_mutex); 1715 if (ret) 1716 return ret; 1717 1718 len = snprintf(buf, sizeof(buf), 1719 "max freq: %d\n", dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER); 1720 mutex_unlock(&dev->struct_mutex); 1721 1722 if (len > sizeof(buf)) 1723 len = sizeof(buf); 1724 1725 return simple_read_from_buffer(ubuf, max, ppos, buf, len); 1726 } 1727 1728 static ssize_t 1729 i915_max_freq_write(struct file *filp, 1730 const char __user *ubuf, 1731 size_t cnt, 1732 loff_t *ppos) 1733 { 1734 struct drm_device *dev = filp->private_data; 1735 struct drm_i915_private *dev_priv = dev->dev_private; 1736 char buf[20]; 1737 int val = 1, ret; 1738 1739 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 1740 return -ENODEV; 1741 1742 if (cnt > 0) { 1743 if (cnt > sizeof(buf) - 1) 1744 return -EINVAL; 1745 1746 if (copy_from_user(buf, ubuf, cnt)) 1747 return -EFAULT; 1748 buf[cnt] = 0; 1749 1750 val = simple_strtoul(buf, NULL, 0); 1751 } 1752 1753 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val); 1754 1755 ret = mutex_lock_interruptible(&dev->struct_mutex); 1756 if (ret) 1757 return ret; 1758 1759 /* 1760 * Turbo will still be enabled, but won't go above the set value. 1761 */ 1762 dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER; 1763 1764 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER); 1765 mutex_unlock(&dev->struct_mutex); 1766 1767 return cnt; 1768 } 1769 1770 static const struct file_operations i915_max_freq_fops = { 1771 .owner = THIS_MODULE, 1772 .open = simple_open, 1773 .read = i915_max_freq_read, 1774 .write = i915_max_freq_write, 1775 .llseek = default_llseek, 1776 }; 1777 1778 static ssize_t 1779 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max, 1780 loff_t *ppos) 1781 { 1782 struct drm_device *dev = filp->private_data; 1783 drm_i915_private_t *dev_priv = dev->dev_private; 1784 char buf[80]; 1785 int len, ret; 1786 1787 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 1788 return -ENODEV; 1789 1790 ret = mutex_lock_interruptible(&dev->struct_mutex); 1791 if (ret) 1792 return ret; 1793 1794 len = snprintf(buf, sizeof(buf), 1795 "min freq: %d\n", dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER); 1796 mutex_unlock(&dev->struct_mutex); 1797 1798 if (len > sizeof(buf)) 1799 len = sizeof(buf); 1800 1801 return simple_read_from_buffer(ubuf, max, ppos, buf, len); 1802 } 1803 1804 static ssize_t 1805 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt, 1806 loff_t *ppos) 1807 { 1808 struct drm_device *dev = filp->private_data; 1809 struct drm_i915_private *dev_priv = dev->dev_private; 1810 char buf[20]; 1811 int val = 1, ret; 1812 1813 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 1814 return -ENODEV; 1815 1816 if (cnt > 0) { 1817 if (cnt > sizeof(buf) - 1) 1818 return -EINVAL; 1819 1820 if (copy_from_user(buf, ubuf, cnt)) 1821 return -EFAULT; 1822 buf[cnt] = 0; 1823 1824 val = simple_strtoul(buf, NULL, 0); 1825 } 1826 1827 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val); 1828 1829 ret = mutex_lock_interruptible(&dev->struct_mutex); 1830 if (ret) 1831 return ret; 1832 1833 /* 1834 * Turbo will still be enabled, but won't go below the set value. 1835 */ 1836 dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER; 1837 1838 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER); 1839 mutex_unlock(&dev->struct_mutex); 1840 1841 return cnt; 1842 } 1843 1844 static const struct file_operations i915_min_freq_fops = { 1845 .owner = THIS_MODULE, 1846 .open = simple_open, 1847 .read = i915_min_freq_read, 1848 .write = i915_min_freq_write, 1849 .llseek = default_llseek, 1850 }; 1851 1852 static ssize_t 1853 i915_cache_sharing_read(struct file *filp, 1854 char __user *ubuf, 1855 size_t max, 1856 loff_t *ppos) 1857 { 1858 struct drm_device *dev = filp->private_data; 1859 drm_i915_private_t *dev_priv = dev->dev_private; 1860 char buf[80]; 1861 u32 snpcr; 1862 int len, ret; 1863 1864 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 1865 return -ENODEV; 1866 1867 ret = mutex_lock_interruptible(&dev->struct_mutex); 1868 if (ret) 1869 return ret; 1870 1871 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); 1872 mutex_unlock(&dev_priv->dev->struct_mutex); 1873 1874 len = snprintf(buf, sizeof(buf), 1875 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >> 1876 GEN6_MBC_SNPCR_SHIFT); 1877 1878 if (len > sizeof(buf)) 1879 len = sizeof(buf); 1880 1881 return simple_read_from_buffer(ubuf, max, ppos, buf, len); 1882 } 1883 1884 static ssize_t 1885 i915_cache_sharing_write(struct file *filp, 1886 const char __user *ubuf, 1887 size_t cnt, 1888 loff_t *ppos) 1889 { 1890 struct drm_device *dev = filp->private_data; 1891 struct drm_i915_private *dev_priv = dev->dev_private; 1892 char buf[20]; 1893 u32 snpcr; 1894 int val = 1; 1895 1896 if (!(IS_GEN6(dev) || IS_GEN7(dev))) 1897 return -ENODEV; 1898 1899 if (cnt > 0) { 1900 if (cnt > sizeof(buf) - 1) 1901 return -EINVAL; 1902 1903 if (copy_from_user(buf, ubuf, cnt)) 1904 return -EFAULT; 1905 buf[cnt] = 0; 1906 1907 val = simple_strtoul(buf, NULL, 0); 1908 } 1909 1910 if (val < 0 || val > 3) 1911 return -EINVAL; 1912 1913 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val); 1914 1915 /* Update the cache sharing policy here as well */ 1916 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); 1917 snpcr &= ~GEN6_MBC_SNPCR_MASK; 1918 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT); 1919 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr); 1920 1921 return cnt; 1922 } 1923 1924 static const struct file_operations i915_cache_sharing_fops = { 1925 .owner = THIS_MODULE, 1926 .open = simple_open, 1927 .read = i915_cache_sharing_read, 1928 .write = i915_cache_sharing_write, 1929 .llseek = default_llseek, 1930 }; 1931 1932 /* As the drm_debugfs_init() routines are called before dev->dev_private is 1933 * allocated we need to hook into the minor for release. */ 1934 static int 1935 drm_add_fake_info_node(struct drm_minor *minor, 1936 struct dentry *ent, 1937 const void *key) 1938 { 1939 struct drm_info_node *node; 1940 1941 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL); 1942 if (node == NULL) { 1943 debugfs_remove(ent); 1944 return -ENOMEM; 1945 } 1946 1947 node->minor = minor; 1948 node->dent = ent; 1949 node->info_ent = (void *) key; 1950 1951 mutex_lock(&minor->debugfs_lock); 1952 list_add(&node->list, &minor->debugfs_list); 1953 mutex_unlock(&minor->debugfs_lock); 1954 1955 return 0; 1956 } 1957 1958 static int i915_forcewake_open(struct inode *inode, struct file *file) 1959 { 1960 struct drm_device *dev = inode->i_private; 1961 struct drm_i915_private *dev_priv = dev->dev_private; 1962 1963 if (INTEL_INFO(dev)->gen < 6) 1964 return 0; 1965 1966 gen6_gt_force_wake_get(dev_priv); 1967 1968 return 0; 1969 } 1970 1971 static int i915_forcewake_release(struct inode *inode, struct file *file) 1972 { 1973 struct drm_device *dev = inode->i_private; 1974 struct drm_i915_private *dev_priv = dev->dev_private; 1975 1976 if (INTEL_INFO(dev)->gen < 6) 1977 return 0; 1978 1979 gen6_gt_force_wake_put(dev_priv); 1980 1981 return 0; 1982 } 1983 1984 static const struct file_operations i915_forcewake_fops = { 1985 .owner = THIS_MODULE, 1986 .open = i915_forcewake_open, 1987 .release = i915_forcewake_release, 1988 }; 1989 1990 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor) 1991 { 1992 struct drm_device *dev = minor->dev; 1993 struct dentry *ent; 1994 1995 ent = debugfs_create_file("i915_forcewake_user", 1996 S_IRUSR, 1997 root, dev, 1998 &i915_forcewake_fops); 1999 if (IS_ERR(ent)) 2000 return PTR_ERR(ent); 2001 2002 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops); 2003 } 2004 2005 static int i915_debugfs_create(struct dentry *root, 2006 struct drm_minor *minor, 2007 const char *name, 2008 const struct file_operations *fops) 2009 { 2010 struct drm_device *dev = minor->dev; 2011 struct dentry *ent; 2012 2013 ent = debugfs_create_file(name, 2014 S_IRUGO | S_IWUSR, 2015 root, dev, 2016 fops); 2017 if (IS_ERR(ent)) 2018 return PTR_ERR(ent); 2019 2020 return drm_add_fake_info_node(minor, ent, fops); 2021 } 2022 2023 static struct drm_info_list i915_debugfs_list[] = { 2024 {"i915_capabilities", i915_capabilities, 0}, 2025 {"i915_gem_objects", i915_gem_object_info, 0}, 2026 {"i915_gem_gtt", i915_gem_gtt_info, 0}, 2027 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST}, 2028 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, 2029 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, 2030 {"i915_gem_pageflip", i915_gem_pageflip_info, 0}, 2031 {"i915_gem_request", i915_gem_request_info, 0}, 2032 {"i915_gem_seqno", i915_gem_seqno_info, 0}, 2033 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, 2034 {"i915_gem_interrupt", i915_interrupt_info, 0}, 2035 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS}, 2036 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS}, 2037 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS}, 2038 {"i915_rstdby_delays", i915_rstdby_delays, 0}, 2039 {"i915_cur_delayinfo", i915_cur_delayinfo, 0}, 2040 {"i915_delayfreq_table", i915_delayfreq_table, 0}, 2041 {"i915_inttoext_table", i915_inttoext_table, 0}, 2042 {"i915_drpc_info", i915_drpc_info, 0}, 2043 {"i915_emon_status", i915_emon_status, 0}, 2044 {"i915_ring_freq_table", i915_ring_freq_table, 0}, 2045 {"i915_gfxec", i915_gfxec, 0}, 2046 {"i915_fbc_status", i915_fbc_status, 0}, 2047 {"i915_sr_status", i915_sr_status, 0}, 2048 {"i915_opregion", i915_opregion, 0}, 2049 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 2050 {"i915_context_status", i915_context_status, 0}, 2051 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0}, 2052 {"i915_swizzle_info", i915_swizzle_info, 0}, 2053 {"i915_ppgtt_info", i915_ppgtt_info, 0}, 2054 {"i915_dpio", i915_dpio_info, 0}, 2055 }; 2056 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) 2057 2058 int i915_debugfs_init(struct drm_minor *minor) 2059 { 2060 int ret; 2061 2062 ret = i915_debugfs_create(minor->debugfs_root, minor, 2063 "i915_wedged", 2064 &i915_wedged_fops); 2065 if (ret) 2066 return ret; 2067 2068 ret = i915_forcewake_create(minor->debugfs_root, minor); 2069 if (ret) 2070 return ret; 2071 2072 ret = i915_debugfs_create(minor->debugfs_root, minor, 2073 "i915_max_freq", 2074 &i915_max_freq_fops); 2075 if (ret) 2076 return ret; 2077 2078 ret = i915_debugfs_create(minor->debugfs_root, minor, 2079 "i915_min_freq", 2080 &i915_min_freq_fops); 2081 if (ret) 2082 return ret; 2083 2084 ret = i915_debugfs_create(minor->debugfs_root, minor, 2085 "i915_cache_sharing", 2086 &i915_cache_sharing_fops); 2087 if (ret) 2088 return ret; 2089 2090 ret = i915_debugfs_create(minor->debugfs_root, minor, 2091 "i915_ring_stop", 2092 &i915_ring_stop_fops); 2093 if (ret) 2094 return ret; 2095 2096 ret = i915_debugfs_create(minor->debugfs_root, minor, 2097 "i915_error_state", 2098 &i915_error_state_fops); 2099 if (ret) 2100 return ret; 2101 2102 return drm_debugfs_create_files(i915_debugfs_list, 2103 I915_DEBUGFS_ENTRIES, 2104 minor->debugfs_root, minor); 2105 } 2106 2107 void i915_debugfs_cleanup(struct drm_minor *minor) 2108 { 2109 drm_debugfs_remove_files(i915_debugfs_list, 2110 I915_DEBUGFS_ENTRIES, minor); 2111 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops, 2112 1, minor); 2113 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops, 2114 1, minor); 2115 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops, 2116 1, minor); 2117 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops, 2118 1, minor); 2119 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops, 2120 1, minor); 2121 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops, 2122 1, minor); 2123 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops, 2124 1, minor); 2125 } 2126 2127 #endif /* CONFIG_DEBUG_FS */ 2128