xref: /openbmc/linux/drivers/gpu/drm/i915/gvt/vgpu.c (revision 4d60c5fd)
182d375d1SZhi Wang /*
282d375d1SZhi Wang  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
382d375d1SZhi Wang  *
482d375d1SZhi Wang  * Permission is hereby granted, free of charge, to any person obtaining a
582d375d1SZhi Wang  * copy of this software and associated documentation files (the "Software"),
682d375d1SZhi Wang  * to deal in the Software without restriction, including without limitation
782d375d1SZhi Wang  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
882d375d1SZhi Wang  * and/or sell copies of the Software, and to permit persons to whom the
982d375d1SZhi Wang  * Software is furnished to do so, subject to the following conditions:
1082d375d1SZhi Wang  *
1182d375d1SZhi Wang  * The above copyright notice and this permission notice (including the next
1282d375d1SZhi Wang  * paragraph) shall be included in all copies or substantial portions of the
1382d375d1SZhi Wang  * Software.
1482d375d1SZhi Wang  *
1582d375d1SZhi Wang  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1682d375d1SZhi Wang  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1782d375d1SZhi Wang  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1882d375d1SZhi Wang  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1982d375d1SZhi Wang  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
2082d375d1SZhi Wang  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
2182d375d1SZhi Wang  * SOFTWARE.
2282d375d1SZhi Wang  *
2382d375d1SZhi Wang  * Authors:
2482d375d1SZhi Wang  *    Eddie Dong <eddie.dong@intel.com>
2582d375d1SZhi Wang  *    Kevin Tian <kevin.tian@intel.com>
2682d375d1SZhi Wang  *
2782d375d1SZhi Wang  * Contributors:
2882d375d1SZhi Wang  *    Ping Gao <ping.a.gao@intel.com>
2982d375d1SZhi Wang  *    Zhi Wang <zhi.a.wang@intel.com>
3082d375d1SZhi Wang  *    Bing Niu <bing.niu@intel.com>
3182d375d1SZhi Wang  *
3282d375d1SZhi Wang  */
3382d375d1SZhi Wang 
3482d375d1SZhi Wang #include "i915_drv.h"
3582d375d1SZhi Wang 
3682d375d1SZhi Wang static void clean_vgpu_mmio(struct intel_vgpu *vgpu)
3782d375d1SZhi Wang {
3882d375d1SZhi Wang 	vfree(vgpu->mmio.vreg);
3982d375d1SZhi Wang 	vgpu->mmio.vreg = vgpu->mmio.sreg = NULL;
4082d375d1SZhi Wang }
4182d375d1SZhi Wang 
4282d375d1SZhi Wang static int setup_vgpu_mmio(struct intel_vgpu *vgpu)
4382d375d1SZhi Wang {
4482d375d1SZhi Wang 	struct intel_gvt *gvt = vgpu->gvt;
4582d375d1SZhi Wang 	const struct intel_gvt_device_info *info = &gvt->device_info;
4682d375d1SZhi Wang 
4782d375d1SZhi Wang 	vgpu->mmio.vreg = vzalloc(info->mmio_size * 2);
4882d375d1SZhi Wang 	if (!vgpu->mmio.vreg)
4982d375d1SZhi Wang 		return -ENOMEM;
5082d375d1SZhi Wang 
5182d375d1SZhi Wang 	vgpu->mmio.sreg = vgpu->mmio.vreg + info->mmio_size;
5282d375d1SZhi Wang 
5382d375d1SZhi Wang 	memcpy(vgpu->mmio.vreg, gvt->firmware.mmio, info->mmio_size);
5482d375d1SZhi Wang 	memcpy(vgpu->mmio.sreg, gvt->firmware.mmio, info->mmio_size);
5582d375d1SZhi Wang 	return 0;
5682d375d1SZhi Wang }
5782d375d1SZhi Wang 
5882d375d1SZhi Wang static void setup_vgpu_cfg_space(struct intel_vgpu *vgpu,
5982d375d1SZhi Wang 	struct intel_vgpu_creation_params *param)
6082d375d1SZhi Wang {
6182d375d1SZhi Wang 	struct intel_gvt *gvt = vgpu->gvt;
6282d375d1SZhi Wang 	const struct intel_gvt_device_info *info = &gvt->device_info;
6382d375d1SZhi Wang 	u16 *gmch_ctl;
6482d375d1SZhi Wang 	int i;
6582d375d1SZhi Wang 
6682d375d1SZhi Wang 	memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space,
6782d375d1SZhi Wang 	       info->cfg_space_size);
6882d375d1SZhi Wang 
6982d375d1SZhi Wang 	if (!param->primary) {
7082d375d1SZhi Wang 		vgpu_cfg_space(vgpu)[PCI_CLASS_DEVICE] =
7182d375d1SZhi Wang 			INTEL_GVT_PCI_CLASS_VGA_OTHER;
7282d375d1SZhi Wang 		vgpu_cfg_space(vgpu)[PCI_CLASS_PROG] =
7382d375d1SZhi Wang 			INTEL_GVT_PCI_CLASS_VGA_OTHER;
7482d375d1SZhi Wang 	}
7582d375d1SZhi Wang 
7682d375d1SZhi Wang 	/* Show guest that there isn't any stolen memory.*/
7782d375d1SZhi Wang 	gmch_ctl = (u16 *)(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_GMCH_CONTROL);
7882d375d1SZhi Wang 	*gmch_ctl &= ~(BDW_GMCH_GMS_MASK << BDW_GMCH_GMS_SHIFT);
7982d375d1SZhi Wang 
8082d375d1SZhi Wang 	intel_vgpu_write_pci_bar(vgpu, PCI_BASE_ADDRESS_2,
8182d375d1SZhi Wang 				 gvt_aperture_pa_base(gvt), true);
8282d375d1SZhi Wang 
8382d375d1SZhi Wang 	vgpu_cfg_space(vgpu)[PCI_COMMAND] &= ~(PCI_COMMAND_IO
8482d375d1SZhi Wang 					     | PCI_COMMAND_MEMORY
8582d375d1SZhi Wang 					     | PCI_COMMAND_MASTER);
8682d375d1SZhi Wang 	/*
8782d375d1SZhi Wang 	 * Clear the bar upper 32bit and let guest to assign the new value
8882d375d1SZhi Wang 	 */
8982d375d1SZhi Wang 	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_1, 0, 4);
9082d375d1SZhi Wang 	memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_3, 0, 4);
9182d375d1SZhi Wang 
9282d375d1SZhi Wang 	for (i = 0; i < INTEL_GVT_MAX_BAR_NUM; i++) {
9382d375d1SZhi Wang 		vgpu->cfg_space.bar[i].size = pci_resource_len(
9482d375d1SZhi Wang 					      gvt->dev_priv->drm.pdev, i * 2);
9582d375d1SZhi Wang 		vgpu->cfg_space.bar[i].tracked = false;
9682d375d1SZhi Wang 	}
9782d375d1SZhi Wang }
9882d375d1SZhi Wang 
9982d375d1SZhi Wang static void populate_pvinfo_page(struct intel_vgpu *vgpu)
10082d375d1SZhi Wang {
10182d375d1SZhi Wang 	/* setup the ballooning information */
10282d375d1SZhi Wang 	vgpu_vreg64(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
10382d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(version_major)) = 1;
10482d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(version_minor)) = 0;
10582d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(display_ready)) = 0;
10682d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
10782d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
10882d375d1SZhi Wang 		vgpu_aperture_gmadr_base(vgpu);
10982d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
11082d375d1SZhi Wang 		vgpu_aperture_sz(vgpu);
11182d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
11282d375d1SZhi Wang 		vgpu_hidden_gmadr_base(vgpu);
11382d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
11482d375d1SZhi Wang 		vgpu_hidden_sz(vgpu);
11582d375d1SZhi Wang 
11682d375d1SZhi Wang 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
11782d375d1SZhi Wang 
11882d375d1SZhi Wang 	gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
11982d375d1SZhi Wang 	gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
12082d375d1SZhi Wang 		vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu));
12182d375d1SZhi Wang 	gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
12282d375d1SZhi Wang 		vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu));
12382d375d1SZhi Wang 	gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));
12482d375d1SZhi Wang 
12582d375d1SZhi Wang 	WARN_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
12682d375d1SZhi Wang }
12782d375d1SZhi Wang 
12882d375d1SZhi Wang /**
12982d375d1SZhi Wang  * intel_gvt_destroy_vgpu - destroy a virtual GPU
13082d375d1SZhi Wang  * @vgpu: virtual GPU
13182d375d1SZhi Wang  *
13282d375d1SZhi Wang  * This function is called when user wants to destroy a virtual GPU.
13382d375d1SZhi Wang  *
13482d375d1SZhi Wang  */
13582d375d1SZhi Wang void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
13682d375d1SZhi Wang {
13782d375d1SZhi Wang 	struct intel_gvt *gvt = vgpu->gvt;
13882d375d1SZhi Wang 
13982d375d1SZhi Wang 	mutex_lock(&gvt->lock);
14082d375d1SZhi Wang 
14182d375d1SZhi Wang 	vgpu->active = false;
14282d375d1SZhi Wang 	idr_remove(&gvt->vgpu_idr, vgpu->id);
14382d375d1SZhi Wang 
1444d60c5fdSZhi Wang 	intel_vgpu_clean_opregion(vgpu);
1452707e444SZhi Wang 	intel_vgpu_clean_gtt(vgpu);
14682d375d1SZhi Wang 	intel_gvt_hypervisor_detach_vgpu(vgpu);
14782d375d1SZhi Wang 	intel_vgpu_free_resource(vgpu);
14882d375d1SZhi Wang 	clean_vgpu_mmio(vgpu);
14982d375d1SZhi Wang 	vfree(vgpu);
15082d375d1SZhi Wang 
15182d375d1SZhi Wang 	mutex_unlock(&gvt->lock);
15282d375d1SZhi Wang }
15382d375d1SZhi Wang 
15482d375d1SZhi Wang /**
15582d375d1SZhi Wang  * intel_gvt_create_vgpu - create a virtual GPU
15682d375d1SZhi Wang  * @gvt: GVT device
15782d375d1SZhi Wang  * @param: vGPU creation parameters
15882d375d1SZhi Wang  *
15982d375d1SZhi Wang  * This function is called when user wants to create a virtual GPU.
16082d375d1SZhi Wang  *
16182d375d1SZhi Wang  * Returns:
16282d375d1SZhi Wang  * pointer to intel_vgpu, error pointer if failed.
16382d375d1SZhi Wang  */
16482d375d1SZhi Wang struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
16582d375d1SZhi Wang 		struct intel_vgpu_creation_params *param)
16682d375d1SZhi Wang {
16782d375d1SZhi Wang 	struct intel_vgpu *vgpu;
16882d375d1SZhi Wang 	int ret;
16982d375d1SZhi Wang 
17082d375d1SZhi Wang 	gvt_dbg_core("handle %llu low %llu MB high %llu MB fence %llu\n",
17182d375d1SZhi Wang 			param->handle, param->low_gm_sz, param->high_gm_sz,
17282d375d1SZhi Wang 			param->fence_sz);
17382d375d1SZhi Wang 
17482d375d1SZhi Wang 	vgpu = vzalloc(sizeof(*vgpu));
17582d375d1SZhi Wang 	if (!vgpu)
17682d375d1SZhi Wang 		return ERR_PTR(-ENOMEM);
17782d375d1SZhi Wang 
17882d375d1SZhi Wang 	mutex_lock(&gvt->lock);
17982d375d1SZhi Wang 
18082d375d1SZhi Wang 	ret = idr_alloc(&gvt->vgpu_idr, vgpu, 1, GVT_MAX_VGPU, GFP_KERNEL);
18182d375d1SZhi Wang 	if (ret < 0)
18282d375d1SZhi Wang 		goto out_free_vgpu;
18382d375d1SZhi Wang 
18482d375d1SZhi Wang 	vgpu->id = ret;
18582d375d1SZhi Wang 	vgpu->handle = param->handle;
18682d375d1SZhi Wang 	vgpu->gvt = gvt;
18782d375d1SZhi Wang 
18882d375d1SZhi Wang 	setup_vgpu_cfg_space(vgpu, param);
18982d375d1SZhi Wang 
19082d375d1SZhi Wang 	ret = setup_vgpu_mmio(vgpu);
19182d375d1SZhi Wang 	if (ret)
19282d375d1SZhi Wang 		goto out_free_vgpu;
19382d375d1SZhi Wang 
19482d375d1SZhi Wang 	ret = intel_vgpu_alloc_resource(vgpu, param);
19582d375d1SZhi Wang 	if (ret)
19682d375d1SZhi Wang 		goto out_clean_vgpu_mmio;
19782d375d1SZhi Wang 
19882d375d1SZhi Wang 	populate_pvinfo_page(vgpu);
19982d375d1SZhi Wang 
20082d375d1SZhi Wang 	ret = intel_gvt_hypervisor_attach_vgpu(vgpu);
20182d375d1SZhi Wang 	if (ret)
20282d375d1SZhi Wang 		goto out_clean_vgpu_resource;
20382d375d1SZhi Wang 
2042707e444SZhi Wang 	ret = intel_vgpu_init_gtt(vgpu);
2052707e444SZhi Wang 	if (ret)
2062707e444SZhi Wang 		goto out_detach_hypervisor_vgpu;
2072707e444SZhi Wang 
2084d60c5fdSZhi Wang 	if (intel_gvt_host.hypervisor_type == INTEL_GVT_HYPERVISOR_KVM) {
2094d60c5fdSZhi Wang 		ret = intel_vgpu_init_opregion(vgpu, 0);
2104d60c5fdSZhi Wang 		if (ret)
2114d60c5fdSZhi Wang 			goto out_clean_gtt;
2124d60c5fdSZhi Wang 	}
2134d60c5fdSZhi Wang 
21482d375d1SZhi Wang 	vgpu->active = true;
21582d375d1SZhi Wang 	mutex_unlock(&gvt->lock);
21682d375d1SZhi Wang 
21782d375d1SZhi Wang 	return vgpu;
21882d375d1SZhi Wang 
2194d60c5fdSZhi Wang out_clean_gtt:
2204d60c5fdSZhi Wang 	intel_vgpu_clean_gtt(vgpu);
2212707e444SZhi Wang out_detach_hypervisor_vgpu:
2222707e444SZhi Wang 	intel_gvt_hypervisor_detach_vgpu(vgpu);
22382d375d1SZhi Wang out_clean_vgpu_resource:
22482d375d1SZhi Wang 	intel_vgpu_free_resource(vgpu);
22582d375d1SZhi Wang out_clean_vgpu_mmio:
22682d375d1SZhi Wang 	clean_vgpu_mmio(vgpu);
22782d375d1SZhi Wang out_free_vgpu:
22882d375d1SZhi Wang 	vfree(vgpu);
22982d375d1SZhi Wang 	mutex_unlock(&gvt->lock);
23082d375d1SZhi Wang 	return ERR_PTR(ret);
23182d375d1SZhi Wang }
232