1 /*
2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Anhua Xu
25  *    Kevin Tian <kevin.tian@intel.com>
26  *
27  * Contributors:
28  *    Min He <min.he@intel.com>
29  *    Bing Niu <bing.niu@intel.com>
30  *    Zhi Wang <zhi.a.wang@intel.com>
31  *
32  */
33 
34 #include "i915_drv.h"
35 #include "gvt.h"
36 
37 static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu)
38 {
39 	enum intel_engine_id i;
40 	struct intel_engine_cs *engine;
41 
42 	for_each_engine(engine, vgpu->gvt->dev_priv, i) {
43 		if (!list_empty(workload_q_head(vgpu, i)))
44 			return true;
45 	}
46 
47 	return false;
48 }
49 
50 struct vgpu_sched_data {
51 	struct list_head lru_list;
52 	struct intel_vgpu *vgpu;
53 	bool active;
54 
55 	ktime_t sched_in_time;
56 	ktime_t sched_out_time;
57 	ktime_t sched_time;
58 	ktime_t left_ts;
59 	ktime_t allocated_ts;
60 
61 	struct vgpu_sched_ctl sched_ctl;
62 };
63 
64 struct gvt_sched_data {
65 	struct intel_gvt *gvt;
66 	struct hrtimer timer;
67 	unsigned long period;
68 	struct list_head lru_runq_head;
69 };
70 
71 static void vgpu_update_timeslice(struct intel_vgpu *pre_vgpu)
72 {
73 	ktime_t delta_ts;
74 	struct vgpu_sched_data *vgpu_data = pre_vgpu->sched_data;
75 
76 	delta_ts = vgpu_data->sched_out_time - vgpu_data->sched_in_time;
77 
78 	vgpu_data->sched_time += delta_ts;
79 	vgpu_data->left_ts -= delta_ts;
80 }
81 
82 #define GVT_TS_BALANCE_PERIOD_MS 100
83 #define GVT_TS_BALANCE_STAGE_NUM 10
84 
85 static void gvt_balance_timeslice(struct gvt_sched_data *sched_data)
86 {
87 	struct vgpu_sched_data *vgpu_data;
88 	struct list_head *pos;
89 	static uint64_t stage_check;
90 	int stage = stage_check++ % GVT_TS_BALANCE_STAGE_NUM;
91 
92 	/* The timeslice accumulation reset at stage 0, which is
93 	 * allocated again without adding previous debt.
94 	 */
95 	if (stage == 0) {
96 		int total_weight = 0;
97 		ktime_t fair_timeslice;
98 
99 		list_for_each(pos, &sched_data->lru_runq_head) {
100 			vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
101 			total_weight += vgpu_data->sched_ctl.weight;
102 		}
103 
104 		list_for_each(pos, &sched_data->lru_runq_head) {
105 			vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
106 			fair_timeslice = ms_to_ktime(GVT_TS_BALANCE_PERIOD_MS) *
107 						vgpu_data->sched_ctl.weight /
108 						total_weight;
109 
110 			vgpu_data->allocated_ts = fair_timeslice;
111 			vgpu_data->left_ts = vgpu_data->allocated_ts;
112 		}
113 	} else {
114 		list_for_each(pos, &sched_data->lru_runq_head) {
115 			vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
116 
117 			/* timeslice for next 100ms should add the left/debt
118 			 * slice of previous stages.
119 			 */
120 			vgpu_data->left_ts += vgpu_data->allocated_ts;
121 		}
122 	}
123 }
124 
125 static void try_to_schedule_next_vgpu(struct intel_gvt *gvt)
126 {
127 	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
128 	enum intel_engine_id i;
129 	struct intel_engine_cs *engine;
130 	struct vgpu_sched_data *vgpu_data;
131 	ktime_t cur_time;
132 
133 	/* no need to schedule if next_vgpu is the same with current_vgpu,
134 	 * let scheduler chose next_vgpu again by setting it to NULL.
135 	 */
136 	if (scheduler->next_vgpu == scheduler->current_vgpu) {
137 		scheduler->next_vgpu = NULL;
138 		return;
139 	}
140 
141 	/*
142 	 * after the flag is set, workload dispatch thread will
143 	 * stop dispatching workload for current vgpu
144 	 */
145 	scheduler->need_reschedule = true;
146 
147 	/* still have uncompleted workload? */
148 	for_each_engine(engine, gvt->dev_priv, i) {
149 		if (scheduler->current_workload[i])
150 			return;
151 	}
152 
153 	cur_time = ktime_get();
154 	if (scheduler->current_vgpu) {
155 		vgpu_data = scheduler->current_vgpu->sched_data;
156 		vgpu_data->sched_out_time = cur_time;
157 		vgpu_update_timeslice(scheduler->current_vgpu);
158 	}
159 	vgpu_data = scheduler->next_vgpu->sched_data;
160 	vgpu_data->sched_in_time = cur_time;
161 
162 	/* switch current vgpu */
163 	scheduler->current_vgpu = scheduler->next_vgpu;
164 	scheduler->next_vgpu = NULL;
165 
166 	scheduler->need_reschedule = false;
167 
168 	/* wake up workload dispatch thread */
169 	for_each_engine(engine, gvt->dev_priv, i)
170 		wake_up(&scheduler->waitq[i]);
171 }
172 
173 static struct intel_vgpu *find_busy_vgpu(struct gvt_sched_data *sched_data)
174 {
175 	struct vgpu_sched_data *vgpu_data;
176 	struct intel_vgpu *vgpu = NULL;
177 	struct list_head *head = &sched_data->lru_runq_head;
178 	struct list_head *pos;
179 
180 	/* search a vgpu with pending workload */
181 	list_for_each(pos, head) {
182 
183 		vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
184 		if (!vgpu_has_pending_workload(vgpu_data->vgpu))
185 			continue;
186 
187 		/* Return the vGPU only if it has time slice left */
188 		if (vgpu_data->left_ts > 0) {
189 			vgpu = vgpu_data->vgpu;
190 			break;
191 		}
192 	}
193 
194 	return vgpu;
195 }
196 
197 /* in nanosecond */
198 #define GVT_DEFAULT_TIME_SLICE 1000000
199 
200 static void tbs_sched_func(struct gvt_sched_data *sched_data)
201 {
202 	struct intel_gvt *gvt = sched_data->gvt;
203 	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
204 	struct vgpu_sched_data *vgpu_data;
205 	struct intel_vgpu *vgpu = NULL;
206 	/* no active vgpu or has already had a target */
207 	if (list_empty(&sched_data->lru_runq_head) || scheduler->next_vgpu)
208 		goto out;
209 
210 	vgpu = find_busy_vgpu(sched_data);
211 	if (vgpu) {
212 		scheduler->next_vgpu = vgpu;
213 
214 		/* Move the last used vGPU to the tail of lru_list */
215 		vgpu_data = vgpu->sched_data;
216 		list_del_init(&vgpu_data->lru_list);
217 		list_add_tail(&vgpu_data->lru_list,
218 				&sched_data->lru_runq_head);
219 	} else {
220 		scheduler->next_vgpu = gvt->idle_vgpu;
221 	}
222 out:
223 	if (scheduler->next_vgpu)
224 		try_to_schedule_next_vgpu(gvt);
225 }
226 
227 void intel_gvt_schedule(struct intel_gvt *gvt)
228 {
229 	struct gvt_sched_data *sched_data = gvt->scheduler.sched_data;
230 	static uint64_t timer_check;
231 
232 	mutex_lock(&gvt->lock);
233 
234 	if (test_and_clear_bit(INTEL_GVT_REQUEST_SCHED,
235 				(void *)&gvt->service_request)) {
236 		if (!(timer_check++ % GVT_TS_BALANCE_PERIOD_MS))
237 			gvt_balance_timeslice(sched_data);
238 	}
239 	clear_bit(INTEL_GVT_REQUEST_EVENT_SCHED, (void *)&gvt->service_request);
240 
241 	tbs_sched_func(sched_data);
242 
243 	mutex_unlock(&gvt->lock);
244 }
245 
246 static enum hrtimer_restart tbs_timer_fn(struct hrtimer *timer_data)
247 {
248 	struct gvt_sched_data *data;
249 
250 	data = container_of(timer_data, struct gvt_sched_data, timer);
251 
252 	intel_gvt_request_service(data->gvt, INTEL_GVT_REQUEST_SCHED);
253 
254 	hrtimer_add_expires_ns(&data->timer, data->period);
255 
256 	return HRTIMER_RESTART;
257 }
258 
259 static int tbs_sched_init(struct intel_gvt *gvt)
260 {
261 	struct intel_gvt_workload_scheduler *scheduler =
262 		&gvt->scheduler;
263 
264 	struct gvt_sched_data *data;
265 
266 	data = kzalloc(sizeof(*data), GFP_KERNEL);
267 	if (!data)
268 		return -ENOMEM;
269 
270 	INIT_LIST_HEAD(&data->lru_runq_head);
271 	hrtimer_init(&data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
272 	data->timer.function = tbs_timer_fn;
273 	data->period = GVT_DEFAULT_TIME_SLICE;
274 	data->gvt = gvt;
275 
276 	scheduler->sched_data = data;
277 
278 	return 0;
279 }
280 
281 static void tbs_sched_clean(struct intel_gvt *gvt)
282 {
283 	struct intel_gvt_workload_scheduler *scheduler =
284 		&gvt->scheduler;
285 	struct gvt_sched_data *data = scheduler->sched_data;
286 
287 	hrtimer_cancel(&data->timer);
288 
289 	kfree(data);
290 	scheduler->sched_data = NULL;
291 }
292 
293 static int tbs_sched_init_vgpu(struct intel_vgpu *vgpu)
294 {
295 	struct vgpu_sched_data *data;
296 
297 	data = kzalloc(sizeof(*data), GFP_KERNEL);
298 	if (!data)
299 		return -ENOMEM;
300 
301 	data->sched_ctl.weight = vgpu->sched_ctl.weight;
302 	data->vgpu = vgpu;
303 	INIT_LIST_HEAD(&data->lru_list);
304 
305 	vgpu->sched_data = data;
306 
307 	return 0;
308 }
309 
310 static void tbs_sched_clean_vgpu(struct intel_vgpu *vgpu)
311 {
312 	struct intel_gvt *gvt = vgpu->gvt;
313 	struct gvt_sched_data *sched_data = gvt->scheduler.sched_data;
314 
315 	kfree(vgpu->sched_data);
316 	vgpu->sched_data = NULL;
317 
318 	/* this vgpu id has been removed */
319 	if (idr_is_empty(&gvt->vgpu_idr))
320 		hrtimer_cancel(&sched_data->timer);
321 }
322 
323 static void tbs_sched_start_schedule(struct intel_vgpu *vgpu)
324 {
325 	struct gvt_sched_data *sched_data = vgpu->gvt->scheduler.sched_data;
326 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
327 
328 	if (!list_empty(&vgpu_data->lru_list))
329 		return;
330 
331 	list_add_tail(&vgpu_data->lru_list, &sched_data->lru_runq_head);
332 
333 	if (!hrtimer_active(&sched_data->timer))
334 		hrtimer_start(&sched_data->timer, ktime_add_ns(ktime_get(),
335 			sched_data->period), HRTIMER_MODE_ABS);
336 	vgpu_data->active = true;
337 }
338 
339 static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu)
340 {
341 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
342 
343 	list_del_init(&vgpu_data->lru_list);
344 	vgpu_data->active = false;
345 }
346 
347 static struct intel_gvt_sched_policy_ops tbs_schedule_ops = {
348 	.init = tbs_sched_init,
349 	.clean = tbs_sched_clean,
350 	.init_vgpu = tbs_sched_init_vgpu,
351 	.clean_vgpu = tbs_sched_clean_vgpu,
352 	.start_schedule = tbs_sched_start_schedule,
353 	.stop_schedule = tbs_sched_stop_schedule,
354 };
355 
356 int intel_gvt_init_sched_policy(struct intel_gvt *gvt)
357 {
358 	gvt->scheduler.sched_ops = &tbs_schedule_ops;
359 
360 	return gvt->scheduler.sched_ops->init(gvt);
361 }
362 
363 void intel_gvt_clean_sched_policy(struct intel_gvt *gvt)
364 {
365 	gvt->scheduler.sched_ops->clean(gvt);
366 }
367 
368 int intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu)
369 {
370 	return vgpu->gvt->scheduler.sched_ops->init_vgpu(vgpu);
371 }
372 
373 void intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu)
374 {
375 	vgpu->gvt->scheduler.sched_ops->clean_vgpu(vgpu);
376 }
377 
378 void intel_vgpu_start_schedule(struct intel_vgpu *vgpu)
379 {
380 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
381 
382 	if (!vgpu_data->active) {
383 		gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id);
384 		vgpu->gvt->scheduler.sched_ops->start_schedule(vgpu);
385 	}
386 }
387 
388 void intel_gvt_kick_schedule(struct intel_gvt *gvt)
389 {
390 	intel_gvt_request_service(gvt, INTEL_GVT_REQUEST_EVENT_SCHED);
391 }
392 
393 void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
394 {
395 	struct intel_gvt_workload_scheduler *scheduler =
396 		&vgpu->gvt->scheduler;
397 	int ring_id;
398 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
399 
400 	if (!vgpu_data->active)
401 		return;
402 
403 	gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id);
404 
405 	scheduler->sched_ops->stop_schedule(vgpu);
406 
407 	if (scheduler->next_vgpu == vgpu)
408 		scheduler->next_vgpu = NULL;
409 
410 	if (scheduler->current_vgpu == vgpu) {
411 		/* stop workload dispatching */
412 		scheduler->need_reschedule = true;
413 		scheduler->current_vgpu = NULL;
414 	}
415 
416 	spin_lock_bh(&scheduler->mmio_context_lock);
417 	for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) {
418 		if (scheduler->engine_owner[ring_id] == vgpu) {
419 			intel_gvt_switch_mmio(vgpu, NULL, ring_id);
420 			scheduler->engine_owner[ring_id] = NULL;
421 		}
422 	}
423 	spin_unlock_bh(&scheduler->mmio_context_lock);
424 }
425