1 /*
2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Anhua Xu
25  *    Kevin Tian <kevin.tian@intel.com>
26  *
27  * Contributors:
28  *    Min He <min.he@intel.com>
29  *    Bing Niu <bing.niu@intel.com>
30  *    Zhi Wang <zhi.a.wang@intel.com>
31  *
32  */
33 
34 #include "i915_drv.h"
35 #include "gvt.h"
36 
37 static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu)
38 {
39 	enum intel_engine_id i;
40 	struct intel_engine_cs *engine;
41 
42 	for_each_engine(engine, vgpu->gvt->dev_priv, i) {
43 		if (!list_empty(workload_q_head(vgpu, i)))
44 			return true;
45 	}
46 
47 	return false;
48 }
49 
50 struct vgpu_sched_data {
51 	struct list_head lru_list;
52 	struct intel_vgpu *vgpu;
53 	bool active;
54 
55 	ktime_t sched_in_time;
56 	ktime_t sched_time;
57 	ktime_t left_ts;
58 	ktime_t allocated_ts;
59 
60 	struct vgpu_sched_ctl sched_ctl;
61 };
62 
63 struct gvt_sched_data {
64 	struct intel_gvt *gvt;
65 	struct hrtimer timer;
66 	unsigned long period;
67 	struct list_head lru_runq_head;
68 	ktime_t expire_time;
69 };
70 
71 static void vgpu_update_timeslice(struct intel_vgpu *vgpu, ktime_t cur_time)
72 {
73 	ktime_t delta_ts;
74 	struct vgpu_sched_data *vgpu_data;
75 
76 	if (!vgpu || vgpu == vgpu->gvt->idle_vgpu)
77 		return;
78 
79 	vgpu_data = vgpu->sched_data;
80 	delta_ts = ktime_sub(cur_time, vgpu_data->sched_in_time);
81 	vgpu_data->sched_time = ktime_add(vgpu_data->sched_time, delta_ts);
82 	vgpu_data->left_ts = ktime_sub(vgpu_data->left_ts, delta_ts);
83 	vgpu_data->sched_in_time = cur_time;
84 }
85 
86 #define GVT_TS_BALANCE_PERIOD_MS 100
87 #define GVT_TS_BALANCE_STAGE_NUM 10
88 
89 static void gvt_balance_timeslice(struct gvt_sched_data *sched_data)
90 {
91 	struct vgpu_sched_data *vgpu_data;
92 	struct list_head *pos;
93 	static uint64_t stage_check;
94 	int stage = stage_check++ % GVT_TS_BALANCE_STAGE_NUM;
95 
96 	/* The timeslice accumulation reset at stage 0, which is
97 	 * allocated again without adding previous debt.
98 	 */
99 	if (stage == 0) {
100 		int total_weight = 0;
101 		ktime_t fair_timeslice;
102 
103 		list_for_each(pos, &sched_data->lru_runq_head) {
104 			vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
105 			total_weight += vgpu_data->sched_ctl.weight;
106 		}
107 
108 		list_for_each(pos, &sched_data->lru_runq_head) {
109 			vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
110 			fair_timeslice = ktime_divns(ms_to_ktime(GVT_TS_BALANCE_PERIOD_MS),
111 						     total_weight) * vgpu_data->sched_ctl.weight;
112 
113 			vgpu_data->allocated_ts = fair_timeslice;
114 			vgpu_data->left_ts = vgpu_data->allocated_ts;
115 		}
116 	} else {
117 		list_for_each(pos, &sched_data->lru_runq_head) {
118 			vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
119 
120 			/* timeslice for next 100ms should add the left/debt
121 			 * slice of previous stages.
122 			 */
123 			vgpu_data->left_ts += vgpu_data->allocated_ts;
124 		}
125 	}
126 }
127 
128 static void try_to_schedule_next_vgpu(struct intel_gvt *gvt)
129 {
130 	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
131 	enum intel_engine_id i;
132 	struct intel_engine_cs *engine;
133 	struct vgpu_sched_data *vgpu_data;
134 	ktime_t cur_time;
135 
136 	/* no need to schedule if next_vgpu is the same with current_vgpu,
137 	 * let scheduler chose next_vgpu again by setting it to NULL.
138 	 */
139 	if (scheduler->next_vgpu == scheduler->current_vgpu) {
140 		scheduler->next_vgpu = NULL;
141 		return;
142 	}
143 
144 	/*
145 	 * after the flag is set, workload dispatch thread will
146 	 * stop dispatching workload for current vgpu
147 	 */
148 	scheduler->need_reschedule = true;
149 
150 	/* still have uncompleted workload? */
151 	for_each_engine(engine, gvt->dev_priv, i) {
152 		if (scheduler->current_workload[i])
153 			return;
154 	}
155 
156 	cur_time = ktime_get();
157 	vgpu_update_timeslice(scheduler->current_vgpu, cur_time);
158 	vgpu_data = scheduler->next_vgpu->sched_data;
159 	vgpu_data->sched_in_time = cur_time;
160 
161 	/* switch current vgpu */
162 	scheduler->current_vgpu = scheduler->next_vgpu;
163 	scheduler->next_vgpu = NULL;
164 
165 	scheduler->need_reschedule = false;
166 
167 	/* wake up workload dispatch thread */
168 	for_each_engine(engine, gvt->dev_priv, i)
169 		wake_up(&scheduler->waitq[i]);
170 }
171 
172 static struct intel_vgpu *find_busy_vgpu(struct gvt_sched_data *sched_data)
173 {
174 	struct vgpu_sched_data *vgpu_data;
175 	struct intel_vgpu *vgpu = NULL;
176 	struct list_head *head = &sched_data->lru_runq_head;
177 	struct list_head *pos;
178 
179 	/* search a vgpu with pending workload */
180 	list_for_each(pos, head) {
181 
182 		vgpu_data = container_of(pos, struct vgpu_sched_data, lru_list);
183 		if (!vgpu_has_pending_workload(vgpu_data->vgpu))
184 			continue;
185 
186 		/* Return the vGPU only if it has time slice left */
187 		if (vgpu_data->left_ts > 0) {
188 			vgpu = vgpu_data->vgpu;
189 			break;
190 		}
191 	}
192 
193 	return vgpu;
194 }
195 
196 /* in nanosecond */
197 #define GVT_DEFAULT_TIME_SLICE 1000000
198 
199 static void tbs_sched_func(struct gvt_sched_data *sched_data)
200 {
201 	struct intel_gvt *gvt = sched_data->gvt;
202 	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
203 	struct vgpu_sched_data *vgpu_data;
204 	struct intel_vgpu *vgpu = NULL;
205 	/* no active vgpu or has already had a target */
206 	if (list_empty(&sched_data->lru_runq_head) || scheduler->next_vgpu)
207 		goto out;
208 
209 	vgpu = find_busy_vgpu(sched_data);
210 	if (vgpu) {
211 		scheduler->next_vgpu = vgpu;
212 
213 		/* Move the last used vGPU to the tail of lru_list */
214 		vgpu_data = vgpu->sched_data;
215 		list_del_init(&vgpu_data->lru_list);
216 		list_add_tail(&vgpu_data->lru_list,
217 				&sched_data->lru_runq_head);
218 	} else {
219 		scheduler->next_vgpu = gvt->idle_vgpu;
220 	}
221 out:
222 	if (scheduler->next_vgpu)
223 		try_to_schedule_next_vgpu(gvt);
224 }
225 
226 void intel_gvt_schedule(struct intel_gvt *gvt)
227 {
228 	struct gvt_sched_data *sched_data = gvt->scheduler.sched_data;
229 	ktime_t cur_time;
230 
231 	mutex_lock(&gvt->lock);
232 	cur_time = ktime_get();
233 
234 	if (test_and_clear_bit(INTEL_GVT_REQUEST_SCHED,
235 				(void *)&gvt->service_request)) {
236 		if (cur_time >= sched_data->expire_time) {
237 			gvt_balance_timeslice(sched_data);
238 			sched_data->expire_time = ktime_add_ms(
239 				cur_time, GVT_TS_BALANCE_PERIOD_MS);
240 		}
241 	}
242 	clear_bit(INTEL_GVT_REQUEST_EVENT_SCHED, (void *)&gvt->service_request);
243 
244 	vgpu_update_timeslice(gvt->scheduler.current_vgpu, cur_time);
245 	tbs_sched_func(sched_data);
246 
247 	mutex_unlock(&gvt->lock);
248 }
249 
250 static enum hrtimer_restart tbs_timer_fn(struct hrtimer *timer_data)
251 {
252 	struct gvt_sched_data *data;
253 
254 	data = container_of(timer_data, struct gvt_sched_data, timer);
255 
256 	intel_gvt_request_service(data->gvt, INTEL_GVT_REQUEST_SCHED);
257 
258 	hrtimer_add_expires_ns(&data->timer, data->period);
259 
260 	return HRTIMER_RESTART;
261 }
262 
263 static int tbs_sched_init(struct intel_gvt *gvt)
264 {
265 	struct intel_gvt_workload_scheduler *scheduler =
266 		&gvt->scheduler;
267 
268 	struct gvt_sched_data *data;
269 
270 	data = kzalloc(sizeof(*data), GFP_KERNEL);
271 	if (!data)
272 		return -ENOMEM;
273 
274 	INIT_LIST_HEAD(&data->lru_runq_head);
275 	hrtimer_init(&data->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
276 	data->timer.function = tbs_timer_fn;
277 	data->period = GVT_DEFAULT_TIME_SLICE;
278 	data->gvt = gvt;
279 
280 	scheduler->sched_data = data;
281 
282 	return 0;
283 }
284 
285 static void tbs_sched_clean(struct intel_gvt *gvt)
286 {
287 	struct intel_gvt_workload_scheduler *scheduler =
288 		&gvt->scheduler;
289 	struct gvt_sched_data *data = scheduler->sched_data;
290 
291 	hrtimer_cancel(&data->timer);
292 
293 	kfree(data);
294 	scheduler->sched_data = NULL;
295 }
296 
297 static int tbs_sched_init_vgpu(struct intel_vgpu *vgpu)
298 {
299 	struct vgpu_sched_data *data;
300 
301 	data = kzalloc(sizeof(*data), GFP_KERNEL);
302 	if (!data)
303 		return -ENOMEM;
304 
305 	data->sched_ctl.weight = vgpu->sched_ctl.weight;
306 	data->vgpu = vgpu;
307 	INIT_LIST_HEAD(&data->lru_list);
308 
309 	vgpu->sched_data = data;
310 
311 	return 0;
312 }
313 
314 static void tbs_sched_clean_vgpu(struct intel_vgpu *vgpu)
315 {
316 	struct intel_gvt *gvt = vgpu->gvt;
317 	struct gvt_sched_data *sched_data = gvt->scheduler.sched_data;
318 
319 	kfree(vgpu->sched_data);
320 	vgpu->sched_data = NULL;
321 
322 	/* this vgpu id has been removed */
323 	if (idr_is_empty(&gvt->vgpu_idr))
324 		hrtimer_cancel(&sched_data->timer);
325 }
326 
327 static void tbs_sched_start_schedule(struct intel_vgpu *vgpu)
328 {
329 	struct gvt_sched_data *sched_data = vgpu->gvt->scheduler.sched_data;
330 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
331 
332 	if (!list_empty(&vgpu_data->lru_list))
333 		return;
334 
335 	list_add_tail(&vgpu_data->lru_list, &sched_data->lru_runq_head);
336 
337 	if (!hrtimer_active(&sched_data->timer))
338 		hrtimer_start(&sched_data->timer, ktime_add_ns(ktime_get(),
339 			sched_data->period), HRTIMER_MODE_ABS);
340 	vgpu_data->active = true;
341 }
342 
343 static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu)
344 {
345 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
346 
347 	list_del_init(&vgpu_data->lru_list);
348 	vgpu_data->active = false;
349 }
350 
351 static struct intel_gvt_sched_policy_ops tbs_schedule_ops = {
352 	.init = tbs_sched_init,
353 	.clean = tbs_sched_clean,
354 	.init_vgpu = tbs_sched_init_vgpu,
355 	.clean_vgpu = tbs_sched_clean_vgpu,
356 	.start_schedule = tbs_sched_start_schedule,
357 	.stop_schedule = tbs_sched_stop_schedule,
358 };
359 
360 int intel_gvt_init_sched_policy(struct intel_gvt *gvt)
361 {
362 	gvt->scheduler.sched_ops = &tbs_schedule_ops;
363 
364 	return gvt->scheduler.sched_ops->init(gvt);
365 }
366 
367 void intel_gvt_clean_sched_policy(struct intel_gvt *gvt)
368 {
369 	gvt->scheduler.sched_ops->clean(gvt);
370 }
371 
372 int intel_vgpu_init_sched_policy(struct intel_vgpu *vgpu)
373 {
374 	return vgpu->gvt->scheduler.sched_ops->init_vgpu(vgpu);
375 }
376 
377 void intel_vgpu_clean_sched_policy(struct intel_vgpu *vgpu)
378 {
379 	vgpu->gvt->scheduler.sched_ops->clean_vgpu(vgpu);
380 }
381 
382 void intel_vgpu_start_schedule(struct intel_vgpu *vgpu)
383 {
384 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
385 
386 	if (!vgpu_data->active) {
387 		gvt_dbg_core("vgpu%d: start schedule\n", vgpu->id);
388 		vgpu->gvt->scheduler.sched_ops->start_schedule(vgpu);
389 	}
390 }
391 
392 void intel_gvt_kick_schedule(struct intel_gvt *gvt)
393 {
394 	intel_gvt_request_service(gvt, INTEL_GVT_REQUEST_EVENT_SCHED);
395 }
396 
397 void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu)
398 {
399 	struct intel_gvt_workload_scheduler *scheduler =
400 		&vgpu->gvt->scheduler;
401 	int ring_id;
402 	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
403 
404 	if (!vgpu_data->active)
405 		return;
406 
407 	gvt_dbg_core("vgpu%d: stop schedule\n", vgpu->id);
408 
409 	scheduler->sched_ops->stop_schedule(vgpu);
410 
411 	if (scheduler->next_vgpu == vgpu)
412 		scheduler->next_vgpu = NULL;
413 
414 	if (scheduler->current_vgpu == vgpu) {
415 		/* stop workload dispatching */
416 		scheduler->need_reschedule = true;
417 		scheduler->current_vgpu = NULL;
418 	}
419 
420 	spin_lock_bh(&scheduler->mmio_context_lock);
421 	for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) {
422 		if (scheduler->engine_owner[ring_id] == vgpu) {
423 			intel_gvt_switch_mmio(vgpu, NULL, ring_id);
424 			scheduler->engine_owner[ring_id] = NULL;
425 		}
426 	}
427 	spin_unlock_bh(&scheduler->mmio_context_lock);
428 }
429