1 /* 2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #include <linux/acpi.h> 25 #include "i915_drv.h" 26 #include "gvt.h" 27 28 /* 29 * Note: Only for GVT-g virtual VBT generation, other usage must 30 * not do like this. 31 */ 32 #define _INTEL_BIOS_PRIVATE 33 #include "intel_vbt_defs.h" 34 35 #define OPREGION_SIGNATURE "IntelGraphicsMem" 36 #define MBOX_VBT (1<<3) 37 38 /* device handle */ 39 #define DEVICE_TYPE_CRT 0x01 40 #define DEVICE_TYPE_EFP1 0x04 41 #define DEVICE_TYPE_EFP2 0x40 42 #define DEVICE_TYPE_EFP3 0x20 43 #define DEVICE_TYPE_EFP4 0x10 44 45 #define DEV_SIZE 38 46 47 struct opregion_header { 48 u8 signature[16]; 49 u32 size; 50 u32 opregion_ver; 51 u8 bios_ver[32]; 52 u8 vbios_ver[16]; 53 u8 driver_ver[16]; 54 u32 mboxes; 55 u32 driver_model; 56 u32 pcon; 57 u8 dver[32]; 58 u8 rsvd[124]; 59 } __packed; 60 61 struct bdb_data_header { 62 u8 id; 63 u16 size; /* data size */ 64 } __packed; 65 66 struct efp_child_device_config { 67 u16 handle; 68 u16 device_type; 69 u16 device_class; 70 u8 i2c_speed; 71 u8 dp_onboard_redriver; /* 158 */ 72 u8 dp_ondock_redriver; /* 158 */ 73 u8 hdmi_level_shifter_value:4; /* 169 */ 74 u8 hdmi_max_data_rate:4; /* 204 */ 75 u16 dtd_buf_ptr; /* 161 */ 76 u8 edidless_efp:1; /* 161 */ 77 u8 compression_enable:1; /* 198 */ 78 u8 compression_method:1; /* 198 */ 79 u8 ganged_edp:1; /* 202 */ 80 u8 skip0:4; 81 u8 compression_structure_index:4; /* 198 */ 82 u8 skip1:4; 83 u8 slave_port; /* 202 */ 84 u8 skip2; 85 u8 dvo_port; 86 u8 i2c_pin; /* for add-in card */ 87 u8 slave_addr; /* for add-in card */ 88 u8 ddc_pin; 89 u16 edid_ptr; 90 u8 dvo_config; 91 u8 efp_docked_port:1; /* 158 */ 92 u8 lane_reversal:1; /* 184 */ 93 u8 onboard_lspcon:1; /* 192 */ 94 u8 iboost_enable:1; /* 196 */ 95 u8 hpd_invert:1; /* BXT 196 */ 96 u8 slip3:3; 97 u8 hdmi_compat:1; 98 u8 dp_compat:1; 99 u8 tmds_compat:1; 100 u8 skip4:5; 101 u8 aux_channel; 102 u8 dongle_detect; 103 u8 pipe_cap:2; 104 u8 sdvo_stall:1; /* 158 */ 105 u8 hpd_status:2; 106 u8 integrated_encoder:1; 107 u8 skip5:2; 108 u8 dvo_wiring; 109 u8 mipi_bridge_type; /* 171 */ 110 u16 device_class_ext; 111 u8 dvo_function; 112 u8 dp_usb_type_c:1; /* 195 */ 113 u8 skip6:7; 114 u8 dp_usb_type_c_2x_gpio_index; /* 195 */ 115 u16 dp_usb_type_c_2x_gpio_pin; /* 195 */ 116 u8 iboost_dp:4; /* 196 */ 117 u8 iboost_hdmi:4; /* 196 */ 118 } __packed; 119 120 struct vbt { 121 /* header->bdb_offset point to bdb_header offset */ 122 struct vbt_header header; 123 struct bdb_header bdb_header; 124 125 struct bdb_data_header general_features_header; 126 struct bdb_general_features general_features; 127 128 struct bdb_data_header general_definitions_header; 129 struct bdb_general_definitions general_definitions; 130 131 struct efp_child_device_config child0; 132 struct efp_child_device_config child1; 133 struct efp_child_device_config child2; 134 struct efp_child_device_config child3; 135 136 struct bdb_data_header driver_features_header; 137 struct bdb_driver_features driver_features; 138 }; 139 140 static void virt_vbt_generation(struct vbt *v) 141 { 142 int num_child; 143 144 memset(v, 0, sizeof(struct vbt)); 145 146 v->header.signature[0] = '$'; 147 v->header.signature[1] = 'V'; 148 v->header.signature[2] = 'B'; 149 v->header.signature[3] = 'T'; 150 151 /* there's features depending on version! */ 152 v->header.version = 155; 153 v->header.header_size = sizeof(v->header); 154 v->header.vbt_size = sizeof(struct vbt) - sizeof(v->header); 155 v->header.bdb_offset = offsetof(struct vbt, bdb_header); 156 157 strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK"); 158 v->bdb_header.version = 186; /* child_dev_size = 38 */ 159 v->bdb_header.header_size = sizeof(v->bdb_header); 160 161 v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header) 162 - sizeof(struct bdb_header); 163 164 /* general features */ 165 v->general_features_header.id = BDB_GENERAL_FEATURES; 166 v->general_features_header.size = sizeof(struct bdb_general_features); 167 v->general_features.int_crt_support = 0; 168 v->general_features.int_tv_support = 0; 169 170 /* child device */ 171 num_child = 4; /* each port has one child */ 172 v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS; 173 /* size will include child devices */ 174 v->general_definitions_header.size = 175 sizeof(struct bdb_general_definitions) + num_child * DEV_SIZE; 176 v->general_definitions.child_dev_size = DEV_SIZE; 177 178 /* portA */ 179 v->child0.handle = DEVICE_TYPE_EFP1; 180 v->child0.device_type = DEVICE_TYPE_DP; 181 v->child0.dvo_port = DVO_PORT_DPA; 182 v->child0.aux_channel = DP_AUX_A; 183 v->child0.dp_compat = true; 184 v->child0.integrated_encoder = true; 185 186 /* portB */ 187 v->child1.handle = DEVICE_TYPE_EFP2; 188 v->child1.device_type = DEVICE_TYPE_DP; 189 v->child1.dvo_port = DVO_PORT_DPB; 190 v->child1.aux_channel = DP_AUX_B; 191 v->child1.dp_compat = true; 192 v->child1.integrated_encoder = true; 193 194 /* portC */ 195 v->child2.handle = DEVICE_TYPE_EFP3; 196 v->child2.device_type = DEVICE_TYPE_DP; 197 v->child2.dvo_port = DVO_PORT_DPC; 198 v->child2.aux_channel = DP_AUX_C; 199 v->child2.dp_compat = true; 200 v->child2.integrated_encoder = true; 201 202 /* portD */ 203 v->child3.handle = DEVICE_TYPE_EFP4; 204 v->child3.device_type = DEVICE_TYPE_DP; 205 v->child3.dvo_port = DVO_PORT_DPD; 206 v->child3.aux_channel = DP_AUX_D; 207 v->child3.dp_compat = true; 208 v->child3.integrated_encoder = true; 209 210 /* driver features */ 211 v->driver_features_header.id = BDB_DRIVER_FEATURES; 212 v->driver_features_header.size = sizeof(struct bdb_driver_features); 213 v->driver_features.lvds_config = BDB_DRIVER_FEATURE_NO_LVDS; 214 } 215 216 static int alloc_and_init_virt_opregion(struct intel_vgpu *vgpu) 217 { 218 u8 *buf; 219 struct opregion_header *header; 220 struct vbt v; 221 const char opregion_signature[16] = OPREGION_SIGNATURE; 222 223 gvt_dbg_core("init vgpu%d opregion\n", vgpu->id); 224 vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL | 225 __GFP_ZERO, 226 get_order(INTEL_GVT_OPREGION_SIZE)); 227 if (!vgpu_opregion(vgpu)->va) { 228 gvt_err("fail to get memory for vgpu virt opregion\n"); 229 return -ENOMEM; 230 } 231 232 /* emulated opregion with VBT mailbox only */ 233 buf = (u8 *)vgpu_opregion(vgpu)->va; 234 header = (struct opregion_header *)buf; 235 memcpy(header->signature, opregion_signature, 236 sizeof(opregion_signature)); 237 header->size = 0x8; 238 header->opregion_ver = 0x02000000; 239 header->mboxes = MBOX_VBT; 240 241 /* for unknown reason, the value in LID field is incorrect 242 * which block the windows guest, so workaround it by force 243 * setting it to "OPEN" 244 */ 245 buf[INTEL_GVT_OPREGION_CLID] = 0x3; 246 247 /* emulated vbt from virt vbt generation */ 248 virt_vbt_generation(&v); 249 memcpy(buf + INTEL_GVT_OPREGION_VBT_OFFSET, &v, sizeof(struct vbt)); 250 251 return 0; 252 } 253 254 static int init_vgpu_opregion(struct intel_vgpu *vgpu, u32 gpa) 255 { 256 int i, ret; 257 258 if (WARN((vgpu_opregion(vgpu)->va), 259 "vgpu%d: opregion has been initialized already.\n", 260 vgpu->id)) 261 return -EINVAL; 262 263 ret = alloc_and_init_virt_opregion(vgpu); 264 if (ret < 0) 265 return ret; 266 267 for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++) 268 vgpu_opregion(vgpu)->gfn[i] = (gpa >> PAGE_SHIFT) + i; 269 270 return 0; 271 } 272 273 static int map_vgpu_opregion(struct intel_vgpu *vgpu, bool map) 274 { 275 u64 mfn; 276 int i, ret; 277 278 for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++) { 279 mfn = intel_gvt_hypervisor_virt_to_mfn(vgpu_opregion(vgpu)->va 280 + i * PAGE_SIZE); 281 if (mfn == INTEL_GVT_INVALID_ADDR) { 282 gvt_vgpu_err("fail to get MFN from VA\n"); 283 return -EINVAL; 284 } 285 ret = intel_gvt_hypervisor_map_gfn_to_mfn(vgpu, 286 vgpu_opregion(vgpu)->gfn[i], 287 mfn, 1, map); 288 if (ret) { 289 gvt_vgpu_err("fail to map GFN to MFN, errno: %d\n", 290 ret); 291 return ret; 292 } 293 } 294 return 0; 295 } 296 297 /** 298 * intel_vgpu_clean_opregion - clean the stuff used to emulate opregion 299 * @vgpu: a vGPU 300 * 301 */ 302 void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu) 303 { 304 gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id); 305 306 if (!vgpu_opregion(vgpu)->va) 307 return; 308 309 if (intel_gvt_host.hypervisor_type == INTEL_GVT_HYPERVISOR_XEN) { 310 map_vgpu_opregion(vgpu, false); 311 free_pages((unsigned long)vgpu_opregion(vgpu)->va, 312 get_order(INTEL_GVT_OPREGION_SIZE)); 313 314 vgpu_opregion(vgpu)->va = NULL; 315 } 316 } 317 318 /** 319 * intel_vgpu_init_opregion - initialize the stuff used to emulate opregion 320 * @vgpu: a vGPU 321 * @gpa: guest physical address of opregion 322 * 323 * Returns: 324 * Zero on success, negative error code if failed. 325 */ 326 int intel_vgpu_init_opregion(struct intel_vgpu *vgpu, u32 gpa) 327 { 328 int ret; 329 330 gvt_dbg_core("vgpu%d: init vgpu opregion\n", vgpu->id); 331 332 if (intel_gvt_host.hypervisor_type == INTEL_GVT_HYPERVISOR_XEN) { 333 gvt_dbg_core("emulate opregion from kernel\n"); 334 335 ret = init_vgpu_opregion(vgpu, gpa); 336 if (ret) 337 return ret; 338 339 ret = map_vgpu_opregion(vgpu, true); 340 if (ret) 341 return ret; 342 } 343 344 return 0; 345 } 346 347 #define GVT_OPREGION_FUNC(scic) \ 348 ({ \ 349 u32 __ret; \ 350 __ret = (scic & OPREGION_SCIC_FUNC_MASK) >> \ 351 OPREGION_SCIC_FUNC_SHIFT; \ 352 __ret; \ 353 }) 354 355 #define GVT_OPREGION_SUBFUNC(scic) \ 356 ({ \ 357 u32 __ret; \ 358 __ret = (scic & OPREGION_SCIC_SUBFUNC_MASK) >> \ 359 OPREGION_SCIC_SUBFUNC_SHIFT; \ 360 __ret; \ 361 }) 362 363 static const char *opregion_func_name(u32 func) 364 { 365 const char *name = NULL; 366 367 switch (func) { 368 case 0 ... 3: 369 case 5: 370 case 7 ... 15: 371 name = "Reserved"; 372 break; 373 374 case 4: 375 name = "Get BIOS Data"; 376 break; 377 378 case 6: 379 name = "System BIOS Callbacks"; 380 break; 381 382 default: 383 name = "Unknown"; 384 break; 385 } 386 return name; 387 } 388 389 static const char *opregion_subfunc_name(u32 subfunc) 390 { 391 const char *name = NULL; 392 393 switch (subfunc) { 394 case 0: 395 name = "Supported Calls"; 396 break; 397 398 case 1: 399 name = "Requested Callbacks"; 400 break; 401 402 case 2 ... 3: 403 case 8 ... 9: 404 name = "Reserved"; 405 break; 406 407 case 5: 408 name = "Boot Display"; 409 break; 410 411 case 6: 412 name = "TV-Standard/Video-Connector"; 413 break; 414 415 case 7: 416 name = "Internal Graphics"; 417 break; 418 419 case 10: 420 name = "Spread Spectrum Clocks"; 421 break; 422 423 case 11: 424 name = "Get AKSV"; 425 break; 426 427 default: 428 name = "Unknown"; 429 break; 430 } 431 return name; 432 }; 433 434 static bool querying_capabilities(u32 scic) 435 { 436 u32 func, subfunc; 437 438 func = GVT_OPREGION_FUNC(scic); 439 subfunc = GVT_OPREGION_SUBFUNC(scic); 440 441 if ((func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA && 442 subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS) 443 || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA && 444 subfunc == INTEL_GVT_OPREGION_SCIC_SF_REQEUSTEDCALLBACKS) 445 || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSCALLBACKS && 446 subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)) { 447 return true; 448 } 449 return false; 450 } 451 452 /** 453 * intel_vgpu_emulate_opregion_request - emulating OpRegion request 454 * @vgpu: a vGPU 455 * @swsci: SWSCI request 456 * 457 * Returns: 458 * Zero on success, negative error code if failed 459 */ 460 int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci) 461 { 462 u32 *scic, *parm; 463 u32 func, subfunc; 464 465 scic = vgpu_opregion(vgpu)->va + INTEL_GVT_OPREGION_SCIC; 466 parm = vgpu_opregion(vgpu)->va + INTEL_GVT_OPREGION_PARM; 467 468 if (!(swsci & SWSCI_SCI_SELECT)) { 469 gvt_vgpu_err("requesting SMI service\n"); 470 return 0; 471 } 472 /* ignore non 0->1 trasitions */ 473 if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI] 474 & SWSCI_SCI_TRIGGER) || 475 !(swsci & SWSCI_SCI_TRIGGER)) { 476 return 0; 477 } 478 479 func = GVT_OPREGION_FUNC(*scic); 480 subfunc = GVT_OPREGION_SUBFUNC(*scic); 481 if (!querying_capabilities(*scic)) { 482 gvt_vgpu_err("requesting runtime service: func \"%s\"," 483 " subfunc \"%s\"\n", 484 opregion_func_name(func), 485 opregion_subfunc_name(subfunc)); 486 /* 487 * emulate exit status of function call, '0' means 488 * "failure, generic, unsupported or unknown cause" 489 */ 490 *scic &= ~OPREGION_SCIC_EXIT_MASK; 491 return 0; 492 } 493 494 *scic = 0; 495 *parm = 0; 496 return 0; 497 } 498