1 /* 2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Zhi Wang <zhi.a.wang@intel.com> 25 * Zhenyu Wang <zhenyuw@linux.intel.com> 26 * Xiao Zheng <xiao.zheng@intel.com> 27 * 28 * Contributors: 29 * Min He <min.he@intel.com> 30 * Bing Niu <bing.niu@intel.com> 31 * 32 */ 33 34 #ifndef _GVT_GTT_H_ 35 #define _GVT_GTT_H_ 36 37 #define GTT_PAGE_SHIFT 12 38 #define GTT_PAGE_SIZE (1UL << GTT_PAGE_SHIFT) 39 #define GTT_PAGE_MASK (~(GTT_PAGE_SIZE-1)) 40 41 struct intel_vgpu_mm; 42 43 #define INTEL_GVT_GTT_HASH_BITS 8 44 #define INTEL_GVT_INVALID_ADDR (~0UL) 45 46 struct intel_gvt_gtt_entry { 47 u64 val64; 48 int type; 49 }; 50 51 struct intel_gvt_gtt_pte_ops { 52 struct intel_gvt_gtt_entry *(*get_entry)(void *pt, 53 struct intel_gvt_gtt_entry *e, 54 unsigned long index, bool hypervisor_access, unsigned long gpa, 55 struct intel_vgpu *vgpu); 56 struct intel_gvt_gtt_entry *(*set_entry)(void *pt, 57 struct intel_gvt_gtt_entry *e, 58 unsigned long index, bool hypervisor_access, unsigned long gpa, 59 struct intel_vgpu *vgpu); 60 bool (*test_present)(struct intel_gvt_gtt_entry *e); 61 void (*clear_present)(struct intel_gvt_gtt_entry *e); 62 bool (*test_pse)(struct intel_gvt_gtt_entry *e); 63 void (*set_pfn)(struct intel_gvt_gtt_entry *e, unsigned long pfn); 64 unsigned long (*get_pfn)(struct intel_gvt_gtt_entry *e); 65 }; 66 67 struct intel_gvt_gtt_gma_ops { 68 unsigned long (*gma_to_ggtt_pte_index)(unsigned long gma); 69 unsigned long (*gma_to_pte_index)(unsigned long gma); 70 unsigned long (*gma_to_pde_index)(unsigned long gma); 71 unsigned long (*gma_to_l3_pdp_index)(unsigned long gma); 72 unsigned long (*gma_to_l4_pdp_index)(unsigned long gma); 73 unsigned long (*gma_to_pml4_index)(unsigned long gma); 74 }; 75 76 struct intel_gvt_gtt { 77 struct intel_gvt_gtt_pte_ops *pte_ops; 78 struct intel_gvt_gtt_gma_ops *gma_ops; 79 int (*mm_alloc_page_table)(struct intel_vgpu_mm *mm); 80 void (*mm_free_page_table)(struct intel_vgpu_mm *mm); 81 struct list_head oos_page_use_list_head; 82 struct list_head oos_page_free_list_head; 83 struct list_head mm_lru_list_head; 84 85 struct page *scratch_ggtt_page; 86 unsigned long scratch_ggtt_mfn; 87 }; 88 89 enum { 90 INTEL_GVT_MM_GGTT = 0, 91 INTEL_GVT_MM_PPGTT, 92 }; 93 94 typedef enum { 95 GTT_TYPE_INVALID = -1, 96 97 GTT_TYPE_GGTT_PTE, 98 99 GTT_TYPE_PPGTT_PTE_4K_ENTRY, 100 GTT_TYPE_PPGTT_PTE_2M_ENTRY, 101 GTT_TYPE_PPGTT_PTE_1G_ENTRY, 102 103 GTT_TYPE_PPGTT_PTE_ENTRY, 104 105 GTT_TYPE_PPGTT_PDE_ENTRY, 106 GTT_TYPE_PPGTT_PDP_ENTRY, 107 GTT_TYPE_PPGTT_PML4_ENTRY, 108 109 GTT_TYPE_PPGTT_ROOT_ENTRY, 110 111 GTT_TYPE_PPGTT_ROOT_L3_ENTRY, 112 GTT_TYPE_PPGTT_ROOT_L4_ENTRY, 113 114 GTT_TYPE_PPGTT_ENTRY, 115 116 GTT_TYPE_PPGTT_PTE_PT, 117 GTT_TYPE_PPGTT_PDE_PT, 118 GTT_TYPE_PPGTT_PDP_PT, 119 GTT_TYPE_PPGTT_PML4_PT, 120 121 GTT_TYPE_MAX, 122 } intel_gvt_gtt_type_t; 123 124 struct intel_vgpu_mm { 125 int type; 126 bool initialized; 127 bool shadowed; 128 129 int page_table_entry_type; 130 u32 page_table_entry_size; 131 u32 page_table_entry_cnt; 132 void *virtual_page_table; 133 void *shadow_page_table; 134 135 int page_table_level; 136 bool has_shadow_page_table; 137 u32 pde_base_index; 138 139 struct list_head list; 140 struct kref ref; 141 atomic_t pincount; 142 struct list_head lru_list; 143 struct intel_vgpu *vgpu; 144 }; 145 146 extern struct intel_gvt_gtt_entry *intel_vgpu_mm_get_entry( 147 struct intel_vgpu_mm *mm, 148 void *page_table, struct intel_gvt_gtt_entry *e, 149 unsigned long index); 150 151 extern struct intel_gvt_gtt_entry *intel_vgpu_mm_set_entry( 152 struct intel_vgpu_mm *mm, 153 void *page_table, struct intel_gvt_gtt_entry *e, 154 unsigned long index); 155 156 #define ggtt_get_guest_entry(mm, e, index) \ 157 intel_vgpu_mm_get_entry(mm, mm->virtual_page_table, e, index) 158 159 #define ggtt_set_guest_entry(mm, e, index) \ 160 intel_vgpu_mm_set_entry(mm, mm->virtual_page_table, e, index) 161 162 #define ggtt_get_shadow_entry(mm, e, index) \ 163 intel_vgpu_mm_get_entry(mm, mm->shadow_page_table, e, index) 164 165 #define ggtt_set_shadow_entry(mm, e, index) \ 166 intel_vgpu_mm_set_entry(mm, mm->shadow_page_table, e, index) 167 168 #define ppgtt_get_guest_root_entry(mm, e, index) \ 169 intel_vgpu_mm_get_entry(mm, mm->virtual_page_table, e, index) 170 171 #define ppgtt_set_guest_root_entry(mm, e, index) \ 172 intel_vgpu_mm_set_entry(mm, mm->virtual_page_table, e, index) 173 174 #define ppgtt_get_shadow_root_entry(mm, e, index) \ 175 intel_vgpu_mm_get_entry(mm, mm->shadow_page_table, e, index) 176 177 #define ppgtt_set_shadow_root_entry(mm, e, index) \ 178 intel_vgpu_mm_set_entry(mm, mm->shadow_page_table, e, index) 179 180 extern struct intel_vgpu_mm *intel_vgpu_create_mm(struct intel_vgpu *vgpu, 181 int mm_type, void *virtual_page_table, int page_table_level, 182 u32 pde_base_index); 183 extern void intel_vgpu_destroy_mm(struct kref *mm_ref); 184 185 struct intel_vgpu_guest_page; 186 187 struct intel_vgpu_scratch_pt { 188 struct page *page; 189 unsigned long page_mfn; 190 }; 191 192 193 struct intel_vgpu_gtt { 194 struct intel_vgpu_mm *ggtt_mm; 195 unsigned long active_ppgtt_mm_bitmap; 196 struct list_head mm_list_head; 197 DECLARE_HASHTABLE(shadow_page_hash_table, INTEL_GVT_GTT_HASH_BITS); 198 DECLARE_HASHTABLE(guest_page_hash_table, INTEL_GVT_GTT_HASH_BITS); 199 atomic_t n_write_protected_guest_page; 200 struct list_head oos_page_list_head; 201 struct list_head post_shadow_list_head; 202 struct intel_vgpu_scratch_pt scratch_pt[GTT_TYPE_MAX]; 203 204 }; 205 206 extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu); 207 extern void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu); 208 void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu); 209 210 extern int intel_gvt_init_gtt(struct intel_gvt *gvt); 211 extern void intel_vgpu_reset_gtt(struct intel_vgpu *vgpu, bool dmlr); 212 extern void intel_gvt_clean_gtt(struct intel_gvt *gvt); 213 214 extern struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu, 215 int page_table_level, void *root_entry); 216 217 struct intel_vgpu_oos_page; 218 219 struct intel_vgpu_shadow_page { 220 void *vaddr; 221 struct page *page; 222 int type; 223 struct hlist_node node; 224 unsigned long mfn; 225 }; 226 227 struct intel_vgpu_guest_page { 228 struct hlist_node node; 229 bool writeprotection; 230 unsigned long gfn; 231 int (*handler)(void *, u64, void *, int); 232 void *data; 233 unsigned long write_cnt; 234 struct intel_vgpu_oos_page *oos_page; 235 }; 236 237 struct intel_vgpu_oos_page { 238 struct intel_vgpu_guest_page *guest_page; 239 struct list_head list; 240 struct list_head vm_list; 241 int id; 242 unsigned char mem[GTT_PAGE_SIZE]; 243 }; 244 245 #define GTT_ENTRY_NUM_IN_ONE_PAGE 512 246 247 struct intel_vgpu_ppgtt_spt { 248 struct intel_vgpu_shadow_page shadow_page; 249 struct intel_vgpu_guest_page guest_page; 250 int guest_page_type; 251 atomic_t refcount; 252 struct intel_vgpu *vgpu; 253 DECLARE_BITMAP(post_shadow_bitmap, GTT_ENTRY_NUM_IN_ONE_PAGE); 254 struct list_head post_shadow_list; 255 }; 256 257 int intel_vgpu_init_guest_page(struct intel_vgpu *vgpu, 258 struct intel_vgpu_guest_page *guest_page, 259 unsigned long gfn, 260 int (*handler)(void *gp, u64, void *, int), 261 void *data); 262 263 void intel_vgpu_clean_guest_page(struct intel_vgpu *vgpu, 264 struct intel_vgpu_guest_page *guest_page); 265 266 int intel_vgpu_set_guest_page_writeprotection(struct intel_vgpu *vgpu, 267 struct intel_vgpu_guest_page *guest_page); 268 269 void intel_vgpu_clear_guest_page_writeprotection(struct intel_vgpu *vgpu, 270 struct intel_vgpu_guest_page *guest_page); 271 272 struct intel_vgpu_guest_page *intel_vgpu_find_guest_page( 273 struct intel_vgpu *vgpu, unsigned long gfn); 274 275 int intel_vgpu_sync_oos_pages(struct intel_vgpu *vgpu); 276 277 int intel_vgpu_flush_post_shadow(struct intel_vgpu *vgpu); 278 279 static inline void intel_gvt_mm_reference(struct intel_vgpu_mm *mm) 280 { 281 kref_get(&mm->ref); 282 } 283 284 static inline void intel_gvt_mm_unreference(struct intel_vgpu_mm *mm) 285 { 286 kref_put(&mm->ref, intel_vgpu_destroy_mm); 287 } 288 289 int intel_vgpu_pin_mm(struct intel_vgpu_mm *mm); 290 291 void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm); 292 293 unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, 294 unsigned long gma); 295 296 struct intel_vgpu_mm *intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu, 297 int page_table_level, void *root_entry); 298 299 int intel_vgpu_g2v_create_ppgtt_mm(struct intel_vgpu *vgpu, 300 int page_table_level); 301 302 int intel_vgpu_g2v_destroy_ppgtt_mm(struct intel_vgpu *vgpu, 303 int page_table_level); 304 305 int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, 306 unsigned int off, void *p_data, unsigned int bytes); 307 308 int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, 309 unsigned int off, void *p_data, unsigned int bytes); 310 311 #endif /* _GVT_GTT_H_ */ 312