1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016-2019 Intel Corporation 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/firmware.h> 8 #include <linux/highmem.h> 9 10 #include <drm/drm_cache.h> 11 #include <drm/drm_print.h> 12 13 #include "gem/i915_gem_lmem.h" 14 #include "gt/intel_gt_print.h" 15 #include "intel_uc_fw.h" 16 #include "intel_uc_fw_abi.h" 17 #include "i915_drv.h" 18 #include "i915_reg.h" 19 20 static inline struct intel_gt * 21 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type) 22 { 23 GEM_BUG_ON(type >= INTEL_UC_FW_NUM_TYPES); 24 25 switch (type) { 26 case INTEL_UC_FW_TYPE_GUC: 27 return container_of(uc_fw, struct intel_gt, uc.guc.fw); 28 case INTEL_UC_FW_TYPE_HUC: 29 return container_of(uc_fw, struct intel_gt, uc.huc.fw); 30 case INTEL_UC_FW_TYPE_GSC: 31 return container_of(uc_fw, struct intel_gt, uc.gsc.fw); 32 } 33 34 return NULL; 35 } 36 37 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw) 38 { 39 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); 40 return ____uc_fw_to_gt(uc_fw, uc_fw->type); 41 } 42 43 #ifdef CONFIG_DRM_I915_DEBUG_GUC 44 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, 45 enum intel_uc_fw_status status) 46 { 47 uc_fw->__status = status; 48 gt_dbg(__uc_fw_to_gt(uc_fw), "%s firmware -> %s\n", 49 intel_uc_fw_type_repr(uc_fw->type), 50 status == INTEL_UC_FIRMWARE_SELECTED ? 51 uc_fw->file_selected.path : intel_uc_fw_status_repr(status)); 52 } 53 #endif 54 55 /* 56 * List of required GuC and HuC binaries per-platform. 57 * Must be ordered based on platform + revid, from newer to older. 58 * 59 * Note that RKL and ADL-S have the same GuC/HuC device ID's and use the same 60 * firmware as TGL. 61 * 62 * Version numbers: 63 * Originally, the driver required an exact match major/minor/patch furmware 64 * file and only supported that one version for any given platform. However, 65 * the new direction from upstream is to be backwards compatible with all 66 * prior releases and to be as flexible as possible as to what firmware is 67 * loaded. 68 * 69 * For GuC, the major version number signifies a backwards breaking API change. 70 * So, new format GuC firmware files are labelled by their major version only. 71 * For HuC, there is no KMD interaction, hence no version matching requirement. 72 * So, new format HuC firmware files have no version number at all. 73 * 74 * All of which means that the table below must keep all old format files with 75 * full three point version number. But newer files have reduced requirements. 76 * Having said that, the driver still needs to track the minor version number 77 * for GuC at least. As it is useful to report to the user that they are not 78 * running with a recent enough version for all KMD supported features, 79 * security fixes, etc. to be enabled. 80 */ 81 #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ 82 fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ 83 fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ 84 fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ 85 fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ 86 fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ 87 fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ 88 fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ 89 fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ 90 fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ 91 fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ 92 fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ 93 fw_def(ELKHARTLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ 94 fw_def(ICELAKE, 0, guc_mmp(icl, 70, 1, 1)) \ 95 fw_def(COMETLAKE, 5, guc_mmp(cml, 70, 1, 1)) \ 96 fw_def(COMETLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 97 fw_def(COFFEELAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 98 fw_def(GEMINILAKE, 0, guc_mmp(glk, 70, 1, 1)) \ 99 fw_def(KABYLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 100 fw_def(BROXTON, 0, guc_mmp(bxt, 70, 1, 1)) \ 101 fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) 102 103 #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \ 104 fw_def(DG2, 0, huc_gsc(dg2)) \ 105 fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ 106 fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ 107 fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ 108 fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ 109 fw_def(DG1, 0, huc_raw(dg1)) \ 110 fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ 111 fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ 112 fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ 113 fw_def(ELKHARTLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ 114 fw_def(ICELAKE, 0, huc_mmp(icl, 9, 0, 0)) \ 115 fw_def(COMETLAKE, 5, huc_mmp(cml, 4, 0, 0)) \ 116 fw_def(COMETLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 117 fw_def(COFFEELAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 118 fw_def(GEMINILAKE, 0, huc_mmp(glk, 4, 0, 0)) \ 119 fw_def(KABYLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 120 fw_def(BROXTON, 0, huc_mmp(bxt, 2, 0, 0)) \ 121 fw_def(SKYLAKE, 0, huc_mmp(skl, 2, 0, 0)) 122 123 /* 124 * Set of macros for producing a list of filenames from the above table. 125 */ 126 #define __MAKE_UC_FW_PATH_BLANK(prefix_, name_) \ 127 "i915/" \ 128 __stringify(prefix_) "_" name_ ".bin" 129 130 #define __MAKE_UC_FW_PATH_MAJOR(prefix_, name_, major_) \ 131 "i915/" \ 132 __stringify(prefix_) "_" name_ "_" \ 133 __stringify(major_) ".bin" 134 135 #define __MAKE_UC_FW_PATH_MMP(prefix_, name_, major_, minor_, patch_) \ 136 "i915/" \ 137 __stringify(prefix_) "_" name_ "_" \ 138 __stringify(major_) "." \ 139 __stringify(minor_) "." \ 140 __stringify(patch_) ".bin" 141 142 /* Minor for internal driver use, not part of file name */ 143 #define MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_) \ 144 __MAKE_UC_FW_PATH_MAJOR(prefix_, "guc", major_) 145 146 #define MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \ 147 __MAKE_UC_FW_PATH_MMP(prefix_, "guc", major_, minor_, patch_) 148 149 #define MAKE_HUC_FW_PATH_BLANK(prefix_) \ 150 __MAKE_UC_FW_PATH_BLANK(prefix_, "huc") 151 152 #define MAKE_HUC_FW_PATH_GSC(prefix_) \ 153 __MAKE_UC_FW_PATH_BLANK(prefix_, "huc_gsc") 154 155 #define MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \ 156 __MAKE_UC_FW_PATH_MMP(prefix_, "huc", major_, minor_, patch_) 157 158 /* 159 * All blobs need to be declared via MODULE_FIRMWARE(). 160 * This first expansion of the table macros is solely to provide 161 * that declaration. 162 */ 163 #define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \ 164 MODULE_FIRMWARE(uc_); 165 166 INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH_MAJOR, MAKE_GUC_FW_PATH_MMP) 167 INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, MAKE_HUC_FW_PATH_MMP, MAKE_HUC_FW_PATH_GSC) 168 169 /* 170 * The next expansion of the table macros (in __uc_fw_auto_select below) provides 171 * actual data structures with both the filename and the version information. 172 * These structure arrays are then iterated over to the list of suitable files 173 * for the current platform and to then attempt to load those files, in the order 174 * listed, until one is successfully found. 175 */ 176 struct __packed uc_fw_blob { 177 const char *path; 178 bool legacy; 179 u8 major; 180 u8 minor; 181 u8 patch; 182 bool loaded_via_gsc; 183 }; 184 185 #define UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 186 .major = major_, \ 187 .minor = minor_, \ 188 .patch = patch_, \ 189 .path = path_, 190 191 #define UC_FW_BLOB_NEW(major_, minor_, patch_, gsc_, path_) \ 192 { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 193 .legacy = false, .loaded_via_gsc = gsc_ } 194 195 #define UC_FW_BLOB_OLD(major_, minor_, patch_, path_) \ 196 { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 197 .legacy = true } 198 199 #define GUC_FW_BLOB(prefix_, major_, minor_) \ 200 UC_FW_BLOB_NEW(major_, minor_, 0, false, \ 201 MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_)) 202 203 #define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \ 204 UC_FW_BLOB_OLD(major_, minor_, patch_, \ 205 MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_)) 206 207 #define HUC_FW_BLOB(prefix_) \ 208 UC_FW_BLOB_NEW(0, 0, 0, false, MAKE_HUC_FW_PATH_BLANK(prefix_)) 209 210 #define HUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \ 211 UC_FW_BLOB_OLD(major_, minor_, patch_, \ 212 MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_)) 213 214 #define HUC_FW_BLOB_GSC(prefix_) \ 215 UC_FW_BLOB_NEW(0, 0, 0, true, MAKE_HUC_FW_PATH_GSC(prefix_)) 216 217 struct __packed uc_fw_platform_requirement { 218 enum intel_platform p; 219 u8 rev; /* first platform rev using this FW */ 220 const struct uc_fw_blob blob; 221 }; 222 223 #define MAKE_FW_LIST(platform_, revid_, uc_) \ 224 { \ 225 .p = INTEL_##platform_, \ 226 .rev = revid_, \ 227 .blob = uc_, \ 228 }, 229 230 struct fw_blobs_by_type { 231 const struct uc_fw_platform_requirement *blobs; 232 u32 count; 233 }; 234 235 static void 236 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 237 { 238 static const struct uc_fw_platform_requirement blobs_guc[] = { 239 INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, GUC_FW_BLOB_MMP) 240 }; 241 static const struct uc_fw_platform_requirement blobs_huc[] = { 242 INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, HUC_FW_BLOB_MMP, HUC_FW_BLOB_GSC) 243 }; 244 static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = { 245 [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) }, 246 [INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) }, 247 }; 248 static bool verified[INTEL_UC_FW_NUM_TYPES]; 249 const struct uc_fw_platform_requirement *fw_blobs; 250 enum intel_platform p = INTEL_INFO(i915)->platform; 251 u32 fw_count; 252 u8 rev = INTEL_REVID(i915); 253 int i; 254 bool found; 255 256 /* 257 * GSC FW support is still not fully in place, so we're not defining 258 * the FW blob yet because we don't want the driver to attempt to load 259 * it until we're ready for it. 260 */ 261 if (uc_fw->type == INTEL_UC_FW_TYPE_GSC) 262 return; 263 264 /* 265 * The only difference between the ADL GuC FWs is the HWConfig support. 266 * ADL-N does not support HWConfig, so we should use the same binary as 267 * ADL-S, otherwise the GuC might attempt to fetch a config table that 268 * does not exist. 269 */ 270 if (IS_ADLP_N(i915)) 271 p = INTEL_ALDERLAKE_S; 272 273 GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all)); 274 fw_blobs = blobs_all[uc_fw->type].blobs; 275 fw_count = blobs_all[uc_fw->type].count; 276 277 found = false; 278 for (i = 0; i < fw_count && p <= fw_blobs[i].p; i++) { 279 const struct uc_fw_blob *blob = &fw_blobs[i].blob; 280 281 if (p != fw_blobs[i].p) 282 continue; 283 284 if (rev < fw_blobs[i].rev) 285 continue; 286 287 if (uc_fw->file_selected.path) { 288 if (uc_fw->file_selected.path == blob->path) 289 uc_fw->file_selected.path = NULL; 290 291 continue; 292 } 293 294 uc_fw->file_selected.path = blob->path; 295 uc_fw->file_wanted.path = blob->path; 296 uc_fw->file_wanted.ver.major = blob->major; 297 uc_fw->file_wanted.ver.minor = blob->minor; 298 uc_fw->loaded_via_gsc = blob->loaded_via_gsc; 299 found = true; 300 break; 301 } 302 303 if (!found && uc_fw->file_selected.path) { 304 /* Failed to find a match for the last attempt?! */ 305 uc_fw->file_selected.path = NULL; 306 } 307 308 /* make sure the list is ordered as expected */ 309 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST) && !verified[uc_fw->type]) { 310 verified[uc_fw->type] = true; 311 312 for (i = 1; i < fw_count; i++) { 313 /* Next platform is good: */ 314 if (fw_blobs[i].p < fw_blobs[i - 1].p) 315 continue; 316 317 /* Next platform revision is good: */ 318 if (fw_blobs[i].p == fw_blobs[i - 1].p && 319 fw_blobs[i].rev < fw_blobs[i - 1].rev) 320 continue; 321 322 /* Platform/revision must be in order: */ 323 if (fw_blobs[i].p != fw_blobs[i - 1].p || 324 fw_blobs[i].rev != fw_blobs[i - 1].rev) 325 goto bad; 326 327 /* Next major version is good: */ 328 if (fw_blobs[i].blob.major < fw_blobs[i - 1].blob.major) 329 continue; 330 331 /* New must be before legacy: */ 332 if (!fw_blobs[i].blob.legacy && fw_blobs[i - 1].blob.legacy) 333 goto bad; 334 335 /* New to legacy also means 0.0 to X.Y (HuC), or X.0 to X.Y (GuC) */ 336 if (fw_blobs[i].blob.legacy && !fw_blobs[i - 1].blob.legacy) { 337 if (!fw_blobs[i - 1].blob.major) 338 continue; 339 340 if (fw_blobs[i].blob.major == fw_blobs[i - 1].blob.major) 341 continue; 342 } 343 344 /* Major versions must be in order: */ 345 if (fw_blobs[i].blob.major != fw_blobs[i - 1].blob.major) 346 goto bad; 347 348 /* Next minor version is good: */ 349 if (fw_blobs[i].blob.minor < fw_blobs[i - 1].blob.minor) 350 continue; 351 352 /* Minor versions must be in order: */ 353 if (fw_blobs[i].blob.minor != fw_blobs[i - 1].blob.minor) 354 goto bad; 355 356 /* Patch versions must be in order: */ 357 if (fw_blobs[i].blob.patch <= fw_blobs[i - 1].blob.patch) 358 continue; 359 360 bad: 361 drm_err(&i915->drm, "Invalid %s blob order: %s r%u %s%d.%d.%d comes before %s r%u %s%d.%d.%d\n", 362 intel_uc_fw_type_repr(uc_fw->type), 363 intel_platform_name(fw_blobs[i - 1].p), fw_blobs[i - 1].rev, 364 fw_blobs[i - 1].blob.legacy ? "L" : "v", 365 fw_blobs[i - 1].blob.major, 366 fw_blobs[i - 1].blob.minor, 367 fw_blobs[i - 1].blob.patch, 368 intel_platform_name(fw_blobs[i].p), fw_blobs[i].rev, 369 fw_blobs[i].blob.legacy ? "L" : "v", 370 fw_blobs[i].blob.major, 371 fw_blobs[i].blob.minor, 372 fw_blobs[i].blob.patch); 373 374 uc_fw->file_selected.path = NULL; 375 } 376 } 377 } 378 379 static const char *__override_guc_firmware_path(struct drm_i915_private *i915) 380 { 381 if (i915->params.enable_guc & ENABLE_GUC_MASK) 382 return i915->params.guc_firmware_path; 383 return ""; 384 } 385 386 static const char *__override_huc_firmware_path(struct drm_i915_private *i915) 387 { 388 if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC) 389 return i915->params.huc_firmware_path; 390 return ""; 391 } 392 393 static const char *__override_gsc_firmware_path(struct drm_i915_private *i915) 394 { 395 return i915->params.gsc_firmware_path; 396 } 397 398 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 399 { 400 const char *path = NULL; 401 402 switch (uc_fw->type) { 403 case INTEL_UC_FW_TYPE_GUC: 404 path = __override_guc_firmware_path(i915); 405 break; 406 case INTEL_UC_FW_TYPE_HUC: 407 path = __override_huc_firmware_path(i915); 408 break; 409 case INTEL_UC_FW_TYPE_GSC: 410 path = __override_gsc_firmware_path(i915); 411 break; 412 } 413 414 if (unlikely(path)) { 415 uc_fw->file_selected.path = path; 416 uc_fw->user_overridden = true; 417 } 418 } 419 420 /** 421 * intel_uc_fw_init_early - initialize the uC object and select the firmware 422 * @uc_fw: uC firmware 423 * @type: type of uC 424 * 425 * Initialize the state of our uC object and relevant tracking and select the 426 * firmware to fetch and load. 427 */ 428 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, 429 enum intel_uc_fw_type type) 430 { 431 struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915; 432 433 /* 434 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status 435 * before we're looked at the HW caps to see if we have uc support 436 */ 437 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED); 438 GEM_BUG_ON(uc_fw->status); 439 GEM_BUG_ON(uc_fw->file_selected.path); 440 441 uc_fw->type = type; 442 443 if (HAS_GT_UC(i915)) { 444 __uc_fw_auto_select(i915, uc_fw); 445 __uc_fw_user_override(i915, uc_fw); 446 } 447 448 intel_uc_fw_change_status(uc_fw, uc_fw->file_selected.path ? *uc_fw->file_selected.path ? 449 INTEL_UC_FIRMWARE_SELECTED : 450 INTEL_UC_FIRMWARE_DISABLED : 451 INTEL_UC_FIRMWARE_NOT_SUPPORTED); 452 } 453 454 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e) 455 { 456 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 457 bool user = e == -EINVAL; 458 459 if (i915_inject_probe_error(i915, e)) { 460 /* non-existing blob */ 461 uc_fw->file_selected.path = "<invalid>"; 462 uc_fw->user_overridden = user; 463 } else if (i915_inject_probe_error(i915, e)) { 464 /* require next major version */ 465 uc_fw->file_wanted.ver.major += 1; 466 uc_fw->file_wanted.ver.minor = 0; 467 uc_fw->user_overridden = user; 468 } else if (i915_inject_probe_error(i915, e)) { 469 /* require next minor version */ 470 uc_fw->file_wanted.ver.minor += 1; 471 uc_fw->user_overridden = user; 472 } else if (uc_fw->file_wanted.ver.major && 473 i915_inject_probe_error(i915, e)) { 474 /* require prev major version */ 475 uc_fw->file_wanted.ver.major -= 1; 476 uc_fw->file_wanted.ver.minor = 0; 477 uc_fw->user_overridden = user; 478 } else if (uc_fw->file_wanted.ver.minor && 479 i915_inject_probe_error(i915, e)) { 480 /* require prev minor version - hey, this should work! */ 481 uc_fw->file_wanted.ver.minor -= 1; 482 uc_fw->user_overridden = user; 483 } else if (user && i915_inject_probe_error(i915, e)) { 484 /* officially unsupported platform */ 485 uc_fw->file_wanted.ver.major = 0; 486 uc_fw->file_wanted.ver.minor = 0; 487 uc_fw->user_overridden = true; 488 } 489 } 490 491 static int check_gsc_manifest(struct intel_gt *gt, 492 const struct firmware *fw, 493 struct intel_uc_fw *uc_fw) 494 { 495 u32 *dw = (u32 *)fw->data; 496 u32 version_hi, version_lo; 497 size_t min_size; 498 499 /* Check the size of the blob before examining buffer contents */ 500 min_size = sizeof(u32) * (HUC_GSC_VERSION_LO_DW + 1); 501 if (unlikely(fw->size < min_size)) { 502 gt_warn(gt, "%s firmware %s: invalid size: %zu < %zu\n", 503 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 504 fw->size, min_size); 505 return -ENODATA; 506 } 507 508 version_hi = dw[HUC_GSC_VERSION_HI_DW]; 509 version_lo = dw[HUC_GSC_VERSION_LO_DW]; 510 511 uc_fw->file_selected.ver.major = FIELD_GET(HUC_GSC_MAJOR_VER_HI_MASK, version_hi); 512 uc_fw->file_selected.ver.minor = FIELD_GET(HUC_GSC_MINOR_VER_HI_MASK, version_hi); 513 uc_fw->file_selected.ver.patch = FIELD_GET(HUC_GSC_PATCH_VER_LO_MASK, version_lo); 514 515 return 0; 516 } 517 518 static void uc_unpack_css_version(struct intel_uc_fw_ver *ver, u32 css_value) 519 { 520 /* Get version numbers from the CSS header */ 521 ver->major = FIELD_GET(CSS_SW_VERSION_UC_MAJOR, css_value); 522 ver->minor = FIELD_GET(CSS_SW_VERSION_UC_MINOR, css_value); 523 ver->patch = FIELD_GET(CSS_SW_VERSION_UC_PATCH, css_value); 524 } 525 526 static void guc_read_css_info(struct intel_uc_fw *uc_fw, struct uc_css_header *css) 527 { 528 struct intel_guc *guc = container_of(uc_fw, struct intel_guc, fw); 529 530 /* 531 * The GuC firmware includes an extra version number to specify the 532 * submission API level. This allows submission code to work with 533 * multiple GuC versions without having to know the absolute firmware 534 * version number (there are likely to be multiple firmware releases 535 * which all support the same submission API level). 536 * 537 * Note that the spec for the CSS header defines this version number 538 * as 'vf_version' as it was originally intended for virtualisation. 539 * However, it is applicable to native submission as well. 540 * 541 * Unfortunately, due to an oversight, this version number was only 542 * exposed in the CSS header from v70.6.0. 543 */ 544 if (uc_fw->file_selected.ver.major >= 70) { 545 if (uc_fw->file_selected.ver.minor >= 6) { 546 /* v70.6.0 adds CSS header support */ 547 uc_unpack_css_version(&guc->submission_version, css->vf_version); 548 } else if (uc_fw->file_selected.ver.minor >= 3) { 549 /* v70.3.0 introduced v1.1.0 */ 550 guc->submission_version.major = 1; 551 guc->submission_version.minor = 1; 552 guc->submission_version.patch = 0; 553 } else { 554 /* v70.0.0 introduced v1.0.0 */ 555 guc->submission_version.major = 1; 556 guc->submission_version.minor = 0; 557 guc->submission_version.patch = 0; 558 } 559 } else if (uc_fw->file_selected.ver.major >= 69) { 560 /* v69.0.0 introduced v0.10.0 */ 561 guc->submission_version.major = 0; 562 guc->submission_version.minor = 10; 563 guc->submission_version.patch = 0; 564 } else { 565 /* Prior versions were v0.1.0 */ 566 guc->submission_version.major = 0; 567 guc->submission_version.minor = 1; 568 guc->submission_version.patch = 0; 569 } 570 571 uc_fw->private_data_size = css->private_data_size; 572 } 573 574 static int check_ccs_header(struct intel_gt *gt, 575 const struct firmware *fw, 576 struct intel_uc_fw *uc_fw) 577 { 578 struct uc_css_header *css; 579 size_t size; 580 581 /* Check the size of the blob before examining buffer contents */ 582 if (unlikely(fw->size < sizeof(struct uc_css_header))) { 583 gt_warn(gt, "%s firmware %s: invalid size: %zu < %zu\n", 584 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 585 fw->size, sizeof(struct uc_css_header)); 586 return -ENODATA; 587 } 588 589 css = (struct uc_css_header *)fw->data; 590 591 /* Check integrity of size values inside CSS header */ 592 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw - 593 css->exponent_size_dw) * sizeof(u32); 594 if (unlikely(size != sizeof(struct uc_css_header))) { 595 gt_warn(gt, "%s firmware %s: unexpected header size: %zu != %zu\n", 596 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 597 fw->size, sizeof(struct uc_css_header)); 598 return -EPROTO; 599 } 600 601 /* uCode size must calculated from other sizes */ 602 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); 603 604 /* now RSA */ 605 uc_fw->rsa_size = css->key_size_dw * sizeof(u32); 606 607 /* At least, it should have header, uCode and RSA. Size of all three. */ 608 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size; 609 if (unlikely(fw->size < size)) { 610 gt_warn(gt, "%s firmware %s: invalid size: %zu < %zu\n", 611 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 612 fw->size, size); 613 return -ENOEXEC; 614 } 615 616 /* Sanity check whether this fw is not larger than whole WOPCM memory */ 617 size = __intel_uc_fw_get_upload_size(uc_fw); 618 if (unlikely(size >= gt->wopcm.size)) { 619 gt_warn(gt, "%s firmware %s: invalid size: %zu > %zu\n", 620 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 621 size, (size_t)gt->wopcm.size); 622 return -E2BIG; 623 } 624 625 uc_unpack_css_version(&uc_fw->file_selected.ver, css->sw_version); 626 627 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC) 628 guc_read_css_info(uc_fw, css); 629 630 return 0; 631 } 632 633 static bool is_ver_8bit(struct intel_uc_fw_ver *ver) 634 { 635 return ver->major < 0xFF && ver->minor < 0xFF && ver->patch < 0xFF; 636 } 637 638 static bool guc_check_version_range(struct intel_uc_fw *uc_fw) 639 { 640 struct intel_guc *guc = container_of(uc_fw, struct intel_guc, fw); 641 642 /* 643 * GuC version number components are defined as being 8-bits. 644 * The submission code relies on this to optimise version comparison 645 * tests. So enforce the restriction here. 646 */ 647 648 if (!is_ver_8bit(&uc_fw->file_selected.ver)) { 649 gt_warn(__uc_fw_to_gt(uc_fw), "%s firmware: invalid file version: 0x%02X:%02X:%02X\n", 650 intel_uc_fw_type_repr(uc_fw->type), 651 uc_fw->file_selected.ver.major, 652 uc_fw->file_selected.ver.minor, 653 uc_fw->file_selected.ver.patch); 654 return false; 655 } 656 657 if (!is_ver_8bit(&guc->submission_version)) { 658 gt_warn(__uc_fw_to_gt(uc_fw), "%s firmware: invalid submit version: 0x%02X:%02X:%02X\n", 659 intel_uc_fw_type_repr(uc_fw->type), 660 guc->submission_version.major, 661 guc->submission_version.minor, 662 guc->submission_version.patch); 663 return false; 664 } 665 666 return true; 667 } 668 669 static int check_fw_header(struct intel_gt *gt, 670 const struct firmware *fw, 671 struct intel_uc_fw *uc_fw) 672 { 673 int err = 0; 674 675 /* GSC FW version is queried after the FW is loaded */ 676 if (uc_fw->type == INTEL_UC_FW_TYPE_GSC) 677 return 0; 678 679 if (uc_fw->loaded_via_gsc) 680 err = check_gsc_manifest(gt, fw, uc_fw); 681 else 682 err = check_ccs_header(gt, fw, uc_fw); 683 if (err) 684 return err; 685 686 return 0; 687 } 688 689 static int try_firmware_load(struct intel_uc_fw *uc_fw, const struct firmware **fw) 690 { 691 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 692 struct device *dev = gt->i915->drm.dev; 693 int err; 694 695 err = firmware_request_nowarn(fw, uc_fw->file_selected.path, dev); 696 697 if (err) 698 return err; 699 700 if ((*fw)->size > INTEL_UC_RSVD_GGTT_PER_FW) { 701 gt_err(gt, "%s firmware %s: size (%zuKB) exceeds max supported size (%uKB)\n", 702 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 703 (*fw)->size / SZ_1K, INTEL_UC_RSVD_GGTT_PER_FW / SZ_1K); 704 705 /* try to find another blob to load */ 706 release_firmware(*fw); 707 *fw = NULL; 708 return -ENOENT; 709 } 710 711 return 0; 712 } 713 714 /** 715 * intel_uc_fw_fetch - fetch uC firmware 716 * @uc_fw: uC firmware 717 * 718 * Fetch uC firmware into GEM obj. 719 * 720 * Return: 0 on success, a negative errno code on failure. 721 */ 722 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) 723 { 724 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 725 struct drm_i915_private *i915 = gt->i915; 726 struct intel_uc_fw_file file_ideal; 727 struct drm_i915_gem_object *obj; 728 const struct firmware *fw = NULL; 729 bool old_ver = false; 730 int err; 731 732 GEM_BUG_ON(!gt->wopcm.size); 733 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw)); 734 735 err = i915_inject_probe_error(i915, -ENXIO); 736 if (err) 737 goto fail; 738 739 __force_fw_fetch_failures(uc_fw, -EINVAL); 740 __force_fw_fetch_failures(uc_fw, -ESTALE); 741 742 err = try_firmware_load(uc_fw, &fw); 743 memcpy(&file_ideal, &uc_fw->file_wanted, sizeof(file_ideal)); 744 745 /* Any error is terminal if overriding. Don't bother searching for older versions */ 746 if (err && intel_uc_fw_is_overridden(uc_fw)) 747 goto fail; 748 749 while (err == -ENOENT) { 750 old_ver = true; 751 752 __uc_fw_auto_select(i915, uc_fw); 753 if (!uc_fw->file_selected.path) { 754 /* 755 * No more options! But set the path back to something 756 * valid just in case it gets dereferenced. 757 */ 758 uc_fw->file_selected.path = file_ideal.path; 759 760 /* Also, preserve the version that was really wanted */ 761 memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted)); 762 break; 763 } 764 765 err = try_firmware_load(uc_fw, &fw); 766 } 767 768 if (err) 769 goto fail; 770 771 err = check_fw_header(gt, fw, uc_fw); 772 if (err) 773 goto fail; 774 775 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC && !guc_check_version_range(uc_fw)) 776 goto fail; 777 778 if (uc_fw->file_wanted.ver.major && uc_fw->file_selected.ver.major) { 779 /* Check the file's major version was as it claimed */ 780 if (uc_fw->file_selected.ver.major != uc_fw->file_wanted.ver.major) { 781 gt_notice(gt, "%s firmware %s: unexpected version: %u.%u != %u.%u\n", 782 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 783 uc_fw->file_selected.ver.major, uc_fw->file_selected.ver.minor, 784 uc_fw->file_wanted.ver.major, uc_fw->file_wanted.ver.minor); 785 if (!intel_uc_fw_is_overridden(uc_fw)) { 786 err = -ENOEXEC; 787 goto fail; 788 } 789 } else { 790 if (uc_fw->file_selected.ver.minor < uc_fw->file_wanted.ver.minor) 791 old_ver = true; 792 } 793 } 794 795 if (old_ver && uc_fw->file_selected.ver.major) { 796 /* Preserve the version that was really wanted */ 797 memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted)); 798 799 gt_notice(gt, "%s firmware %s (%d.%d) is recommended, but only %s (%d.%d) was found\n", 800 intel_uc_fw_type_repr(uc_fw->type), 801 uc_fw->file_wanted.path, 802 uc_fw->file_wanted.ver.major, uc_fw->file_wanted.ver.minor, 803 uc_fw->file_selected.path, 804 uc_fw->file_selected.ver.major, uc_fw->file_selected.ver.minor); 805 gt_info(gt, "Consider updating your linux-firmware pkg or downloading from %s\n", 806 INTEL_UC_FIRMWARE_URL); 807 } 808 809 if (HAS_LMEM(i915)) { 810 obj = i915_gem_object_create_lmem_from_data(i915, fw->data, fw->size); 811 if (!IS_ERR(obj)) 812 obj->flags |= I915_BO_ALLOC_PM_EARLY; 813 } else { 814 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); 815 } 816 817 if (IS_ERR(obj)) { 818 err = PTR_ERR(obj); 819 goto fail; 820 } 821 822 uc_fw->obj = obj; 823 uc_fw->size = fw->size; 824 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 825 826 release_firmware(fw); 827 return 0; 828 829 fail: 830 intel_uc_fw_change_status(uc_fw, err == -ENOENT ? 831 INTEL_UC_FIRMWARE_MISSING : 832 INTEL_UC_FIRMWARE_ERROR); 833 834 gt_probe_error(gt, "%s firmware %s: fetch failed %pe\n", 835 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, ERR_PTR(err)); 836 gt_info(gt, "%s firmware(s) can be downloaded from %s\n", 837 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL); 838 839 release_firmware(fw); /* OK even if fw is NULL */ 840 return err; 841 } 842 843 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw) 844 { 845 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 846 struct i915_ggtt *ggtt = gt->ggtt; 847 struct drm_mm_node *node = &ggtt->uc_fw; 848 u32 offset = uc_fw->type * INTEL_UC_RSVD_GGTT_PER_FW; 849 850 /* 851 * The media GT shares the GGTT with the root GT, which means that 852 * we need to use different offsets for the binaries on the media GT. 853 * To keep the math simple, we use 8MB for the root tile and 8MB for 854 * the media one. This will need to be updated if we ever have more 855 * than 1 media GT. 856 */ 857 BUILD_BUG_ON(INTEL_UC_FW_NUM_TYPES * INTEL_UC_RSVD_GGTT_PER_FW > SZ_8M); 858 GEM_BUG_ON(gt->type == GT_MEDIA && gt->info.id > 1); 859 if (gt->type == GT_MEDIA) 860 offset += SZ_8M; 861 862 GEM_BUG_ON(!drm_mm_node_allocated(node)); 863 GEM_BUG_ON(upper_32_bits(node->start)); 864 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1)); 865 GEM_BUG_ON(offset + uc_fw->obj->base.size > node->size); 866 GEM_BUG_ON(uc_fw->obj->base.size > INTEL_UC_RSVD_GGTT_PER_FW); 867 868 return lower_32_bits(node->start + offset); 869 } 870 871 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw) 872 { 873 struct drm_i915_gem_object *obj = uc_fw->obj; 874 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 875 struct i915_vma_resource *dummy = &uc_fw->dummy; 876 u32 pte_flags = 0; 877 878 dummy->start = uc_fw_ggtt_offset(uc_fw); 879 dummy->node_size = obj->base.size; 880 dummy->bi.pages = obj->mm.pages; 881 882 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); 883 884 /* uc_fw->obj cache domains were not controlled across suspend */ 885 if (i915_gem_object_has_struct_page(obj)) 886 drm_clflush_sg(dummy->bi.pages); 887 888 if (i915_gem_object_is_lmem(obj)) 889 pte_flags |= PTE_LM; 890 891 if (ggtt->vm.raw_insert_entries) 892 ggtt->vm.raw_insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags); 893 else 894 ggtt->vm.insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags); 895 } 896 897 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw) 898 { 899 struct drm_i915_gem_object *obj = uc_fw->obj; 900 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 901 u64 start = uc_fw_ggtt_offset(uc_fw); 902 903 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); 904 } 905 906 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 907 { 908 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 909 struct intel_uncore *uncore = gt->uncore; 910 u64 offset; 911 int ret; 912 913 ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT); 914 if (ret) 915 return ret; 916 917 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); 918 919 /* Set the source address for the uCode */ 920 offset = uc_fw_ggtt_offset(uc_fw); 921 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000); 922 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); 923 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); 924 925 /* Set the DMA destination */ 926 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset); 927 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); 928 929 /* 930 * Set the transfer size. The header plus uCode will be copied to WOPCM 931 * via DMA, excluding any other components 932 */ 933 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, 934 sizeof(struct uc_css_header) + uc_fw->ucode_size); 935 936 /* Start the DMA */ 937 intel_uncore_write_fw(uncore, DMA_CTRL, 938 _MASKED_BIT_ENABLE(dma_flags | START_DMA)); 939 940 /* Wait for DMA to finish */ 941 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100); 942 if (ret) 943 gt_err(gt, "DMA for %s fw failed, DMA_CTRL=%u\n", 944 intel_uc_fw_type_repr(uc_fw->type), 945 intel_uncore_read_fw(uncore, DMA_CTRL)); 946 947 /* Disable the bits once DMA is over */ 948 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); 949 950 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL); 951 952 return ret; 953 } 954 955 int intel_uc_fw_mark_load_failed(struct intel_uc_fw *uc_fw, int err) 956 { 957 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 958 959 GEM_BUG_ON(!intel_uc_fw_is_loadable(uc_fw)); 960 961 gt_probe_error(gt, "Failed to load %s firmware %s %pe\n", 962 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, ERR_PTR(err)); 963 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_LOAD_FAIL); 964 965 return err; 966 } 967 968 /** 969 * intel_uc_fw_upload - load uC firmware using custom loader 970 * @uc_fw: uC firmware 971 * @dst_offset: destination offset 972 * @dma_flags: flags for flags for dma ctrl 973 * 974 * Loads uC firmware and updates internal flags. 975 * 976 * Return: 0 on success, non-zero on failure. 977 */ 978 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 979 { 980 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 981 int err; 982 983 /* make sure the status was cleared the last time we reset the uc */ 984 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 985 986 err = i915_inject_probe_error(gt->i915, -ENOEXEC); 987 if (err) 988 return err; 989 990 if (!intel_uc_fw_is_loadable(uc_fw)) 991 return -ENOEXEC; 992 993 /* Call custom loader */ 994 uc_fw_bind_ggtt(uc_fw); 995 err = uc_fw_xfer(uc_fw, dst_offset, dma_flags); 996 uc_fw_unbind_ggtt(uc_fw); 997 if (err) 998 goto fail; 999 1000 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); 1001 return 0; 1002 1003 fail: 1004 return intel_uc_fw_mark_load_failed(uc_fw, err); 1005 } 1006 1007 static inline bool uc_fw_need_rsa_in_memory(struct intel_uc_fw *uc_fw) 1008 { 1009 /* 1010 * The HW reads the GuC RSA from memory if the key size is > 256 bytes, 1011 * while it reads it from the 64 RSA registers if it is smaller. 1012 * The HuC RSA is always read from memory. 1013 */ 1014 return uc_fw->type == INTEL_UC_FW_TYPE_HUC || uc_fw->rsa_size > 256; 1015 } 1016 1017 static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw) 1018 { 1019 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 1020 struct i915_vma *vma; 1021 size_t copied; 1022 void *vaddr; 1023 int err; 1024 1025 err = i915_inject_probe_error(gt->i915, -ENXIO); 1026 if (err) 1027 return err; 1028 1029 if (!uc_fw_need_rsa_in_memory(uc_fw)) 1030 return 0; 1031 1032 /* 1033 * uC firmwares will sit above GUC_GGTT_TOP and will not map through 1034 * GGTT. Unfortunately, this means that the GuC HW cannot perform the uC 1035 * authentication from memory, as the RSA offset now falls within the 1036 * GuC inaccessible range. We resort to perma-pinning an additional vma 1037 * within the accessible range that only contains the RSA signature. 1038 * The GuC HW can use this extra pinning to perform the authentication 1039 * since its GGTT offset will be GuC accessible. 1040 */ 1041 GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE); 1042 vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE); 1043 if (IS_ERR(vma)) 1044 return PTR_ERR(vma); 1045 1046 vaddr = i915_gem_object_pin_map_unlocked(vma->obj, 1047 i915_coherent_map_type(gt->i915, vma->obj, true)); 1048 if (IS_ERR(vaddr)) { 1049 i915_vma_unpin_and_release(&vma, 0); 1050 err = PTR_ERR(vaddr); 1051 goto unpin_out; 1052 } 1053 1054 copied = intel_uc_fw_copy_rsa(uc_fw, vaddr, vma->size); 1055 i915_gem_object_unpin_map(vma->obj); 1056 1057 if (copied < uc_fw->rsa_size) { 1058 err = -ENOMEM; 1059 goto unpin_out; 1060 } 1061 1062 uc_fw->rsa_data = vma; 1063 1064 return 0; 1065 1066 unpin_out: 1067 i915_vma_unpin_and_release(&vma, 0); 1068 return err; 1069 } 1070 1071 static void uc_fw_rsa_data_destroy(struct intel_uc_fw *uc_fw) 1072 { 1073 i915_vma_unpin_and_release(&uc_fw->rsa_data, 0); 1074 } 1075 1076 int intel_uc_fw_init(struct intel_uc_fw *uc_fw) 1077 { 1078 int err; 1079 1080 /* this should happen before the load! */ 1081 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 1082 1083 if (!intel_uc_fw_is_available(uc_fw)) 1084 return -ENOEXEC; 1085 1086 err = i915_gem_object_pin_pages_unlocked(uc_fw->obj); 1087 if (err) { 1088 gt_dbg(__uc_fw_to_gt(uc_fw), "%s fw pin-pages failed %pe\n", 1089 intel_uc_fw_type_repr(uc_fw->type), ERR_PTR(err)); 1090 goto out; 1091 } 1092 1093 err = uc_fw_rsa_data_create(uc_fw); 1094 if (err) { 1095 gt_dbg(__uc_fw_to_gt(uc_fw), "%s fw rsa data creation failed %pe\n", 1096 intel_uc_fw_type_repr(uc_fw->type), ERR_PTR(err)); 1097 goto out_unpin; 1098 } 1099 1100 return 0; 1101 1102 out_unpin: 1103 i915_gem_object_unpin_pages(uc_fw->obj); 1104 out: 1105 return err; 1106 } 1107 1108 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) 1109 { 1110 uc_fw_rsa_data_destroy(uc_fw); 1111 1112 if (i915_gem_object_has_pinned_pages(uc_fw->obj)) 1113 i915_gem_object_unpin_pages(uc_fw->obj); 1114 1115 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 1116 } 1117 1118 /** 1119 * intel_uc_fw_cleanup_fetch - cleanup uC firmware 1120 * @uc_fw: uC firmware 1121 * 1122 * Cleans up uC firmware by releasing the firmware GEM obj. 1123 */ 1124 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw) 1125 { 1126 if (!intel_uc_fw_is_available(uc_fw)) 1127 return; 1128 1129 i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); 1130 1131 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED); 1132 } 1133 1134 /** 1135 * intel_uc_fw_copy_rsa - copy fw RSA to buffer 1136 * 1137 * @uc_fw: uC firmware 1138 * @dst: dst buffer 1139 * @max_len: max number of bytes to copy 1140 * 1141 * Return: number of copied bytes. 1142 */ 1143 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len) 1144 { 1145 struct intel_memory_region *mr = uc_fw->obj->mm.region; 1146 u32 size = min_t(u32, uc_fw->rsa_size, max_len); 1147 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size; 1148 struct sgt_iter iter; 1149 size_t count = 0; 1150 int idx; 1151 1152 /* Called during reset handling, must be atomic [no fs_reclaim] */ 1153 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw)); 1154 1155 idx = offset >> PAGE_SHIFT; 1156 offset = offset_in_page(offset); 1157 if (i915_gem_object_has_struct_page(uc_fw->obj)) { 1158 struct page *page; 1159 1160 for_each_sgt_page(page, iter, uc_fw->obj->mm.pages) { 1161 u32 len = min_t(u32, size, PAGE_SIZE - offset); 1162 void *vaddr; 1163 1164 if (idx > 0) { 1165 idx--; 1166 continue; 1167 } 1168 1169 vaddr = kmap_atomic(page); 1170 memcpy(dst, vaddr + offset, len); 1171 kunmap_atomic(vaddr); 1172 1173 offset = 0; 1174 dst += len; 1175 size -= len; 1176 count += len; 1177 if (!size) 1178 break; 1179 } 1180 } else { 1181 dma_addr_t addr; 1182 1183 for_each_sgt_daddr(addr, iter, uc_fw->obj->mm.pages) { 1184 u32 len = min_t(u32, size, PAGE_SIZE - offset); 1185 void __iomem *vaddr; 1186 1187 if (idx > 0) { 1188 idx--; 1189 continue; 1190 } 1191 1192 vaddr = io_mapping_map_atomic_wc(&mr->iomap, 1193 addr - mr->region.start); 1194 memcpy_fromio(dst, vaddr + offset, len); 1195 io_mapping_unmap_atomic(vaddr); 1196 1197 offset = 0; 1198 dst += len; 1199 size -= len; 1200 count += len; 1201 if (!size) 1202 break; 1203 } 1204 } 1205 1206 return count; 1207 } 1208 1209 /** 1210 * intel_uc_fw_dump - dump information about uC firmware 1211 * @uc_fw: uC firmware 1212 * @p: the &drm_printer 1213 * 1214 * Pretty printer for uC firmware. 1215 */ 1216 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p) 1217 { 1218 bool got_wanted; 1219 1220 drm_printf(p, "%s firmware: %s\n", 1221 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path); 1222 if (uc_fw->file_selected.path != uc_fw->file_wanted.path) 1223 drm_printf(p, "%s firmware wanted: %s\n", 1224 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_wanted.path); 1225 drm_printf(p, "\tstatus: %s\n", 1226 intel_uc_fw_status_repr(uc_fw->status)); 1227 1228 if (uc_fw->file_selected.ver.major < uc_fw->file_wanted.ver.major) 1229 got_wanted = false; 1230 else if ((uc_fw->file_selected.ver.major == uc_fw->file_wanted.ver.major) && 1231 (uc_fw->file_selected.ver.minor < uc_fw->file_wanted.ver.minor)) 1232 got_wanted = false; 1233 else if ((uc_fw->file_selected.ver.major == uc_fw->file_wanted.ver.major) && 1234 (uc_fw->file_selected.ver.minor == uc_fw->file_wanted.ver.minor) && 1235 (uc_fw->file_selected.ver.patch < uc_fw->file_wanted.ver.patch)) 1236 got_wanted = false; 1237 else 1238 got_wanted = true; 1239 1240 if (!got_wanted) 1241 drm_printf(p, "\tversion: wanted %u.%u.%u, found %u.%u.%u\n", 1242 uc_fw->file_wanted.ver.major, 1243 uc_fw->file_wanted.ver.minor, 1244 uc_fw->file_wanted.ver.patch, 1245 uc_fw->file_selected.ver.major, 1246 uc_fw->file_selected.ver.minor, 1247 uc_fw->file_selected.ver.patch); 1248 else 1249 drm_printf(p, "\tversion: found %u.%u.%u\n", 1250 uc_fw->file_selected.ver.major, 1251 uc_fw->file_selected.ver.minor, 1252 uc_fw->file_selected.ver.patch); 1253 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); 1254 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); 1255 } 1256