1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016-2019 Intel Corporation 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/firmware.h> 8 #include <linux/highmem.h> 9 10 #include <drm/drm_cache.h> 11 #include <drm/drm_print.h> 12 13 #include "gem/i915_gem_lmem.h" 14 #include "intel_uc_fw.h" 15 #include "intel_uc_fw_abi.h" 16 #include "i915_drv.h" 17 #include "i915_reg.h" 18 19 static inline struct intel_gt * 20 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type) 21 { 22 if (type == INTEL_UC_FW_TYPE_GUC) 23 return container_of(uc_fw, struct intel_gt, uc.guc.fw); 24 25 GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC); 26 return container_of(uc_fw, struct intel_gt, uc.huc.fw); 27 } 28 29 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw) 30 { 31 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); 32 return ____uc_fw_to_gt(uc_fw, uc_fw->type); 33 } 34 35 #ifdef CONFIG_DRM_I915_DEBUG_GUC 36 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, 37 enum intel_uc_fw_status status) 38 { 39 uc_fw->__status = status; 40 drm_dbg(&__uc_fw_to_gt(uc_fw)->i915->drm, 41 "%s firmware -> %s\n", 42 intel_uc_fw_type_repr(uc_fw->type), 43 status == INTEL_UC_FIRMWARE_SELECTED ? 44 uc_fw->file_selected.path : intel_uc_fw_status_repr(status)); 45 } 46 #endif 47 48 /* 49 * List of required GuC and HuC binaries per-platform. 50 * Must be ordered based on platform + revid, from newer to older. 51 * 52 * Note that RKL and ADL-S have the same GuC/HuC device ID's and use the same 53 * firmware as TGL. 54 * 55 * Version numbers: 56 * Originally, the driver required an exact match major/minor/patch furmware 57 * file and only supported that one version for any given platform. However, 58 * the new direction from upstream is to be backwards compatible with all 59 * prior releases and to be as flexible as possible as to what firmware is 60 * loaded. 61 * 62 * For GuC, the major version number signifies a backwards breaking API change. 63 * So, new format GuC firmware files are labelled by their major version only. 64 * For HuC, there is no KMD interaction, hence no version matching requirement. 65 * So, new format HuC firmware files have no version number at all. 66 * 67 * All of which means that the table below must keep all old format files with 68 * full three point version number. But newer files have reduced requirements. 69 * Having said that, the driver still needs to track the minor version number 70 * for GuC at least. As it is useful to report to the user that they are not 71 * running with a recent enough version for all KMD supported features, 72 * security fixes, etc. to be enabled. 73 */ 74 #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ 75 fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ 76 fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ 77 fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ 78 fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ 79 fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ 80 fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ 81 fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ 82 fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ 83 fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ 84 fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ 85 fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ 86 fw_def(ELKHARTLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ 87 fw_def(ICELAKE, 0, guc_mmp(icl, 70, 1, 1)) \ 88 fw_def(COMETLAKE, 5, guc_mmp(cml, 70, 1, 1)) \ 89 fw_def(COMETLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 90 fw_def(COFFEELAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 91 fw_def(GEMINILAKE, 0, guc_mmp(glk, 70, 1, 1)) \ 92 fw_def(KABYLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 93 fw_def(BROXTON, 0, guc_mmp(bxt, 70, 1, 1)) \ 94 fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) 95 96 #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \ 97 fw_def(DG2, 0, huc_gsc(dg2)) \ 98 fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ 99 fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ 100 fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ 101 fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ 102 fw_def(DG1, 0, huc_raw(dg1)) \ 103 fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ 104 fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ 105 fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ 106 fw_def(ELKHARTLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ 107 fw_def(ICELAKE, 0, huc_mmp(icl, 9, 0, 0)) \ 108 fw_def(COMETLAKE, 5, huc_mmp(cml, 4, 0, 0)) \ 109 fw_def(COMETLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 110 fw_def(COFFEELAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 111 fw_def(GEMINILAKE, 0, huc_mmp(glk, 4, 0, 0)) \ 112 fw_def(KABYLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 113 fw_def(BROXTON, 0, huc_mmp(bxt, 2, 0, 0)) \ 114 fw_def(SKYLAKE, 0, huc_mmp(skl, 2, 0, 0)) 115 116 /* 117 * Set of macros for producing a list of filenames from the above table. 118 */ 119 #define __MAKE_UC_FW_PATH_BLANK(prefix_, name_) \ 120 "i915/" \ 121 __stringify(prefix_) "_" name_ ".bin" 122 123 #define __MAKE_UC_FW_PATH_MAJOR(prefix_, name_, major_) \ 124 "i915/" \ 125 __stringify(prefix_) "_" name_ "_" \ 126 __stringify(major_) ".bin" 127 128 #define __MAKE_UC_FW_PATH_MMP(prefix_, name_, major_, minor_, patch_) \ 129 "i915/" \ 130 __stringify(prefix_) "_" name_ "_" \ 131 __stringify(major_) "." \ 132 __stringify(minor_) "." \ 133 __stringify(patch_) ".bin" 134 135 /* Minor for internal driver use, not part of file name */ 136 #define MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_) \ 137 __MAKE_UC_FW_PATH_MAJOR(prefix_, "guc", major_) 138 139 #define MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \ 140 __MAKE_UC_FW_PATH_MMP(prefix_, "guc", major_, minor_, patch_) 141 142 #define MAKE_HUC_FW_PATH_BLANK(prefix_) \ 143 __MAKE_UC_FW_PATH_BLANK(prefix_, "huc") 144 145 #define MAKE_HUC_FW_PATH_GSC(prefix_) \ 146 __MAKE_UC_FW_PATH_BLANK(prefix_, "huc_gsc") 147 148 #define MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \ 149 __MAKE_UC_FW_PATH_MMP(prefix_, "huc", major_, minor_, patch_) 150 151 /* 152 * All blobs need to be declared via MODULE_FIRMWARE(). 153 * This first expansion of the table macros is solely to provide 154 * that declaration. 155 */ 156 #define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \ 157 MODULE_FIRMWARE(uc_); 158 159 INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH_MAJOR, MAKE_GUC_FW_PATH_MMP) 160 INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, MAKE_HUC_FW_PATH_MMP, MAKE_HUC_FW_PATH_GSC) 161 162 /* 163 * The next expansion of the table macros (in __uc_fw_auto_select below) provides 164 * actual data structures with both the filename and the version information. 165 * These structure arrays are then iterated over to the list of suitable files 166 * for the current platform and to then attempt to load those files, in the order 167 * listed, until one is successfully found. 168 */ 169 struct __packed uc_fw_blob { 170 const char *path; 171 bool legacy; 172 u8 major; 173 u8 minor; 174 u8 patch; 175 bool loaded_via_gsc; 176 }; 177 178 #define UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 179 .major = major_, \ 180 .minor = minor_, \ 181 .patch = patch_, \ 182 .path = path_, 183 184 #define UC_FW_BLOB_NEW(major_, minor_, patch_, gsc_, path_) \ 185 { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 186 .legacy = false, .loaded_via_gsc = gsc_ } 187 188 #define UC_FW_BLOB_OLD(major_, minor_, patch_, path_) \ 189 { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 190 .legacy = true } 191 192 #define GUC_FW_BLOB(prefix_, major_, minor_) \ 193 UC_FW_BLOB_NEW(major_, minor_, 0, false, \ 194 MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_)) 195 196 #define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \ 197 UC_FW_BLOB_OLD(major_, minor_, patch_, \ 198 MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_)) 199 200 #define HUC_FW_BLOB(prefix_) \ 201 UC_FW_BLOB_NEW(0, 0, 0, false, MAKE_HUC_FW_PATH_BLANK(prefix_)) 202 203 #define HUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \ 204 UC_FW_BLOB_OLD(major_, minor_, patch_, \ 205 MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_)) 206 207 #define HUC_FW_BLOB_GSC(prefix_) \ 208 UC_FW_BLOB_NEW(0, 0, 0, true, MAKE_HUC_FW_PATH_GSC(prefix_)) 209 210 struct __packed uc_fw_platform_requirement { 211 enum intel_platform p; 212 u8 rev; /* first platform rev using this FW */ 213 const struct uc_fw_blob blob; 214 }; 215 216 #define MAKE_FW_LIST(platform_, revid_, uc_) \ 217 { \ 218 .p = INTEL_##platform_, \ 219 .rev = revid_, \ 220 .blob = uc_, \ 221 }, 222 223 struct fw_blobs_by_type { 224 const struct uc_fw_platform_requirement *blobs; 225 u32 count; 226 }; 227 228 static void 229 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 230 { 231 static const struct uc_fw_platform_requirement blobs_guc[] = { 232 INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, GUC_FW_BLOB_MMP) 233 }; 234 static const struct uc_fw_platform_requirement blobs_huc[] = { 235 INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, HUC_FW_BLOB_MMP, HUC_FW_BLOB_GSC) 236 }; 237 static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = { 238 [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) }, 239 [INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) }, 240 }; 241 static bool verified[INTEL_UC_FW_NUM_TYPES]; 242 const struct uc_fw_platform_requirement *fw_blobs; 243 enum intel_platform p = INTEL_INFO(i915)->platform; 244 u32 fw_count; 245 u8 rev = INTEL_REVID(i915); 246 int i; 247 bool found; 248 249 /* 250 * The only difference between the ADL GuC FWs is the HWConfig support. 251 * ADL-N does not support HWConfig, so we should use the same binary as 252 * ADL-S, otherwise the GuC might attempt to fetch a config table that 253 * does not exist. 254 */ 255 if (IS_ADLP_N(i915)) 256 p = INTEL_ALDERLAKE_S; 257 258 GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all)); 259 fw_blobs = blobs_all[uc_fw->type].blobs; 260 fw_count = blobs_all[uc_fw->type].count; 261 262 found = false; 263 for (i = 0; i < fw_count && p <= fw_blobs[i].p; i++) { 264 const struct uc_fw_blob *blob = &fw_blobs[i].blob; 265 266 if (p != fw_blobs[i].p) 267 continue; 268 269 if (rev < fw_blobs[i].rev) 270 continue; 271 272 if (uc_fw->file_selected.path) { 273 if (uc_fw->file_selected.path == blob->path) 274 uc_fw->file_selected.path = NULL; 275 276 continue; 277 } 278 279 uc_fw->file_selected.path = blob->path; 280 uc_fw->file_wanted.path = blob->path; 281 uc_fw->file_wanted.ver.major = blob->major; 282 uc_fw->file_wanted.ver.minor = blob->minor; 283 uc_fw->loaded_via_gsc = blob->loaded_via_gsc; 284 found = true; 285 break; 286 } 287 288 if (!found && uc_fw->file_selected.path) { 289 /* Failed to find a match for the last attempt?! */ 290 uc_fw->file_selected.path = NULL; 291 } 292 293 /* make sure the list is ordered as expected */ 294 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST) && !verified[uc_fw->type]) { 295 verified[uc_fw->type] = true; 296 297 for (i = 1; i < fw_count; i++) { 298 /* Next platform is good: */ 299 if (fw_blobs[i].p < fw_blobs[i - 1].p) 300 continue; 301 302 /* Next platform revision is good: */ 303 if (fw_blobs[i].p == fw_blobs[i - 1].p && 304 fw_blobs[i].rev < fw_blobs[i - 1].rev) 305 continue; 306 307 /* Platform/revision must be in order: */ 308 if (fw_blobs[i].p != fw_blobs[i - 1].p || 309 fw_blobs[i].rev != fw_blobs[i - 1].rev) 310 goto bad; 311 312 /* Next major version is good: */ 313 if (fw_blobs[i].blob.major < fw_blobs[i - 1].blob.major) 314 continue; 315 316 /* New must be before legacy: */ 317 if (!fw_blobs[i].blob.legacy && fw_blobs[i - 1].blob.legacy) 318 goto bad; 319 320 /* New to legacy also means 0.0 to X.Y (HuC), or X.0 to X.Y (GuC) */ 321 if (fw_blobs[i].blob.legacy && !fw_blobs[i - 1].blob.legacy) { 322 if (!fw_blobs[i - 1].blob.major) 323 continue; 324 325 if (fw_blobs[i].blob.major == fw_blobs[i - 1].blob.major) 326 continue; 327 } 328 329 /* Major versions must be in order: */ 330 if (fw_blobs[i].blob.major != fw_blobs[i - 1].blob.major) 331 goto bad; 332 333 /* Next minor version is good: */ 334 if (fw_blobs[i].blob.minor < fw_blobs[i - 1].blob.minor) 335 continue; 336 337 /* Minor versions must be in order: */ 338 if (fw_blobs[i].blob.minor != fw_blobs[i - 1].blob.minor) 339 goto bad; 340 341 /* Patch versions must be in order: */ 342 if (fw_blobs[i].blob.patch <= fw_blobs[i - 1].blob.patch) 343 continue; 344 345 bad: 346 drm_err(&i915->drm, "Invalid %s blob order: %s r%u %s%d.%d.%d comes before %s r%u %s%d.%d.%d\n", 347 intel_uc_fw_type_repr(uc_fw->type), 348 intel_platform_name(fw_blobs[i - 1].p), fw_blobs[i - 1].rev, 349 fw_blobs[i - 1].blob.legacy ? "L" : "v", 350 fw_blobs[i - 1].blob.major, 351 fw_blobs[i - 1].blob.minor, 352 fw_blobs[i - 1].blob.patch, 353 intel_platform_name(fw_blobs[i].p), fw_blobs[i].rev, 354 fw_blobs[i].blob.legacy ? "L" : "v", 355 fw_blobs[i].blob.major, 356 fw_blobs[i].blob.minor, 357 fw_blobs[i].blob.patch); 358 359 uc_fw->file_selected.path = NULL; 360 } 361 } 362 } 363 364 static const char *__override_guc_firmware_path(struct drm_i915_private *i915) 365 { 366 if (i915->params.enable_guc & ENABLE_GUC_MASK) 367 return i915->params.guc_firmware_path; 368 return ""; 369 } 370 371 static const char *__override_huc_firmware_path(struct drm_i915_private *i915) 372 { 373 if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC) 374 return i915->params.huc_firmware_path; 375 return ""; 376 } 377 378 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 379 { 380 const char *path = NULL; 381 382 switch (uc_fw->type) { 383 case INTEL_UC_FW_TYPE_GUC: 384 path = __override_guc_firmware_path(i915); 385 break; 386 case INTEL_UC_FW_TYPE_HUC: 387 path = __override_huc_firmware_path(i915); 388 break; 389 } 390 391 if (unlikely(path)) { 392 uc_fw->file_selected.path = path; 393 uc_fw->user_overridden = true; 394 } 395 } 396 397 /** 398 * intel_uc_fw_init_early - initialize the uC object and select the firmware 399 * @uc_fw: uC firmware 400 * @type: type of uC 401 * 402 * Initialize the state of our uC object and relevant tracking and select the 403 * firmware to fetch and load. 404 */ 405 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, 406 enum intel_uc_fw_type type) 407 { 408 struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915; 409 410 /* 411 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status 412 * before we're looked at the HW caps to see if we have uc support 413 */ 414 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED); 415 GEM_BUG_ON(uc_fw->status); 416 GEM_BUG_ON(uc_fw->file_selected.path); 417 418 uc_fw->type = type; 419 420 if (HAS_GT_UC(i915)) { 421 __uc_fw_auto_select(i915, uc_fw); 422 __uc_fw_user_override(i915, uc_fw); 423 } 424 425 intel_uc_fw_change_status(uc_fw, uc_fw->file_selected.path ? *uc_fw->file_selected.path ? 426 INTEL_UC_FIRMWARE_SELECTED : 427 INTEL_UC_FIRMWARE_DISABLED : 428 INTEL_UC_FIRMWARE_NOT_SUPPORTED); 429 } 430 431 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e) 432 { 433 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 434 bool user = e == -EINVAL; 435 436 if (i915_inject_probe_error(i915, e)) { 437 /* non-existing blob */ 438 uc_fw->file_selected.path = "<invalid>"; 439 uc_fw->user_overridden = user; 440 } else if (i915_inject_probe_error(i915, e)) { 441 /* require next major version */ 442 uc_fw->file_wanted.ver.major += 1; 443 uc_fw->file_wanted.ver.minor = 0; 444 uc_fw->user_overridden = user; 445 } else if (i915_inject_probe_error(i915, e)) { 446 /* require next minor version */ 447 uc_fw->file_wanted.ver.minor += 1; 448 uc_fw->user_overridden = user; 449 } else if (uc_fw->file_wanted.ver.major && 450 i915_inject_probe_error(i915, e)) { 451 /* require prev major version */ 452 uc_fw->file_wanted.ver.major -= 1; 453 uc_fw->file_wanted.ver.minor = 0; 454 uc_fw->user_overridden = user; 455 } else if (uc_fw->file_wanted.ver.minor && 456 i915_inject_probe_error(i915, e)) { 457 /* require prev minor version - hey, this should work! */ 458 uc_fw->file_wanted.ver.minor -= 1; 459 uc_fw->user_overridden = user; 460 } else if (user && i915_inject_probe_error(i915, e)) { 461 /* officially unsupported platform */ 462 uc_fw->file_wanted.ver.major = 0; 463 uc_fw->file_wanted.ver.minor = 0; 464 uc_fw->user_overridden = true; 465 } 466 } 467 468 static int check_gsc_manifest(const struct firmware *fw, 469 struct intel_uc_fw *uc_fw) 470 { 471 u32 *dw = (u32 *)fw->data; 472 u32 version_hi = dw[HUC_GSC_VERSION_HI_DW]; 473 u32 version_lo = dw[HUC_GSC_VERSION_LO_DW]; 474 475 uc_fw->file_selected.ver.major = FIELD_GET(HUC_GSC_MAJOR_VER_HI_MASK, version_hi); 476 uc_fw->file_selected.ver.minor = FIELD_GET(HUC_GSC_MINOR_VER_HI_MASK, version_hi); 477 uc_fw->file_selected.ver.patch = FIELD_GET(HUC_GSC_PATCH_VER_LO_MASK, version_lo); 478 479 return 0; 480 } 481 482 static void uc_unpack_css_version(struct intel_uc_fw_ver *ver, u32 css_value) 483 { 484 /* Get version numbers from the CSS header */ 485 ver->major = FIELD_GET(CSS_SW_VERSION_UC_MAJOR, css_value); 486 ver->minor = FIELD_GET(CSS_SW_VERSION_UC_MINOR, css_value); 487 ver->patch = FIELD_GET(CSS_SW_VERSION_UC_PATCH, css_value); 488 } 489 490 static void guc_read_css_info(struct intel_uc_fw *uc_fw, struct uc_css_header *css) 491 { 492 struct intel_guc *guc = container_of(uc_fw, struct intel_guc, fw); 493 494 /* 495 * The GuC firmware includes an extra version number to specify the 496 * submission API level. This allows submission code to work with 497 * multiple GuC versions without having to know the absolute firmware 498 * version number (there are likely to be multiple firmware releases 499 * which all support the same submission API level). 500 * 501 * Note that the spec for the CSS header defines this version number 502 * as 'vf_version' as it was originally intended for virtualisation. 503 * However, it is applicable to native submission as well. 504 * 505 * Unfortunately, due to an oversight, this version number was only 506 * exposed in the CSS header from v70.6.0. 507 */ 508 if (uc_fw->file_selected.ver.major >= 70) { 509 if (uc_fw->file_selected.ver.minor >= 6) { 510 /* v70.6.0 adds CSS header support */ 511 uc_unpack_css_version(&guc->submission_version, css->vf_version); 512 } else if (uc_fw->file_selected.ver.minor >= 3) { 513 /* v70.3.0 introduced v1.1.0 */ 514 guc->submission_version.major = 1; 515 guc->submission_version.minor = 1; 516 guc->submission_version.patch = 0; 517 } else { 518 /* v70.0.0 introduced v1.0.0 */ 519 guc->submission_version.major = 1; 520 guc->submission_version.minor = 0; 521 guc->submission_version.patch = 0; 522 } 523 } else if (uc_fw->file_selected.ver.major >= 69) { 524 /* v69.0.0 introduced v0.10.0 */ 525 guc->submission_version.major = 0; 526 guc->submission_version.minor = 10; 527 guc->submission_version.patch = 0; 528 } else { 529 /* Prior versions were v0.1.0 */ 530 guc->submission_version.major = 0; 531 guc->submission_version.minor = 1; 532 guc->submission_version.patch = 0; 533 } 534 535 uc_fw->private_data_size = css->private_data_size; 536 } 537 538 static int check_ccs_header(struct intel_gt *gt, 539 const struct firmware *fw, 540 struct intel_uc_fw *uc_fw) 541 { 542 struct drm_i915_private *i915 = gt->i915; 543 struct uc_css_header *css; 544 size_t size; 545 546 /* Check the size of the blob before examining buffer contents */ 547 if (unlikely(fw->size < sizeof(struct uc_css_header))) { 548 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 549 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 550 fw->size, sizeof(struct uc_css_header)); 551 return -ENODATA; 552 } 553 554 css = (struct uc_css_header *)fw->data; 555 556 /* Check integrity of size values inside CSS header */ 557 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw - 558 css->exponent_size_dw) * sizeof(u32); 559 if (unlikely(size != sizeof(struct uc_css_header))) { 560 drm_warn(&i915->drm, 561 "%s firmware %s: unexpected header size: %zu != %zu\n", 562 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 563 fw->size, sizeof(struct uc_css_header)); 564 return -EPROTO; 565 } 566 567 /* uCode size must calculated from other sizes */ 568 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); 569 570 /* now RSA */ 571 uc_fw->rsa_size = css->key_size_dw * sizeof(u32); 572 573 /* At least, it should have header, uCode and RSA. Size of all three. */ 574 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size; 575 if (unlikely(fw->size < size)) { 576 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 577 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 578 fw->size, size); 579 return -ENOEXEC; 580 } 581 582 /* Sanity check whether this fw is not larger than whole WOPCM memory */ 583 size = __intel_uc_fw_get_upload_size(uc_fw); 584 if (unlikely(size >= gt->wopcm.size)) { 585 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n", 586 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 587 size, (size_t)gt->wopcm.size); 588 return -E2BIG; 589 } 590 591 uc_unpack_css_version(&uc_fw->file_selected.ver, css->sw_version); 592 593 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC) 594 guc_read_css_info(uc_fw, css); 595 596 return 0; 597 } 598 599 static bool is_ver_8bit(struct intel_uc_fw_ver *ver) 600 { 601 return ver->major < 0xFF && ver->minor < 0xFF && ver->patch < 0xFF; 602 } 603 604 static bool guc_check_version_range(struct intel_uc_fw *uc_fw) 605 { 606 struct intel_guc *guc = container_of(uc_fw, struct intel_guc, fw); 607 608 /* 609 * GuC version number components are defined as being 8-bits. 610 * The submission code relies on this to optimise version comparison 611 * tests. So enforce the restriction here. 612 */ 613 614 if (!is_ver_8bit(&uc_fw->file_selected.ver)) { 615 drm_warn(&__uc_fw_to_gt(uc_fw)->i915->drm, "%s firmware: invalid file version: 0x%02X:%02X:%02X\n", 616 intel_uc_fw_type_repr(uc_fw->type), 617 uc_fw->file_selected.ver.major, 618 uc_fw->file_selected.ver.minor, 619 uc_fw->file_selected.ver.patch); 620 return false; 621 } 622 623 if (!is_ver_8bit(&guc->submission_version)) { 624 drm_warn(&__uc_fw_to_gt(uc_fw)->i915->drm, "%s firmware: invalid submit version: 0x%02X:%02X:%02X\n", 625 intel_uc_fw_type_repr(uc_fw->type), 626 guc->submission_version.major, 627 guc->submission_version.minor, 628 guc->submission_version.patch); 629 return false; 630 } 631 632 return true; 633 } 634 635 /** 636 * intel_uc_fw_fetch - fetch uC firmware 637 * @uc_fw: uC firmware 638 * 639 * Fetch uC firmware into GEM obj. 640 * 641 * Return: 0 on success, a negative errno code on failure. 642 */ 643 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) 644 { 645 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 646 struct drm_i915_private *i915 = gt->i915; 647 struct intel_uc_fw_file file_ideal; 648 struct device *dev = i915->drm.dev; 649 struct drm_i915_gem_object *obj; 650 const struct firmware *fw = NULL; 651 bool old_ver = false; 652 int err; 653 654 GEM_BUG_ON(!gt->wopcm.size); 655 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw)); 656 657 err = i915_inject_probe_error(i915, -ENXIO); 658 if (err) 659 goto fail; 660 661 __force_fw_fetch_failures(uc_fw, -EINVAL); 662 __force_fw_fetch_failures(uc_fw, -ESTALE); 663 664 err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev); 665 memcpy(&file_ideal, &uc_fw->file_wanted, sizeof(file_ideal)); 666 667 if (!err && fw->size > INTEL_UC_RSVD_GGTT_PER_FW) { 668 drm_err(&i915->drm, 669 "%s firmware %s: size (%zuKB) exceeds max supported size (%uKB)\n", 670 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 671 fw->size / SZ_1K, INTEL_UC_RSVD_GGTT_PER_FW / SZ_1K); 672 673 /* try to find another blob to load */ 674 release_firmware(fw); 675 err = -ENOENT; 676 } 677 678 /* Any error is terminal if overriding. Don't bother searching for older versions */ 679 if (err && intel_uc_fw_is_overridden(uc_fw)) 680 goto fail; 681 682 while (err == -ENOENT) { 683 old_ver = true; 684 685 __uc_fw_auto_select(i915, uc_fw); 686 if (!uc_fw->file_selected.path) { 687 /* 688 * No more options! But set the path back to something 689 * valid just in case it gets dereferenced. 690 */ 691 uc_fw->file_selected.path = file_ideal.path; 692 693 /* Also, preserve the version that was really wanted */ 694 memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted)); 695 break; 696 } 697 698 err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev); 699 } 700 701 if (err) 702 goto fail; 703 704 if (uc_fw->loaded_via_gsc) 705 err = check_gsc_manifest(fw, uc_fw); 706 else 707 err = check_ccs_header(gt, fw, uc_fw); 708 if (err) 709 goto fail; 710 711 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC && !guc_check_version_range(uc_fw)) 712 goto fail; 713 714 if (uc_fw->file_wanted.ver.major) { 715 /* Check the file's major version was as it claimed */ 716 if (uc_fw->file_selected.ver.major != uc_fw->file_wanted.ver.major) { 717 drm_notice(&i915->drm, "%s firmware %s: unexpected version: %u.%u != %u.%u\n", 718 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 719 uc_fw->file_selected.ver.major, uc_fw->file_selected.ver.minor, 720 uc_fw->file_wanted.ver.major, uc_fw->file_wanted.ver.minor); 721 if (!intel_uc_fw_is_overridden(uc_fw)) { 722 err = -ENOEXEC; 723 goto fail; 724 } 725 } else { 726 if (uc_fw->file_selected.ver.minor < uc_fw->file_wanted.ver.minor) 727 old_ver = true; 728 } 729 } 730 731 if (old_ver) { 732 /* Preserve the version that was really wanted */ 733 memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted)); 734 735 drm_notice(&i915->drm, 736 "%s firmware %s (%d.%d) is recommended, but only %s (%d.%d) was found\n", 737 intel_uc_fw_type_repr(uc_fw->type), 738 uc_fw->file_wanted.path, 739 uc_fw->file_wanted.ver.major, uc_fw->file_wanted.ver.minor, 740 uc_fw->file_selected.path, 741 uc_fw->file_selected.ver.major, uc_fw->file_selected.ver.minor); 742 drm_info(&i915->drm, 743 "Consider updating your linux-firmware pkg or downloading from %s\n", 744 INTEL_UC_FIRMWARE_URL); 745 } 746 747 if (HAS_LMEM(i915)) { 748 obj = i915_gem_object_create_lmem_from_data(i915, fw->data, fw->size); 749 if (!IS_ERR(obj)) 750 obj->flags |= I915_BO_ALLOC_PM_EARLY; 751 } else { 752 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); 753 } 754 755 if (IS_ERR(obj)) { 756 err = PTR_ERR(obj); 757 goto fail; 758 } 759 760 uc_fw->obj = obj; 761 uc_fw->size = fw->size; 762 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 763 764 release_firmware(fw); 765 return 0; 766 767 fail: 768 intel_uc_fw_change_status(uc_fw, err == -ENOENT ? 769 INTEL_UC_FIRMWARE_MISSING : 770 INTEL_UC_FIRMWARE_ERROR); 771 772 i915_probe_error(i915, "%s firmware %s: fetch failed with error %d\n", 773 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, err); 774 drm_info(&i915->drm, "%s firmware(s) can be downloaded from %s\n", 775 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL); 776 777 release_firmware(fw); /* OK even if fw is NULL */ 778 return err; 779 } 780 781 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw) 782 { 783 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 784 struct i915_ggtt *ggtt = gt->ggtt; 785 struct drm_mm_node *node = &ggtt->uc_fw; 786 u32 offset = uc_fw->type * INTEL_UC_RSVD_GGTT_PER_FW; 787 788 /* 789 * The media GT shares the GGTT with the root GT, which means that 790 * we need to use different offsets for the binaries on the media GT. 791 * To keep the math simple, we use 8MB for the root tile and 8MB for 792 * the media one. This will need to be updated if we ever have more 793 * than 1 media GT. 794 */ 795 BUILD_BUG_ON(INTEL_UC_FW_NUM_TYPES * INTEL_UC_RSVD_GGTT_PER_FW > SZ_8M); 796 GEM_BUG_ON(gt->type == GT_MEDIA && gt->info.id > 1); 797 if (gt->type == GT_MEDIA) 798 offset += SZ_8M; 799 800 GEM_BUG_ON(!drm_mm_node_allocated(node)); 801 GEM_BUG_ON(upper_32_bits(node->start)); 802 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1)); 803 GEM_BUG_ON(offset + uc_fw->obj->base.size > node->size); 804 GEM_BUG_ON(uc_fw->obj->base.size > INTEL_UC_RSVD_GGTT_PER_FW); 805 806 return lower_32_bits(node->start + offset); 807 } 808 809 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw) 810 { 811 struct drm_i915_gem_object *obj = uc_fw->obj; 812 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 813 struct i915_vma_resource *dummy = &uc_fw->dummy; 814 u32 pte_flags = 0; 815 816 dummy->start = uc_fw_ggtt_offset(uc_fw); 817 dummy->node_size = obj->base.size; 818 dummy->bi.pages = obj->mm.pages; 819 820 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); 821 822 /* uc_fw->obj cache domains were not controlled across suspend */ 823 if (i915_gem_object_has_struct_page(obj)) 824 drm_clflush_sg(dummy->bi.pages); 825 826 if (i915_gem_object_is_lmem(obj)) 827 pte_flags |= PTE_LM; 828 829 if (ggtt->vm.raw_insert_entries) 830 ggtt->vm.raw_insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags); 831 else 832 ggtt->vm.insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags); 833 } 834 835 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw) 836 { 837 struct drm_i915_gem_object *obj = uc_fw->obj; 838 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 839 u64 start = uc_fw_ggtt_offset(uc_fw); 840 841 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); 842 } 843 844 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 845 { 846 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 847 struct intel_uncore *uncore = gt->uncore; 848 u64 offset; 849 int ret; 850 851 ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT); 852 if (ret) 853 return ret; 854 855 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); 856 857 /* Set the source address for the uCode */ 858 offset = uc_fw_ggtt_offset(uc_fw); 859 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000); 860 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); 861 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); 862 863 /* Set the DMA destination */ 864 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset); 865 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); 866 867 /* 868 * Set the transfer size. The header plus uCode will be copied to WOPCM 869 * via DMA, excluding any other components 870 */ 871 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, 872 sizeof(struct uc_css_header) + uc_fw->ucode_size); 873 874 /* Start the DMA */ 875 intel_uncore_write_fw(uncore, DMA_CTRL, 876 _MASKED_BIT_ENABLE(dma_flags | START_DMA)); 877 878 /* Wait for DMA to finish */ 879 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100); 880 if (ret) 881 drm_err(>->i915->drm, "DMA for %s fw failed, DMA_CTRL=%u\n", 882 intel_uc_fw_type_repr(uc_fw->type), 883 intel_uncore_read_fw(uncore, DMA_CTRL)); 884 885 /* Disable the bits once DMA is over */ 886 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); 887 888 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL); 889 890 return ret; 891 } 892 893 /** 894 * intel_uc_fw_upload - load uC firmware using custom loader 895 * @uc_fw: uC firmware 896 * @dst_offset: destination offset 897 * @dma_flags: flags for flags for dma ctrl 898 * 899 * Loads uC firmware and updates internal flags. 900 * 901 * Return: 0 on success, non-zero on failure. 902 */ 903 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 904 { 905 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 906 int err; 907 908 /* make sure the status was cleared the last time we reset the uc */ 909 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 910 911 err = i915_inject_probe_error(gt->i915, -ENOEXEC); 912 if (err) 913 return err; 914 915 if (!intel_uc_fw_is_loadable(uc_fw)) 916 return -ENOEXEC; 917 918 /* Call custom loader */ 919 uc_fw_bind_ggtt(uc_fw); 920 err = uc_fw_xfer(uc_fw, dst_offset, dma_flags); 921 uc_fw_unbind_ggtt(uc_fw); 922 if (err) 923 goto fail; 924 925 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); 926 return 0; 927 928 fail: 929 i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", 930 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 931 err); 932 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_LOAD_FAIL); 933 return err; 934 } 935 936 static inline bool uc_fw_need_rsa_in_memory(struct intel_uc_fw *uc_fw) 937 { 938 /* 939 * The HW reads the GuC RSA from memory if the key size is > 256 bytes, 940 * while it reads it from the 64 RSA registers if it is smaller. 941 * The HuC RSA is always read from memory. 942 */ 943 return uc_fw->type == INTEL_UC_FW_TYPE_HUC || uc_fw->rsa_size > 256; 944 } 945 946 static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw) 947 { 948 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 949 struct i915_vma *vma; 950 size_t copied; 951 void *vaddr; 952 int err; 953 954 err = i915_inject_probe_error(gt->i915, -ENXIO); 955 if (err) 956 return err; 957 958 if (!uc_fw_need_rsa_in_memory(uc_fw)) 959 return 0; 960 961 /* 962 * uC firmwares will sit above GUC_GGTT_TOP and will not map through 963 * GGTT. Unfortunately, this means that the GuC HW cannot perform the uC 964 * authentication from memory, as the RSA offset now falls within the 965 * GuC inaccessible range. We resort to perma-pinning an additional vma 966 * within the accessible range that only contains the RSA signature. 967 * The GuC HW can use this extra pinning to perform the authentication 968 * since its GGTT offset will be GuC accessible. 969 */ 970 GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE); 971 vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE); 972 if (IS_ERR(vma)) 973 return PTR_ERR(vma); 974 975 vaddr = i915_gem_object_pin_map_unlocked(vma->obj, 976 i915_coherent_map_type(gt->i915, vma->obj, true)); 977 if (IS_ERR(vaddr)) { 978 i915_vma_unpin_and_release(&vma, 0); 979 err = PTR_ERR(vaddr); 980 goto unpin_out; 981 } 982 983 copied = intel_uc_fw_copy_rsa(uc_fw, vaddr, vma->size); 984 i915_gem_object_unpin_map(vma->obj); 985 986 if (copied < uc_fw->rsa_size) { 987 err = -ENOMEM; 988 goto unpin_out; 989 } 990 991 uc_fw->rsa_data = vma; 992 993 return 0; 994 995 unpin_out: 996 i915_vma_unpin_and_release(&vma, 0); 997 return err; 998 } 999 1000 static void uc_fw_rsa_data_destroy(struct intel_uc_fw *uc_fw) 1001 { 1002 i915_vma_unpin_and_release(&uc_fw->rsa_data, 0); 1003 } 1004 1005 int intel_uc_fw_init(struct intel_uc_fw *uc_fw) 1006 { 1007 int err; 1008 1009 /* this should happen before the load! */ 1010 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 1011 1012 if (!intel_uc_fw_is_available(uc_fw)) 1013 return -ENOEXEC; 1014 1015 err = i915_gem_object_pin_pages_unlocked(uc_fw->obj); 1016 if (err) { 1017 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", 1018 intel_uc_fw_type_repr(uc_fw->type), err); 1019 goto out; 1020 } 1021 1022 err = uc_fw_rsa_data_create(uc_fw); 1023 if (err) { 1024 DRM_DEBUG_DRIVER("%s fw rsa data creation failed, err=%d\n", 1025 intel_uc_fw_type_repr(uc_fw->type), err); 1026 goto out_unpin; 1027 } 1028 1029 return 0; 1030 1031 out_unpin: 1032 i915_gem_object_unpin_pages(uc_fw->obj); 1033 out: 1034 return err; 1035 } 1036 1037 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) 1038 { 1039 uc_fw_rsa_data_destroy(uc_fw); 1040 1041 if (i915_gem_object_has_pinned_pages(uc_fw->obj)) 1042 i915_gem_object_unpin_pages(uc_fw->obj); 1043 1044 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 1045 } 1046 1047 /** 1048 * intel_uc_fw_cleanup_fetch - cleanup uC firmware 1049 * @uc_fw: uC firmware 1050 * 1051 * Cleans up uC firmware by releasing the firmware GEM obj. 1052 */ 1053 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw) 1054 { 1055 if (!intel_uc_fw_is_available(uc_fw)) 1056 return; 1057 1058 i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); 1059 1060 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED); 1061 } 1062 1063 /** 1064 * intel_uc_fw_copy_rsa - copy fw RSA to buffer 1065 * 1066 * @uc_fw: uC firmware 1067 * @dst: dst buffer 1068 * @max_len: max number of bytes to copy 1069 * 1070 * Return: number of copied bytes. 1071 */ 1072 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len) 1073 { 1074 struct intel_memory_region *mr = uc_fw->obj->mm.region; 1075 u32 size = min_t(u32, uc_fw->rsa_size, max_len); 1076 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size; 1077 struct sgt_iter iter; 1078 size_t count = 0; 1079 int idx; 1080 1081 /* Called during reset handling, must be atomic [no fs_reclaim] */ 1082 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw)); 1083 1084 idx = offset >> PAGE_SHIFT; 1085 offset = offset_in_page(offset); 1086 if (i915_gem_object_has_struct_page(uc_fw->obj)) { 1087 struct page *page; 1088 1089 for_each_sgt_page(page, iter, uc_fw->obj->mm.pages) { 1090 u32 len = min_t(u32, size, PAGE_SIZE - offset); 1091 void *vaddr; 1092 1093 if (idx > 0) { 1094 idx--; 1095 continue; 1096 } 1097 1098 vaddr = kmap_atomic(page); 1099 memcpy(dst, vaddr + offset, len); 1100 kunmap_atomic(vaddr); 1101 1102 offset = 0; 1103 dst += len; 1104 size -= len; 1105 count += len; 1106 if (!size) 1107 break; 1108 } 1109 } else { 1110 dma_addr_t addr; 1111 1112 for_each_sgt_daddr(addr, iter, uc_fw->obj->mm.pages) { 1113 u32 len = min_t(u32, size, PAGE_SIZE - offset); 1114 void __iomem *vaddr; 1115 1116 if (idx > 0) { 1117 idx--; 1118 continue; 1119 } 1120 1121 vaddr = io_mapping_map_atomic_wc(&mr->iomap, 1122 addr - mr->region.start); 1123 memcpy_fromio(dst, vaddr + offset, len); 1124 io_mapping_unmap_atomic(vaddr); 1125 1126 offset = 0; 1127 dst += len; 1128 size -= len; 1129 count += len; 1130 if (!size) 1131 break; 1132 } 1133 } 1134 1135 return count; 1136 } 1137 1138 /** 1139 * intel_uc_fw_dump - dump information about uC firmware 1140 * @uc_fw: uC firmware 1141 * @p: the &drm_printer 1142 * 1143 * Pretty printer for uC firmware. 1144 */ 1145 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p) 1146 { 1147 bool got_wanted; 1148 1149 drm_printf(p, "%s firmware: %s\n", 1150 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path); 1151 if (uc_fw->file_selected.path != uc_fw->file_wanted.path) 1152 drm_printf(p, "%s firmware wanted: %s\n", 1153 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_wanted.path); 1154 drm_printf(p, "\tstatus: %s\n", 1155 intel_uc_fw_status_repr(uc_fw->status)); 1156 1157 if (uc_fw->file_selected.ver.major < uc_fw->file_wanted.ver.major) 1158 got_wanted = false; 1159 else if ((uc_fw->file_selected.ver.major == uc_fw->file_wanted.ver.major) && 1160 (uc_fw->file_selected.ver.minor < uc_fw->file_wanted.ver.minor)) 1161 got_wanted = false; 1162 else if ((uc_fw->file_selected.ver.major == uc_fw->file_wanted.ver.major) && 1163 (uc_fw->file_selected.ver.minor == uc_fw->file_wanted.ver.minor) && 1164 (uc_fw->file_selected.ver.patch < uc_fw->file_wanted.ver.patch)) 1165 got_wanted = false; 1166 else 1167 got_wanted = true; 1168 1169 if (!got_wanted) 1170 drm_printf(p, "\tversion: wanted %u.%u.%u, found %u.%u.%u\n", 1171 uc_fw->file_wanted.ver.major, 1172 uc_fw->file_wanted.ver.minor, 1173 uc_fw->file_wanted.ver.patch, 1174 uc_fw->file_selected.ver.major, 1175 uc_fw->file_selected.ver.minor, 1176 uc_fw->file_selected.ver.patch); 1177 else 1178 drm_printf(p, "\tversion: found %u.%u.%u\n", 1179 uc_fw->file_selected.ver.major, 1180 uc_fw->file_selected.ver.minor, 1181 uc_fw->file_selected.ver.patch); 1182 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); 1183 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); 1184 } 1185