1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016-2019 Intel Corporation 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/firmware.h> 8 #include <linux/highmem.h> 9 10 #include <drm/drm_cache.h> 11 #include <drm/drm_print.h> 12 13 #include "gem/i915_gem_lmem.h" 14 #include "intel_uc_fw.h" 15 #include "intel_uc_fw_abi.h" 16 #include "i915_drv.h" 17 #include "i915_reg.h" 18 19 static inline struct intel_gt * 20 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type) 21 { 22 if (type == INTEL_UC_FW_TYPE_GUC) 23 return container_of(uc_fw, struct intel_gt, uc.guc.fw); 24 25 GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC); 26 return container_of(uc_fw, struct intel_gt, uc.huc.fw); 27 } 28 29 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw) 30 { 31 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); 32 return ____uc_fw_to_gt(uc_fw, uc_fw->type); 33 } 34 35 #ifdef CONFIG_DRM_I915_DEBUG_GUC 36 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, 37 enum intel_uc_fw_status status) 38 { 39 uc_fw->__status = status; 40 drm_dbg(&__uc_fw_to_gt(uc_fw)->i915->drm, 41 "%s firmware -> %s\n", 42 intel_uc_fw_type_repr(uc_fw->type), 43 status == INTEL_UC_FIRMWARE_SELECTED ? 44 uc_fw->file_selected.path : intel_uc_fw_status_repr(status)); 45 } 46 #endif 47 48 /* 49 * List of required GuC and HuC binaries per-platform. 50 * Must be ordered based on platform + revid, from newer to older. 51 * 52 * Note that RKL and ADL-S have the same GuC/HuC device ID's and use the same 53 * firmware as TGL. 54 * 55 * Version numbers: 56 * Originally, the driver required an exact match major/minor/patch furmware 57 * file and only supported that one version for any given platform. However, 58 * the new direction from upstream is to be backwards compatible with all 59 * prior releases and to be as flexible as possible as to what firmware is 60 * loaded. 61 * 62 * For GuC, the major version number signifies a backwards breaking API change. 63 * So, new format GuC firmware files are labelled by their major version only. 64 * For HuC, there is no KMD interaction, hence no version matching requirement. 65 * So, new format HuC firmware files have no version number at all. 66 * 67 * All of which means that the table below must keep all old format files with 68 * full three point version number. But newer files have reduced requirements. 69 * Having said that, the driver still needs to track the minor version number 70 * for GuC at least. As it is useful to report to the user that they are not 71 * running with a recent enough version for all KMD supported features, 72 * security fixes, etc. to be enabled. 73 */ 74 #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ 75 fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ 76 fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ 77 fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ 78 fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ 79 fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ 80 fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ 81 fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ 82 fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ 83 fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ 84 fw_def(ELKHARTLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ 85 fw_def(ICELAKE, 0, guc_mmp(icl, 70, 1, 1)) \ 86 fw_def(COMETLAKE, 5, guc_mmp(cml, 70, 1, 1)) \ 87 fw_def(COMETLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 88 fw_def(COFFEELAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 89 fw_def(GEMINILAKE, 0, guc_mmp(glk, 70, 1, 1)) \ 90 fw_def(KABYLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \ 91 fw_def(BROXTON, 0, guc_mmp(bxt, 70, 1, 1)) \ 92 fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) 93 94 #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ 95 fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ 96 fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ 97 fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ 98 fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ 99 fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ 100 fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ 101 fw_def(ELKHARTLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ 102 fw_def(ICELAKE, 0, huc_mmp(icl, 9, 0, 0)) \ 103 fw_def(COMETLAKE, 5, huc_mmp(cml, 4, 0, 0)) \ 104 fw_def(COMETLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 105 fw_def(COFFEELAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 106 fw_def(GEMINILAKE, 0, huc_mmp(glk, 4, 0, 0)) \ 107 fw_def(KABYLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \ 108 fw_def(BROXTON, 0, huc_mmp(bxt, 2, 0, 0)) \ 109 fw_def(SKYLAKE, 0, huc_mmp(skl, 2, 0, 0)) 110 111 /* 112 * Set of macros for producing a list of filenames from the above table. 113 */ 114 #define __MAKE_UC_FW_PATH_BLANK(prefix_, name_) \ 115 "i915/" \ 116 __stringify(prefix_) name_ ".bin" 117 118 #define __MAKE_UC_FW_PATH_MAJOR(prefix_, name_, major_) \ 119 "i915/" \ 120 __stringify(prefix_) name_ \ 121 __stringify(major_) ".bin" 122 123 #define __MAKE_UC_FW_PATH_MMP(prefix_, name_, major_, minor_, patch_) \ 124 "i915/" \ 125 __stringify(prefix_) name_ \ 126 __stringify(major_) "." \ 127 __stringify(minor_) "." \ 128 __stringify(patch_) ".bin" 129 130 /* Minor for internal driver use, not part of file name */ 131 #define MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_) \ 132 __MAKE_UC_FW_PATH_MAJOR(prefix_, "_guc_", major_) 133 134 #define MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \ 135 __MAKE_UC_FW_PATH_MMP(prefix_, "_guc_", major_, minor_, patch_) 136 137 #define MAKE_HUC_FW_PATH_BLANK(prefix_) \ 138 __MAKE_UC_FW_PATH_BLANK(prefix_, "_huc") 139 140 #define MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \ 141 __MAKE_UC_FW_PATH_MMP(prefix_, "_huc_", major_, minor_, patch_) 142 143 /* 144 * All blobs need to be declared via MODULE_FIRMWARE(). 145 * This first expansion of the table macros is solely to provide 146 * that declaration. 147 */ 148 #define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \ 149 MODULE_FIRMWARE(uc_); 150 151 INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH_MAJOR, MAKE_GUC_FW_PATH_MMP) 152 INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, MAKE_HUC_FW_PATH_MMP) 153 154 /* 155 * The next expansion of the table macros (in __uc_fw_auto_select below) provides 156 * actual data structures with both the filename and the version information. 157 * These structure arrays are then iterated over to the list of suitable files 158 * for the current platform and to then attempt to load those files, in the order 159 * listed, until one is successfully found. 160 */ 161 struct __packed uc_fw_blob { 162 const char *path; 163 bool legacy; 164 u8 major; 165 u8 minor; 166 u8 patch; 167 }; 168 169 #define UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 170 .major = major_, \ 171 .minor = minor_, \ 172 .patch = patch_, \ 173 .path = path_, 174 175 #define UC_FW_BLOB_NEW(major_, minor_, patch_, path_) \ 176 { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 177 .legacy = false } 178 179 #define UC_FW_BLOB_OLD(major_, minor_, patch_, path_) \ 180 { UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \ 181 .legacy = true } 182 183 #define GUC_FW_BLOB(prefix_, major_, minor_) \ 184 UC_FW_BLOB_NEW(major_, minor_, 0, \ 185 MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_)) 186 187 #define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \ 188 UC_FW_BLOB_OLD(major_, minor_, patch_, \ 189 MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_)) 190 191 #define HUC_FW_BLOB(prefix_) \ 192 UC_FW_BLOB_NEW(0, 0, 0, MAKE_HUC_FW_PATH_BLANK(prefix_)) 193 194 #define HUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \ 195 UC_FW_BLOB_OLD(major_, minor_, patch_, \ 196 MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_)) 197 198 struct __packed uc_fw_platform_requirement { 199 enum intel_platform p; 200 u8 rev; /* first platform rev using this FW */ 201 const struct uc_fw_blob blob; 202 }; 203 204 #define MAKE_FW_LIST(platform_, revid_, uc_) \ 205 { \ 206 .p = INTEL_##platform_, \ 207 .rev = revid_, \ 208 .blob = uc_, \ 209 }, 210 211 struct fw_blobs_by_type { 212 const struct uc_fw_platform_requirement *blobs; 213 u32 count; 214 }; 215 216 static void 217 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 218 { 219 static const struct uc_fw_platform_requirement blobs_guc[] = { 220 INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, GUC_FW_BLOB_MMP) 221 }; 222 static const struct uc_fw_platform_requirement blobs_huc[] = { 223 INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, HUC_FW_BLOB_MMP) 224 }; 225 static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = { 226 [INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) }, 227 [INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) }, 228 }; 229 static bool verified; 230 const struct uc_fw_platform_requirement *fw_blobs; 231 enum intel_platform p = INTEL_INFO(i915)->platform; 232 u32 fw_count; 233 u8 rev = INTEL_REVID(i915); 234 int i; 235 236 /* 237 * The only difference between the ADL GuC FWs is the HWConfig support. 238 * ADL-N does not support HWConfig, so we should use the same binary as 239 * ADL-S, otherwise the GuC might attempt to fetch a config table that 240 * does not exist. 241 */ 242 if (IS_ADLP_N(i915)) 243 p = INTEL_ALDERLAKE_S; 244 245 GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all)); 246 fw_blobs = blobs_all[uc_fw->type].blobs; 247 fw_count = blobs_all[uc_fw->type].count; 248 249 for (i = 0; i < fw_count && p <= fw_blobs[i].p; i++) { 250 const struct uc_fw_blob *blob = &fw_blobs[i].blob; 251 252 if (p != fw_blobs[i].p) 253 continue; 254 255 if (rev < fw_blobs[i].rev) 256 continue; 257 258 if (uc_fw->file_selected.path) { 259 if (uc_fw->file_selected.path == blob->path) 260 uc_fw->file_selected.path = NULL; 261 262 continue; 263 } 264 265 uc_fw->file_selected.path = blob->path; 266 uc_fw->file_wanted.path = blob->path; 267 uc_fw->file_wanted.major_ver = blob->major; 268 uc_fw->file_wanted.minor_ver = blob->minor; 269 break; 270 } 271 272 /* make sure the list is ordered as expected */ 273 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST) && !verified) { 274 verified = true; 275 276 for (i = 1; i < fw_count; i++) { 277 /* Next platform is good: */ 278 if (fw_blobs[i].p < fw_blobs[i - 1].p) 279 continue; 280 281 /* Next platform revision is good: */ 282 if (fw_blobs[i].p == fw_blobs[i - 1].p && 283 fw_blobs[i].rev < fw_blobs[i - 1].rev) 284 continue; 285 286 /* Platform/revision must be in order: */ 287 if (fw_blobs[i].p != fw_blobs[i - 1].p || 288 fw_blobs[i].rev != fw_blobs[i - 1].rev) 289 goto bad; 290 291 /* Next major version is good: */ 292 if (fw_blobs[i].blob.major < fw_blobs[i - 1].blob.major) 293 continue; 294 295 /* New must be before legacy: */ 296 if (!fw_blobs[i].blob.legacy && fw_blobs[i - 1].blob.legacy) 297 goto bad; 298 299 /* New to legacy also means 0.0 to X.Y (HuC), or X.0 to X.Y (GuC) */ 300 if (fw_blobs[i].blob.legacy && !fw_blobs[i - 1].blob.legacy) { 301 if (!fw_blobs[i - 1].blob.major) 302 continue; 303 304 if (fw_blobs[i].blob.major == fw_blobs[i - 1].blob.major) 305 continue; 306 } 307 308 /* Major versions must be in order: */ 309 if (fw_blobs[i].blob.major != fw_blobs[i - 1].blob.major) 310 goto bad; 311 312 /* Next minor version is good: */ 313 if (fw_blobs[i].blob.minor < fw_blobs[i - 1].blob.minor) 314 continue; 315 316 /* Minor versions must be in order: */ 317 if (fw_blobs[i].blob.minor != fw_blobs[i - 1].blob.minor) 318 goto bad; 319 320 /* Patch versions must be in order: */ 321 if (fw_blobs[i].blob.patch <= fw_blobs[i - 1].blob.patch) 322 continue; 323 324 bad: 325 drm_err(&i915->drm, "\x1B[35;1mInvalid FW blob order: %s r%u %s%d.%d.%d comes before %s r%u %s%d.%d.%d\n", 326 intel_platform_name(fw_blobs[i - 1].p), fw_blobs[i - 1].rev, 327 fw_blobs[i - 1].blob.legacy ? "L" : "v", 328 fw_blobs[i - 1].blob.major, 329 fw_blobs[i - 1].blob.minor, 330 fw_blobs[i - 1].blob.patch, 331 intel_platform_name(fw_blobs[i].p), fw_blobs[i].rev, 332 fw_blobs[i].blob.legacy ? "L" : "v", 333 fw_blobs[i].blob.major, 334 fw_blobs[i].blob.minor, 335 fw_blobs[i].blob.patch); 336 337 uc_fw->file_selected.path = NULL; 338 } 339 } 340 } 341 342 static const char *__override_guc_firmware_path(struct drm_i915_private *i915) 343 { 344 if (i915->params.enable_guc & ENABLE_GUC_MASK) 345 return i915->params.guc_firmware_path; 346 return ""; 347 } 348 349 static const char *__override_huc_firmware_path(struct drm_i915_private *i915) 350 { 351 if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC) 352 return i915->params.huc_firmware_path; 353 return ""; 354 } 355 356 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 357 { 358 const char *path = NULL; 359 360 switch (uc_fw->type) { 361 case INTEL_UC_FW_TYPE_GUC: 362 path = __override_guc_firmware_path(i915); 363 break; 364 case INTEL_UC_FW_TYPE_HUC: 365 path = __override_huc_firmware_path(i915); 366 break; 367 } 368 369 if (unlikely(path)) { 370 uc_fw->file_selected.path = path; 371 uc_fw->user_overridden = true; 372 } 373 } 374 375 /** 376 * intel_uc_fw_init_early - initialize the uC object and select the firmware 377 * @uc_fw: uC firmware 378 * @type: type of uC 379 * 380 * Initialize the state of our uC object and relevant tracking and select the 381 * firmware to fetch and load. 382 */ 383 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, 384 enum intel_uc_fw_type type) 385 { 386 struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915; 387 388 /* 389 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status 390 * before we're looked at the HW caps to see if we have uc support 391 */ 392 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED); 393 GEM_BUG_ON(uc_fw->status); 394 GEM_BUG_ON(uc_fw->file_selected.path); 395 396 uc_fw->type = type; 397 398 if (HAS_GT_UC(i915)) { 399 __uc_fw_auto_select(i915, uc_fw); 400 __uc_fw_user_override(i915, uc_fw); 401 } 402 403 intel_uc_fw_change_status(uc_fw, uc_fw->file_selected.path ? *uc_fw->file_selected.path ? 404 INTEL_UC_FIRMWARE_SELECTED : 405 INTEL_UC_FIRMWARE_DISABLED : 406 INTEL_UC_FIRMWARE_NOT_SUPPORTED); 407 } 408 409 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e) 410 { 411 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 412 bool user = e == -EINVAL; 413 414 if (i915_inject_probe_error(i915, e)) { 415 /* non-existing blob */ 416 uc_fw->file_selected.path = "<invalid>"; 417 uc_fw->user_overridden = user; 418 } else if (i915_inject_probe_error(i915, e)) { 419 /* require next major version */ 420 uc_fw->file_wanted.major_ver += 1; 421 uc_fw->file_wanted.minor_ver = 0; 422 uc_fw->user_overridden = user; 423 } else if (i915_inject_probe_error(i915, e)) { 424 /* require next minor version */ 425 uc_fw->file_wanted.minor_ver += 1; 426 uc_fw->user_overridden = user; 427 } else if (uc_fw->file_wanted.major_ver && 428 i915_inject_probe_error(i915, e)) { 429 /* require prev major version */ 430 uc_fw->file_wanted.major_ver -= 1; 431 uc_fw->file_wanted.minor_ver = 0; 432 uc_fw->user_overridden = user; 433 } else if (uc_fw->file_wanted.minor_ver && 434 i915_inject_probe_error(i915, e)) { 435 /* require prev minor version - hey, this should work! */ 436 uc_fw->file_wanted.minor_ver -= 1; 437 uc_fw->user_overridden = user; 438 } else if (user && i915_inject_probe_error(i915, e)) { 439 /* officially unsupported platform */ 440 uc_fw->file_wanted.major_ver = 0; 441 uc_fw->file_wanted.minor_ver = 0; 442 uc_fw->user_overridden = true; 443 } 444 } 445 446 static int check_gsc_manifest(const struct firmware *fw, 447 struct intel_uc_fw *uc_fw) 448 { 449 u32 *dw = (u32 *)fw->data; 450 u32 version_hi = dw[HUC_GSC_VERSION_HI_DW]; 451 u32 version_lo = dw[HUC_GSC_VERSION_LO_DW]; 452 453 uc_fw->file_selected.major_ver = FIELD_GET(HUC_GSC_MAJOR_VER_HI_MASK, version_hi); 454 uc_fw->file_selected.minor_ver = FIELD_GET(HUC_GSC_MINOR_VER_HI_MASK, version_hi); 455 uc_fw->file_selected.patch_ver = FIELD_GET(HUC_GSC_PATCH_VER_LO_MASK, version_lo); 456 457 return 0; 458 } 459 460 static int check_ccs_header(struct drm_i915_private *i915, 461 const struct firmware *fw, 462 struct intel_uc_fw *uc_fw) 463 { 464 struct uc_css_header *css; 465 size_t size; 466 467 /* Check the size of the blob before examining buffer contents */ 468 if (unlikely(fw->size < sizeof(struct uc_css_header))) { 469 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 470 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 471 fw->size, sizeof(struct uc_css_header)); 472 return -ENODATA; 473 } 474 475 css = (struct uc_css_header *)fw->data; 476 477 /* Check integrity of size values inside CSS header */ 478 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw - 479 css->exponent_size_dw) * sizeof(u32); 480 if (unlikely(size != sizeof(struct uc_css_header))) { 481 drm_warn(&i915->drm, 482 "%s firmware %s: unexpected header size: %zu != %zu\n", 483 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 484 fw->size, sizeof(struct uc_css_header)); 485 return -EPROTO; 486 } 487 488 /* uCode size must calculated from other sizes */ 489 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); 490 491 /* now RSA */ 492 uc_fw->rsa_size = css->key_size_dw * sizeof(u32); 493 494 /* At least, it should have header, uCode and RSA. Size of all three. */ 495 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size; 496 if (unlikely(fw->size < size)) { 497 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 498 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 499 fw->size, size); 500 return -ENOEXEC; 501 } 502 503 /* Sanity check whether this fw is not larger than whole WOPCM memory */ 504 size = __intel_uc_fw_get_upload_size(uc_fw); 505 if (unlikely(size >= i915->wopcm.size)) { 506 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n", 507 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 508 size, (size_t)i915->wopcm.size); 509 return -E2BIG; 510 } 511 512 /* Get version numbers from the CSS header */ 513 uc_fw->file_selected.major_ver = FIELD_GET(CSS_SW_VERSION_UC_MAJOR, 514 css->sw_version); 515 uc_fw->file_selected.minor_ver = FIELD_GET(CSS_SW_VERSION_UC_MINOR, 516 css->sw_version); 517 uc_fw->file_selected.patch_ver = FIELD_GET(CSS_SW_VERSION_UC_PATCH, 518 css->sw_version); 519 520 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC) 521 uc_fw->private_data_size = css->private_data_size; 522 523 return 0; 524 } 525 526 /** 527 * intel_uc_fw_fetch - fetch uC firmware 528 * @uc_fw: uC firmware 529 * 530 * Fetch uC firmware into GEM obj. 531 * 532 * Return: 0 on success, a negative errno code on failure. 533 */ 534 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) 535 { 536 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 537 struct intel_uc_fw_file file_ideal; 538 struct device *dev = i915->drm.dev; 539 struct drm_i915_gem_object *obj; 540 const struct firmware *fw = NULL; 541 bool old_ver = false; 542 int err; 543 544 GEM_BUG_ON(!i915->wopcm.size); 545 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw)); 546 547 err = i915_inject_probe_error(i915, -ENXIO); 548 if (err) 549 goto fail; 550 551 __force_fw_fetch_failures(uc_fw, -EINVAL); 552 __force_fw_fetch_failures(uc_fw, -ESTALE); 553 554 err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev); 555 memcpy(&file_ideal, &uc_fw->file_wanted, sizeof(file_ideal)); 556 if (!err || intel_uc_fw_is_overridden(uc_fw)) 557 goto done; 558 559 while (err == -ENOENT) { 560 __uc_fw_auto_select(i915, uc_fw); 561 if (!uc_fw->file_selected.path) { 562 /* 563 * No more options! But set the path back to something 564 * valid just in case it gets dereferenced. 565 */ 566 uc_fw->file_selected.path = file_ideal.path; 567 568 /* Also, preserve the version that was really wanted */ 569 memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted)); 570 break; 571 } 572 573 err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev); 574 } 575 576 if (err) 577 goto fail; 578 579 old_ver = true; 580 done: 581 if (uc_fw->loaded_via_gsc) 582 err = check_gsc_manifest(fw, uc_fw); 583 else 584 err = check_ccs_header(i915, fw, uc_fw); 585 if (err) 586 goto fail; 587 588 if (uc_fw->file_wanted.major_ver) { 589 /* Check the file's major version was as it claimed */ 590 if (uc_fw->file_selected.major_ver != uc_fw->file_wanted.major_ver) { 591 drm_notice(&i915->drm, "%s firmware %s: unexpected version: %u.%u != %u.%u\n", 592 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 593 uc_fw->file_selected.major_ver, uc_fw->file_selected.minor_ver, 594 uc_fw->file_wanted.major_ver, uc_fw->file_wanted.minor_ver); 595 if (!intel_uc_fw_is_overridden(uc_fw)) { 596 err = -ENOEXEC; 597 goto fail; 598 } 599 } else { 600 if (uc_fw->file_selected.minor_ver < uc_fw->file_wanted.minor_ver) 601 old_ver = true; 602 } 603 } 604 605 if (old_ver) { 606 /* Preserve the version that was really wanted */ 607 memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted)); 608 609 drm_notice(&i915->drm, 610 "%s firmware %s (%d.%d) is recommended, but only %s (%d.%d) was found\n", 611 intel_uc_fw_type_repr(uc_fw->type), 612 uc_fw->file_wanted.path, 613 uc_fw->file_wanted.major_ver, uc_fw->file_wanted.minor_ver, 614 uc_fw->file_selected.path, 615 uc_fw->file_selected.major_ver, uc_fw->file_selected.minor_ver); 616 drm_info(&i915->drm, 617 "Consider updating your linux-firmware pkg or downloading from %s\n", 618 INTEL_UC_FIRMWARE_URL); 619 } 620 621 if (HAS_LMEM(i915)) { 622 obj = i915_gem_object_create_lmem_from_data(i915, fw->data, fw->size); 623 if (!IS_ERR(obj)) 624 obj->flags |= I915_BO_ALLOC_PM_EARLY; 625 } else { 626 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); 627 } 628 629 if (IS_ERR(obj)) { 630 err = PTR_ERR(obj); 631 goto fail; 632 } 633 634 uc_fw->obj = obj; 635 uc_fw->size = fw->size; 636 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 637 638 release_firmware(fw); 639 return 0; 640 641 fail: 642 intel_uc_fw_change_status(uc_fw, err == -ENOENT ? 643 INTEL_UC_FIRMWARE_MISSING : 644 INTEL_UC_FIRMWARE_ERROR); 645 646 i915_probe_error(i915, "%s firmware %s: fetch failed with error %d\n", 647 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, err); 648 drm_info(&i915->drm, "%s firmware(s) can be downloaded from %s\n", 649 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL); 650 651 release_firmware(fw); /* OK even if fw is NULL */ 652 return err; 653 } 654 655 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw) 656 { 657 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 658 struct drm_mm_node *node = &ggtt->uc_fw; 659 660 GEM_BUG_ON(!drm_mm_node_allocated(node)); 661 GEM_BUG_ON(upper_32_bits(node->start)); 662 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1)); 663 664 return lower_32_bits(node->start); 665 } 666 667 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw) 668 { 669 struct drm_i915_gem_object *obj = uc_fw->obj; 670 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 671 struct i915_vma_resource *dummy = &uc_fw->dummy; 672 u32 pte_flags = 0; 673 674 dummy->start = uc_fw_ggtt_offset(uc_fw); 675 dummy->node_size = obj->base.size; 676 dummy->bi.pages = obj->mm.pages; 677 678 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); 679 GEM_BUG_ON(dummy->node_size > ggtt->uc_fw.size); 680 681 /* uc_fw->obj cache domains were not controlled across suspend */ 682 if (i915_gem_object_has_struct_page(obj)) 683 drm_clflush_sg(dummy->bi.pages); 684 685 if (i915_gem_object_is_lmem(obj)) 686 pte_flags |= PTE_LM; 687 688 if (ggtt->vm.raw_insert_entries) 689 ggtt->vm.raw_insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags); 690 else 691 ggtt->vm.insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags); 692 } 693 694 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw) 695 { 696 struct drm_i915_gem_object *obj = uc_fw->obj; 697 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 698 u64 start = uc_fw_ggtt_offset(uc_fw); 699 700 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); 701 } 702 703 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 704 { 705 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 706 struct intel_uncore *uncore = gt->uncore; 707 u64 offset; 708 int ret; 709 710 ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT); 711 if (ret) 712 return ret; 713 714 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); 715 716 /* Set the source address for the uCode */ 717 offset = uc_fw_ggtt_offset(uc_fw); 718 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000); 719 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); 720 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); 721 722 /* Set the DMA destination */ 723 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset); 724 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); 725 726 /* 727 * Set the transfer size. The header plus uCode will be copied to WOPCM 728 * via DMA, excluding any other components 729 */ 730 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, 731 sizeof(struct uc_css_header) + uc_fw->ucode_size); 732 733 /* Start the DMA */ 734 intel_uncore_write_fw(uncore, DMA_CTRL, 735 _MASKED_BIT_ENABLE(dma_flags | START_DMA)); 736 737 /* Wait for DMA to finish */ 738 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100); 739 if (ret) 740 drm_err(>->i915->drm, "DMA for %s fw failed, DMA_CTRL=%u\n", 741 intel_uc_fw_type_repr(uc_fw->type), 742 intel_uncore_read_fw(uncore, DMA_CTRL)); 743 744 /* Disable the bits once DMA is over */ 745 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); 746 747 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL); 748 749 return ret; 750 } 751 752 /** 753 * intel_uc_fw_upload - load uC firmware using custom loader 754 * @uc_fw: uC firmware 755 * @dst_offset: destination offset 756 * @dma_flags: flags for flags for dma ctrl 757 * 758 * Loads uC firmware and updates internal flags. 759 * 760 * Return: 0 on success, non-zero on failure. 761 */ 762 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 763 { 764 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 765 int err; 766 767 /* make sure the status was cleared the last time we reset the uc */ 768 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 769 770 err = i915_inject_probe_error(gt->i915, -ENOEXEC); 771 if (err) 772 return err; 773 774 if (!intel_uc_fw_is_loadable(uc_fw)) 775 return -ENOEXEC; 776 777 /* Call custom loader */ 778 uc_fw_bind_ggtt(uc_fw); 779 err = uc_fw_xfer(uc_fw, dst_offset, dma_flags); 780 uc_fw_unbind_ggtt(uc_fw); 781 if (err) 782 goto fail; 783 784 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); 785 return 0; 786 787 fail: 788 i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", 789 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, 790 err); 791 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_LOAD_FAIL); 792 return err; 793 } 794 795 static inline bool uc_fw_need_rsa_in_memory(struct intel_uc_fw *uc_fw) 796 { 797 /* 798 * The HW reads the GuC RSA from memory if the key size is > 256 bytes, 799 * while it reads it from the 64 RSA registers if it is smaller. 800 * The HuC RSA is always read from memory. 801 */ 802 return uc_fw->type == INTEL_UC_FW_TYPE_HUC || uc_fw->rsa_size > 256; 803 } 804 805 static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw) 806 { 807 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 808 struct i915_vma *vma; 809 size_t copied; 810 void *vaddr; 811 int err; 812 813 err = i915_inject_probe_error(gt->i915, -ENXIO); 814 if (err) 815 return err; 816 817 if (!uc_fw_need_rsa_in_memory(uc_fw)) 818 return 0; 819 820 /* 821 * uC firmwares will sit above GUC_GGTT_TOP and will not map through 822 * GGTT. Unfortunately, this means that the GuC HW cannot perform the uC 823 * authentication from memory, as the RSA offset now falls within the 824 * GuC inaccessible range. We resort to perma-pinning an additional vma 825 * within the accessible range that only contains the RSA signature. 826 * The GuC HW can use this extra pinning to perform the authentication 827 * since its GGTT offset will be GuC accessible. 828 */ 829 GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE); 830 vma = intel_guc_allocate_vma(>->uc.guc, PAGE_SIZE); 831 if (IS_ERR(vma)) 832 return PTR_ERR(vma); 833 834 vaddr = i915_gem_object_pin_map_unlocked(vma->obj, 835 i915_coherent_map_type(gt->i915, vma->obj, true)); 836 if (IS_ERR(vaddr)) { 837 i915_vma_unpin_and_release(&vma, 0); 838 err = PTR_ERR(vaddr); 839 goto unpin_out; 840 } 841 842 copied = intel_uc_fw_copy_rsa(uc_fw, vaddr, vma->size); 843 i915_gem_object_unpin_map(vma->obj); 844 845 if (copied < uc_fw->rsa_size) { 846 err = -ENOMEM; 847 goto unpin_out; 848 } 849 850 uc_fw->rsa_data = vma; 851 852 return 0; 853 854 unpin_out: 855 i915_vma_unpin_and_release(&vma, 0); 856 return err; 857 } 858 859 static void uc_fw_rsa_data_destroy(struct intel_uc_fw *uc_fw) 860 { 861 i915_vma_unpin_and_release(&uc_fw->rsa_data, 0); 862 } 863 864 int intel_uc_fw_init(struct intel_uc_fw *uc_fw) 865 { 866 int err; 867 868 /* this should happen before the load! */ 869 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 870 871 if (!intel_uc_fw_is_available(uc_fw)) 872 return -ENOEXEC; 873 874 err = i915_gem_object_pin_pages_unlocked(uc_fw->obj); 875 if (err) { 876 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", 877 intel_uc_fw_type_repr(uc_fw->type), err); 878 goto out; 879 } 880 881 err = uc_fw_rsa_data_create(uc_fw); 882 if (err) { 883 DRM_DEBUG_DRIVER("%s fw rsa data creation failed, err=%d\n", 884 intel_uc_fw_type_repr(uc_fw->type), err); 885 goto out_unpin; 886 } 887 888 return 0; 889 890 out_unpin: 891 i915_gem_object_unpin_pages(uc_fw->obj); 892 out: 893 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_INIT_FAIL); 894 return err; 895 } 896 897 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) 898 { 899 uc_fw_rsa_data_destroy(uc_fw); 900 901 if (i915_gem_object_has_pinned_pages(uc_fw->obj)) 902 i915_gem_object_unpin_pages(uc_fw->obj); 903 904 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 905 } 906 907 /** 908 * intel_uc_fw_cleanup_fetch - cleanup uC firmware 909 * @uc_fw: uC firmware 910 * 911 * Cleans up uC firmware by releasing the firmware GEM obj. 912 */ 913 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw) 914 { 915 if (!intel_uc_fw_is_available(uc_fw)) 916 return; 917 918 i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); 919 920 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED); 921 } 922 923 /** 924 * intel_uc_fw_copy_rsa - copy fw RSA to buffer 925 * 926 * @uc_fw: uC firmware 927 * @dst: dst buffer 928 * @max_len: max number of bytes to copy 929 * 930 * Return: number of copied bytes. 931 */ 932 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len) 933 { 934 struct intel_memory_region *mr = uc_fw->obj->mm.region; 935 u32 size = min_t(u32, uc_fw->rsa_size, max_len); 936 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size; 937 struct sgt_iter iter; 938 size_t count = 0; 939 int idx; 940 941 /* Called during reset handling, must be atomic [no fs_reclaim] */ 942 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw)); 943 944 idx = offset >> PAGE_SHIFT; 945 offset = offset_in_page(offset); 946 if (i915_gem_object_has_struct_page(uc_fw->obj)) { 947 struct page *page; 948 949 for_each_sgt_page(page, iter, uc_fw->obj->mm.pages) { 950 u32 len = min_t(u32, size, PAGE_SIZE - offset); 951 void *vaddr; 952 953 if (idx > 0) { 954 idx--; 955 continue; 956 } 957 958 vaddr = kmap_atomic(page); 959 memcpy(dst, vaddr + offset, len); 960 kunmap_atomic(vaddr); 961 962 offset = 0; 963 dst += len; 964 size -= len; 965 count += len; 966 if (!size) 967 break; 968 } 969 } else { 970 dma_addr_t addr; 971 972 for_each_sgt_daddr(addr, iter, uc_fw->obj->mm.pages) { 973 u32 len = min_t(u32, size, PAGE_SIZE - offset); 974 void __iomem *vaddr; 975 976 if (idx > 0) { 977 idx--; 978 continue; 979 } 980 981 vaddr = io_mapping_map_atomic_wc(&mr->iomap, 982 addr - mr->region.start); 983 memcpy_fromio(dst, vaddr + offset, len); 984 io_mapping_unmap_atomic(vaddr); 985 986 offset = 0; 987 dst += len; 988 size -= len; 989 count += len; 990 if (!size) 991 break; 992 } 993 } 994 995 return count; 996 } 997 998 /** 999 * intel_uc_fw_dump - dump information about uC firmware 1000 * @uc_fw: uC firmware 1001 * @p: the &drm_printer 1002 * 1003 * Pretty printer for uC firmware. 1004 */ 1005 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p) 1006 { 1007 u32 ver_sel, ver_want; 1008 1009 drm_printf(p, "%s firmware: %s\n", 1010 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path); 1011 if (uc_fw->file_selected.path != uc_fw->file_wanted.path) 1012 drm_printf(p, "%s firmware wanted: %s\n", 1013 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_wanted.path); 1014 drm_printf(p, "\tstatus: %s\n", 1015 intel_uc_fw_status_repr(uc_fw->status)); 1016 ver_sel = MAKE_UC_VER(uc_fw->file_selected.major_ver, 1017 uc_fw->file_selected.minor_ver, 1018 uc_fw->file_selected.patch_ver); 1019 ver_want = MAKE_UC_VER(uc_fw->file_wanted.major_ver, 1020 uc_fw->file_wanted.minor_ver, 1021 uc_fw->file_wanted.patch_ver); 1022 if (ver_sel < ver_want) 1023 drm_printf(p, "\tversion: wanted %u.%u.%u, found %u.%u.%u\n", 1024 uc_fw->file_wanted.major_ver, 1025 uc_fw->file_wanted.minor_ver, 1026 uc_fw->file_wanted.patch_ver, 1027 uc_fw->file_selected.major_ver, 1028 uc_fw->file_selected.minor_ver, 1029 uc_fw->file_selected.patch_ver); 1030 else 1031 drm_printf(p, "\tversion: found %u.%u.%u\n", 1032 uc_fw->file_selected.major_ver, 1033 uc_fw->file_selected.minor_ver, 1034 uc_fw->file_selected.patch_ver); 1035 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); 1036 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); 1037 } 1038