xref: /openbmc/linux/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c (revision 56ea353ea49ad21dd4c14e7baa235493ec27e766)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2016-2019 Intel Corporation
4  */
5 
6 #include <linux/bitfield.h>
7 #include <linux/firmware.h>
8 #include <linux/highmem.h>
9 
10 #include <drm/drm_cache.h>
11 #include <drm/drm_print.h>
12 
13 #include "gem/i915_gem_lmem.h"
14 #include "intel_uc_fw.h"
15 #include "intel_uc_fw_abi.h"
16 #include "i915_drv.h"
17 #include "i915_reg.h"
18 
19 static inline struct intel_gt *
20 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type)
21 {
22 	if (type == INTEL_UC_FW_TYPE_GUC)
23 		return container_of(uc_fw, struct intel_gt, uc.guc.fw);
24 
25 	GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC);
26 	return container_of(uc_fw, struct intel_gt, uc.huc.fw);
27 }
28 
29 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw)
30 {
31 	GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED);
32 	return ____uc_fw_to_gt(uc_fw, uc_fw->type);
33 }
34 
35 #ifdef CONFIG_DRM_I915_DEBUG_GUC
36 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
37 			       enum intel_uc_fw_status status)
38 {
39 	uc_fw->__status =  status;
40 	drm_dbg(&__uc_fw_to_gt(uc_fw)->i915->drm,
41 		"%s firmware -> %s\n",
42 		intel_uc_fw_type_repr(uc_fw->type),
43 		status == INTEL_UC_FIRMWARE_SELECTED ?
44 		uc_fw->file_selected.path : intel_uc_fw_status_repr(status));
45 }
46 #endif
47 
48 /*
49  * List of required GuC and HuC binaries per-platform.
50  * Must be ordered based on platform + revid, from newer to older.
51  *
52  * Note that RKL and ADL-S have the same GuC/HuC device ID's and use the same
53  * firmware as TGL.
54  *
55  * Version numbers:
56  * Originally, the driver required an exact match major/minor/patch furmware
57  * file and only supported that one version for any given platform. However,
58  * the new direction from upstream is to be backwards compatible with all
59  * prior releases and to be as flexible as possible as to what firmware is
60  * loaded.
61  *
62  * For GuC, the major version number signifies a backwards breaking API change.
63  * So, new format GuC firmware files are labelled by their major version only.
64  * For HuC, there is no KMD interaction, hence no version matching requirement.
65  * So, new format HuC firmware files have no version number at all.
66  *
67  * All of which means that the table below must keep all old format files with
68  * full three point version number. But newer files have reduced requirements.
69  * Having said that, the driver still needs to track the minor version number
70  * for GuC at least. As it is useful to report to the user that they are not
71  * running with a recent enough version for all KMD supported features,
72  * security fixes, etc. to be enabled.
73  */
74 #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \
75 	fw_def(DG2,          0, guc_maj(dg2,  70, 5)) \
76 	fw_def(ALDERLAKE_P,  0, guc_maj(adlp, 70, 5)) \
77 	fw_def(ALDERLAKE_P,  0, guc_mmp(adlp, 70, 1, 1)) \
78 	fw_def(ALDERLAKE_P,  0, guc_mmp(adlp, 69, 0, 3)) \
79 	fw_def(ALDERLAKE_S,  0, guc_maj(tgl,  70, 5)) \
80 	fw_def(ALDERLAKE_S,  0, guc_mmp(tgl,  70, 1, 1)) \
81 	fw_def(ALDERLAKE_S,  0, guc_mmp(tgl,  69, 0, 3)) \
82 	fw_def(DG1,          0, guc_maj(dg1,  70, 5)) \
83 	fw_def(ROCKETLAKE,   0, guc_mmp(tgl,  70, 1, 1)) \
84 	fw_def(TIGERLAKE,    0, guc_mmp(tgl,  70, 1, 1)) \
85 	fw_def(JASPERLAKE,   0, guc_mmp(ehl,  70, 1, 1)) \
86 	fw_def(ELKHARTLAKE,  0, guc_mmp(ehl,  70, 1, 1)) \
87 	fw_def(ICELAKE,      0, guc_mmp(icl,  70, 1, 1)) \
88 	fw_def(COMETLAKE,    5, guc_mmp(cml,  70, 1, 1)) \
89 	fw_def(COMETLAKE,    0, guc_mmp(kbl,  70, 1, 1)) \
90 	fw_def(COFFEELAKE,   0, guc_mmp(kbl,  70, 1, 1)) \
91 	fw_def(GEMINILAKE,   0, guc_mmp(glk,  70, 1, 1)) \
92 	fw_def(KABYLAKE,     0, guc_mmp(kbl,  70, 1, 1)) \
93 	fw_def(BROXTON,      0, guc_mmp(bxt,  70, 1, 1)) \
94 	fw_def(SKYLAKE,      0, guc_mmp(skl,  70, 1, 1))
95 
96 #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp, huc_gsc) \
97 	fw_def(DG2,          0, huc_gsc(dg2)) \
98 	fw_def(ALDERLAKE_P,  0, huc_raw(tgl)) \
99 	fw_def(ALDERLAKE_P,  0, huc_mmp(tgl,  7, 9, 3)) \
100 	fw_def(ALDERLAKE_S,  0, huc_raw(tgl)) \
101 	fw_def(ALDERLAKE_S,  0, huc_mmp(tgl,  7, 9, 3)) \
102 	fw_def(DG1,          0, huc_raw(dg1)) \
103 	fw_def(ROCKETLAKE,   0, huc_mmp(tgl,  7, 9, 3)) \
104 	fw_def(TIGERLAKE,    0, huc_mmp(tgl,  7, 9, 3)) \
105 	fw_def(JASPERLAKE,   0, huc_mmp(ehl,  9, 0, 0)) \
106 	fw_def(ELKHARTLAKE,  0, huc_mmp(ehl,  9, 0, 0)) \
107 	fw_def(ICELAKE,      0, huc_mmp(icl,  9, 0, 0)) \
108 	fw_def(COMETLAKE,    5, huc_mmp(cml,  4, 0, 0)) \
109 	fw_def(COMETLAKE,    0, huc_mmp(kbl,  4, 0, 0)) \
110 	fw_def(COFFEELAKE,   0, huc_mmp(kbl,  4, 0, 0)) \
111 	fw_def(GEMINILAKE,   0, huc_mmp(glk,  4, 0, 0)) \
112 	fw_def(KABYLAKE,     0, huc_mmp(kbl,  4, 0, 0)) \
113 	fw_def(BROXTON,      0, huc_mmp(bxt,  2, 0, 0)) \
114 	fw_def(SKYLAKE,      0, huc_mmp(skl,  2, 0, 0))
115 
116 /*
117  * Set of macros for producing a list of filenames from the above table.
118  */
119 #define __MAKE_UC_FW_PATH_BLANK(prefix_, name_) \
120 	"i915/" \
121 	__stringify(prefix_) name_ ".bin"
122 
123 #define __MAKE_UC_FW_PATH_MAJOR(prefix_, name_, major_) \
124 	"i915/" \
125 	__stringify(prefix_) name_ \
126 	__stringify(major_) ".bin"
127 
128 #define __MAKE_UC_FW_PATH_MMP(prefix_, name_, major_, minor_, patch_) \
129 	"i915/" \
130 	__stringify(prefix_) name_ \
131 	__stringify(major_) "." \
132 	__stringify(minor_) "." \
133 	__stringify(patch_) ".bin"
134 
135 /* Minor for internal driver use, not part of file name */
136 #define MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_) \
137 	__MAKE_UC_FW_PATH_MAJOR(prefix_, "_guc_", major_)
138 
139 #define MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \
140 	__MAKE_UC_FW_PATH_MMP(prefix_, "_guc_", major_, minor_, patch_)
141 
142 #define MAKE_HUC_FW_PATH_BLANK(prefix_) \
143 	__MAKE_UC_FW_PATH_BLANK(prefix_, "_huc")
144 
145 #define MAKE_HUC_FW_PATH_GSC(prefix_) \
146 	__MAKE_UC_FW_PATH_BLANK(prefix_, "_huc_gsc")
147 
148 #define MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_) \
149 	__MAKE_UC_FW_PATH_MMP(prefix_, "_huc_", major_, minor_, patch_)
150 
151 /*
152  * All blobs need to be declared via MODULE_FIRMWARE().
153  * This first expansion of the table macros is solely to provide
154  * that declaration.
155  */
156 #define INTEL_UC_MODULE_FW(platform_, revid_, uc_) \
157 	MODULE_FIRMWARE(uc_);
158 
159 INTEL_GUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH_MAJOR, MAKE_GUC_FW_PATH_MMP)
160 INTEL_HUC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_HUC_FW_PATH_BLANK, MAKE_HUC_FW_PATH_MMP, MAKE_HUC_FW_PATH_GSC)
161 
162 /*
163  * The next expansion of the table macros (in __uc_fw_auto_select below) provides
164  * actual data structures with both the filename and the version information.
165  * These structure arrays are then iterated over to the list of suitable files
166  * for the current platform and to then attempt to load those files, in the order
167  * listed, until one is successfully found.
168  */
169 struct __packed uc_fw_blob {
170 	const char *path;
171 	bool legacy;
172 	u8 major;
173 	u8 minor;
174 	u8 patch;
175 	bool loaded_via_gsc;
176 };
177 
178 #define UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
179 	.major = major_, \
180 	.minor = minor_, \
181 	.patch = patch_, \
182 	.path = path_,
183 
184 #define UC_FW_BLOB_NEW(major_, minor_, patch_, gsc_, path_) \
185 	{ UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
186 	  .legacy = false, .loaded_via_gsc = gsc_ }
187 
188 #define UC_FW_BLOB_OLD(major_, minor_, patch_, path_) \
189 	{ UC_FW_BLOB_BASE(major_, minor_, patch_, path_) \
190 	  .legacy = true }
191 
192 #define GUC_FW_BLOB(prefix_, major_, minor_) \
193 	UC_FW_BLOB_NEW(major_, minor_, 0, false, \
194 		       MAKE_GUC_FW_PATH_MAJOR(prefix_, major_, minor_))
195 
196 #define GUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \
197 	UC_FW_BLOB_OLD(major_, minor_, patch_, \
198 		       MAKE_GUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
199 
200 #define HUC_FW_BLOB(prefix_) \
201 	UC_FW_BLOB_NEW(0, 0, 0, false, MAKE_HUC_FW_PATH_BLANK(prefix_))
202 
203 #define HUC_FW_BLOB_MMP(prefix_, major_, minor_, patch_) \
204 	UC_FW_BLOB_OLD(major_, minor_, patch_, \
205 		       MAKE_HUC_FW_PATH_MMP(prefix_, major_, minor_, patch_))
206 
207 #define HUC_FW_BLOB_GSC(prefix_) \
208 	UC_FW_BLOB_NEW(0, 0, 0, true, MAKE_HUC_FW_PATH_GSC(prefix_))
209 
210 struct __packed uc_fw_platform_requirement {
211 	enum intel_platform p;
212 	u8 rev; /* first platform rev using this FW */
213 	const struct uc_fw_blob blob;
214 };
215 
216 #define MAKE_FW_LIST(platform_, revid_, uc_) \
217 { \
218 	.p = INTEL_##platform_, \
219 	.rev = revid_, \
220 	.blob = uc_, \
221 },
222 
223 struct fw_blobs_by_type {
224 	const struct uc_fw_platform_requirement *blobs;
225 	u32 count;
226 };
227 
228 static void
229 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
230 {
231 	static const struct uc_fw_platform_requirement blobs_guc[] = {
232 		INTEL_GUC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, GUC_FW_BLOB_MMP)
233 	};
234 	static const struct uc_fw_platform_requirement blobs_huc[] = {
235 		INTEL_HUC_FIRMWARE_DEFS(MAKE_FW_LIST, HUC_FW_BLOB, HUC_FW_BLOB_MMP, HUC_FW_BLOB_GSC)
236 	};
237 	static const struct fw_blobs_by_type blobs_all[INTEL_UC_FW_NUM_TYPES] = {
238 		[INTEL_UC_FW_TYPE_GUC] = { blobs_guc, ARRAY_SIZE(blobs_guc) },
239 		[INTEL_UC_FW_TYPE_HUC] = { blobs_huc, ARRAY_SIZE(blobs_huc) },
240 	};
241 	static bool verified;
242 	const struct uc_fw_platform_requirement *fw_blobs;
243 	enum intel_platform p = INTEL_INFO(i915)->platform;
244 	u32 fw_count;
245 	u8 rev = INTEL_REVID(i915);
246 	int i;
247 	bool found;
248 
249 	/*
250 	 * The only difference between the ADL GuC FWs is the HWConfig support.
251 	 * ADL-N does not support HWConfig, so we should use the same binary as
252 	 * ADL-S, otherwise the GuC might attempt to fetch a config table that
253 	 * does not exist.
254 	 */
255 	if (IS_ADLP_N(i915))
256 		p = INTEL_ALDERLAKE_S;
257 
258 	GEM_BUG_ON(uc_fw->type >= ARRAY_SIZE(blobs_all));
259 	fw_blobs = blobs_all[uc_fw->type].blobs;
260 	fw_count = blobs_all[uc_fw->type].count;
261 
262 	found = false;
263 	for (i = 0; i < fw_count && p <= fw_blobs[i].p; i++) {
264 		const struct uc_fw_blob *blob = &fw_blobs[i].blob;
265 
266 		if (p != fw_blobs[i].p)
267 			continue;
268 
269 		if (rev < fw_blobs[i].rev)
270 			continue;
271 
272 		if (uc_fw->file_selected.path) {
273 			if (uc_fw->file_selected.path == blob->path)
274 				uc_fw->file_selected.path = NULL;
275 
276 			continue;
277 		}
278 
279 		uc_fw->file_selected.path = blob->path;
280 		uc_fw->file_wanted.path = blob->path;
281 		uc_fw->file_wanted.major_ver = blob->major;
282 		uc_fw->file_wanted.minor_ver = blob->minor;
283 		uc_fw->loaded_via_gsc = blob->loaded_via_gsc;
284 		found = true;
285 		break;
286 	}
287 
288 	if (!found && uc_fw->file_selected.path) {
289 		/* Failed to find a match for the last attempt?! */
290 		uc_fw->file_selected.path = NULL;
291 	}
292 
293 	/* make sure the list is ordered as expected */
294 	if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST) && !verified) {
295 		verified = true;
296 
297 		for (i = 1; i < fw_count; i++) {
298 			/* Next platform is good: */
299 			if (fw_blobs[i].p < fw_blobs[i - 1].p)
300 				continue;
301 
302 			/* Next platform revision is good: */
303 			if (fw_blobs[i].p == fw_blobs[i - 1].p &&
304 			    fw_blobs[i].rev < fw_blobs[i - 1].rev)
305 				continue;
306 
307 			/* Platform/revision must be in order: */
308 			if (fw_blobs[i].p != fw_blobs[i - 1].p ||
309 			    fw_blobs[i].rev != fw_blobs[i - 1].rev)
310 				goto bad;
311 
312 			/* Next major version is good: */
313 			if (fw_blobs[i].blob.major < fw_blobs[i - 1].blob.major)
314 				continue;
315 
316 			/* New must be before legacy: */
317 			if (!fw_blobs[i].blob.legacy && fw_blobs[i - 1].blob.legacy)
318 				goto bad;
319 
320 			/* New to legacy also means 0.0 to X.Y (HuC), or X.0 to X.Y (GuC) */
321 			if (fw_blobs[i].blob.legacy && !fw_blobs[i - 1].blob.legacy) {
322 				if (!fw_blobs[i - 1].blob.major)
323 					continue;
324 
325 				if (fw_blobs[i].blob.major == fw_blobs[i - 1].blob.major)
326 					continue;
327 			}
328 
329 			/* Major versions must be in order: */
330 			if (fw_blobs[i].blob.major != fw_blobs[i - 1].blob.major)
331 				goto bad;
332 
333 			/* Next minor version is good: */
334 			if (fw_blobs[i].blob.minor < fw_blobs[i - 1].blob.minor)
335 				continue;
336 
337 			/* Minor versions must be in order: */
338 			if (fw_blobs[i].blob.minor != fw_blobs[i - 1].blob.minor)
339 				goto bad;
340 
341 			/* Patch versions must be in order: */
342 			if (fw_blobs[i].blob.patch <= fw_blobs[i - 1].blob.patch)
343 				continue;
344 
345 bad:
346 			drm_err(&i915->drm, "Invalid FW blob order: %s r%u %s%d.%d.%d comes before %s r%u %s%d.%d.%d\n",
347 				intel_platform_name(fw_blobs[i - 1].p), fw_blobs[i - 1].rev,
348 				fw_blobs[i - 1].blob.legacy ? "L" : "v",
349 				fw_blobs[i - 1].blob.major,
350 				fw_blobs[i - 1].blob.minor,
351 				fw_blobs[i - 1].blob.patch,
352 				intel_platform_name(fw_blobs[i].p), fw_blobs[i].rev,
353 				fw_blobs[i].blob.legacy ? "L" : "v",
354 				fw_blobs[i].blob.major,
355 				fw_blobs[i].blob.minor,
356 				fw_blobs[i].blob.patch);
357 
358 			uc_fw->file_selected.path = NULL;
359 		}
360 	}
361 }
362 
363 static const char *__override_guc_firmware_path(struct drm_i915_private *i915)
364 {
365 	if (i915->params.enable_guc & ENABLE_GUC_MASK)
366 		return i915->params.guc_firmware_path;
367 	return "";
368 }
369 
370 static const char *__override_huc_firmware_path(struct drm_i915_private *i915)
371 {
372 	if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC)
373 		return i915->params.huc_firmware_path;
374 	return "";
375 }
376 
377 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
378 {
379 	const char *path = NULL;
380 
381 	switch (uc_fw->type) {
382 	case INTEL_UC_FW_TYPE_GUC:
383 		path = __override_guc_firmware_path(i915);
384 		break;
385 	case INTEL_UC_FW_TYPE_HUC:
386 		path = __override_huc_firmware_path(i915);
387 		break;
388 	}
389 
390 	if (unlikely(path)) {
391 		uc_fw->file_selected.path = path;
392 		uc_fw->user_overridden = true;
393 	}
394 }
395 
396 /**
397  * intel_uc_fw_init_early - initialize the uC object and select the firmware
398  * @uc_fw: uC firmware
399  * @type: type of uC
400  *
401  * Initialize the state of our uC object and relevant tracking and select the
402  * firmware to fetch and load.
403  */
404 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
405 			    enum intel_uc_fw_type type)
406 {
407 	struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915;
408 
409 	/*
410 	 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status
411 	 * before we're looked at the HW caps to see if we have uc support
412 	 */
413 	BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED);
414 	GEM_BUG_ON(uc_fw->status);
415 	GEM_BUG_ON(uc_fw->file_selected.path);
416 
417 	uc_fw->type = type;
418 
419 	if (HAS_GT_UC(i915)) {
420 		__uc_fw_auto_select(i915, uc_fw);
421 		__uc_fw_user_override(i915, uc_fw);
422 	}
423 
424 	intel_uc_fw_change_status(uc_fw, uc_fw->file_selected.path ? *uc_fw->file_selected.path ?
425 				  INTEL_UC_FIRMWARE_SELECTED :
426 				  INTEL_UC_FIRMWARE_DISABLED :
427 				  INTEL_UC_FIRMWARE_NOT_SUPPORTED);
428 }
429 
430 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e)
431 {
432 	struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915;
433 	bool user = e == -EINVAL;
434 
435 	if (i915_inject_probe_error(i915, e)) {
436 		/* non-existing blob */
437 		uc_fw->file_selected.path = "<invalid>";
438 		uc_fw->user_overridden = user;
439 	} else if (i915_inject_probe_error(i915, e)) {
440 		/* require next major version */
441 		uc_fw->file_wanted.major_ver += 1;
442 		uc_fw->file_wanted.minor_ver = 0;
443 		uc_fw->user_overridden = user;
444 	} else if (i915_inject_probe_error(i915, e)) {
445 		/* require next minor version */
446 		uc_fw->file_wanted.minor_ver += 1;
447 		uc_fw->user_overridden = user;
448 	} else if (uc_fw->file_wanted.major_ver &&
449 		   i915_inject_probe_error(i915, e)) {
450 		/* require prev major version */
451 		uc_fw->file_wanted.major_ver -= 1;
452 		uc_fw->file_wanted.minor_ver = 0;
453 		uc_fw->user_overridden = user;
454 	} else if (uc_fw->file_wanted.minor_ver &&
455 		   i915_inject_probe_error(i915, e)) {
456 		/* require prev minor version - hey, this should work! */
457 		uc_fw->file_wanted.minor_ver -= 1;
458 		uc_fw->user_overridden = user;
459 	} else if (user && i915_inject_probe_error(i915, e)) {
460 		/* officially unsupported platform */
461 		uc_fw->file_wanted.major_ver = 0;
462 		uc_fw->file_wanted.minor_ver = 0;
463 		uc_fw->user_overridden = true;
464 	}
465 }
466 
467 static int check_gsc_manifest(const struct firmware *fw,
468 			      struct intel_uc_fw *uc_fw)
469 {
470 	u32 *dw = (u32 *)fw->data;
471 	u32 version_hi = dw[HUC_GSC_VERSION_HI_DW];
472 	u32 version_lo = dw[HUC_GSC_VERSION_LO_DW];
473 
474 	uc_fw->file_selected.major_ver = FIELD_GET(HUC_GSC_MAJOR_VER_HI_MASK, version_hi);
475 	uc_fw->file_selected.minor_ver = FIELD_GET(HUC_GSC_MINOR_VER_HI_MASK, version_hi);
476 	uc_fw->file_selected.patch_ver = FIELD_GET(HUC_GSC_PATCH_VER_LO_MASK, version_lo);
477 
478 	return 0;
479 }
480 
481 static int check_ccs_header(struct drm_i915_private *i915,
482 			    const struct firmware *fw,
483 			    struct intel_uc_fw *uc_fw)
484 {
485 	struct uc_css_header *css;
486 	size_t size;
487 
488 	/* Check the size of the blob before examining buffer contents */
489 	if (unlikely(fw->size < sizeof(struct uc_css_header))) {
490 		drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n",
491 			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
492 			 fw->size, sizeof(struct uc_css_header));
493 		return -ENODATA;
494 	}
495 
496 	css = (struct uc_css_header *)fw->data;
497 
498 	/* Check integrity of size values inside CSS header */
499 	size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw -
500 		css->exponent_size_dw) * sizeof(u32);
501 	if (unlikely(size != sizeof(struct uc_css_header))) {
502 		drm_warn(&i915->drm,
503 			 "%s firmware %s: unexpected header size: %zu != %zu\n",
504 			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
505 			 fw->size, sizeof(struct uc_css_header));
506 		return -EPROTO;
507 	}
508 
509 	/* uCode size must calculated from other sizes */
510 	uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
511 
512 	/* now RSA */
513 	uc_fw->rsa_size = css->key_size_dw * sizeof(u32);
514 
515 	/* At least, it should have header, uCode and RSA. Size of all three. */
516 	size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size;
517 	if (unlikely(fw->size < size)) {
518 		drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n",
519 			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
520 			 fw->size, size);
521 		return -ENOEXEC;
522 	}
523 
524 	/* Sanity check whether this fw is not larger than whole WOPCM memory */
525 	size = __intel_uc_fw_get_upload_size(uc_fw);
526 	if (unlikely(size >= i915->wopcm.size)) {
527 		drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n",
528 			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
529 			 size, (size_t)i915->wopcm.size);
530 		return -E2BIG;
531 	}
532 
533 	/* Get version numbers from the CSS header */
534 	uc_fw->file_selected.major_ver = FIELD_GET(CSS_SW_VERSION_UC_MAJOR,
535 						   css->sw_version);
536 	uc_fw->file_selected.minor_ver = FIELD_GET(CSS_SW_VERSION_UC_MINOR,
537 						   css->sw_version);
538 	uc_fw->file_selected.patch_ver = FIELD_GET(CSS_SW_VERSION_UC_PATCH,
539 						   css->sw_version);
540 
541 	if (uc_fw->type == INTEL_UC_FW_TYPE_GUC)
542 		uc_fw->private_data_size = css->private_data_size;
543 
544 	return 0;
545 }
546 
547 /**
548  * intel_uc_fw_fetch - fetch uC firmware
549  * @uc_fw: uC firmware
550  *
551  * Fetch uC firmware into GEM obj.
552  *
553  * Return: 0 on success, a negative errno code on failure.
554  */
555 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
556 {
557 	struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915;
558 	struct intel_uc_fw_file file_ideal;
559 	struct device *dev = i915->drm.dev;
560 	struct drm_i915_gem_object *obj;
561 	const struct firmware *fw = NULL;
562 	bool old_ver = false;
563 	int err;
564 
565 	GEM_BUG_ON(!i915->wopcm.size);
566 	GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw));
567 
568 	err = i915_inject_probe_error(i915, -ENXIO);
569 	if (err)
570 		goto fail;
571 
572 	__force_fw_fetch_failures(uc_fw, -EINVAL);
573 	__force_fw_fetch_failures(uc_fw, -ESTALE);
574 
575 	err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev);
576 	memcpy(&file_ideal, &uc_fw->file_wanted, sizeof(file_ideal));
577 
578 	/* Any error is terminal if overriding. Don't bother searching for older versions */
579 	if (err && intel_uc_fw_is_overridden(uc_fw))
580 		goto fail;
581 
582 	while (err == -ENOENT) {
583 		old_ver = true;
584 
585 		__uc_fw_auto_select(i915, uc_fw);
586 		if (!uc_fw->file_selected.path) {
587 			/*
588 			 * No more options! But set the path back to something
589 			 * valid just in case it gets dereferenced.
590 			 */
591 			uc_fw->file_selected.path = file_ideal.path;
592 
593 			/* Also, preserve the version that was really wanted */
594 			memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted));
595 			break;
596 		}
597 
598 		err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev);
599 	}
600 
601 	if (err)
602 		goto fail;
603 
604 	if (uc_fw->loaded_via_gsc)
605 		err = check_gsc_manifest(fw, uc_fw);
606 	else
607 		err = check_ccs_header(i915, fw, uc_fw);
608 	if (err)
609 		goto fail;
610 
611 	if (uc_fw->file_wanted.major_ver) {
612 		/* Check the file's major version was as it claimed */
613 		if (uc_fw->file_selected.major_ver != uc_fw->file_wanted.major_ver) {
614 			drm_notice(&i915->drm, "%s firmware %s: unexpected version: %u.%u != %u.%u\n",
615 				   intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
616 				   uc_fw->file_selected.major_ver, uc_fw->file_selected.minor_ver,
617 				   uc_fw->file_wanted.major_ver, uc_fw->file_wanted.minor_ver);
618 			if (!intel_uc_fw_is_overridden(uc_fw)) {
619 				err = -ENOEXEC;
620 				goto fail;
621 			}
622 		} else {
623 			if (uc_fw->file_selected.minor_ver < uc_fw->file_wanted.minor_ver)
624 				old_ver = true;
625 		}
626 	}
627 
628 	if (old_ver) {
629 		/* Preserve the version that was really wanted */
630 		memcpy(&uc_fw->file_wanted, &file_ideal, sizeof(uc_fw->file_wanted));
631 
632 		drm_notice(&i915->drm,
633 			   "%s firmware %s (%d.%d) is recommended, but only %s (%d.%d) was found\n",
634 			   intel_uc_fw_type_repr(uc_fw->type),
635 			   uc_fw->file_wanted.path,
636 			   uc_fw->file_wanted.major_ver, uc_fw->file_wanted.minor_ver,
637 			   uc_fw->file_selected.path,
638 			   uc_fw->file_selected.major_ver, uc_fw->file_selected.minor_ver);
639 		drm_info(&i915->drm,
640 			 "Consider updating your linux-firmware pkg or downloading from %s\n",
641 			 INTEL_UC_FIRMWARE_URL);
642 	}
643 
644 	if (HAS_LMEM(i915)) {
645 		obj = i915_gem_object_create_lmem_from_data(i915, fw->data, fw->size);
646 		if (!IS_ERR(obj))
647 			obj->flags |= I915_BO_ALLOC_PM_EARLY;
648 	} else {
649 		obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
650 	}
651 
652 	if (IS_ERR(obj)) {
653 		err = PTR_ERR(obj);
654 		goto fail;
655 	}
656 
657 	uc_fw->obj = obj;
658 	uc_fw->size = fw->size;
659 	intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE);
660 
661 	release_firmware(fw);
662 	return 0;
663 
664 fail:
665 	intel_uc_fw_change_status(uc_fw, err == -ENOENT ?
666 				  INTEL_UC_FIRMWARE_MISSING :
667 				  INTEL_UC_FIRMWARE_ERROR);
668 
669 	i915_probe_error(i915, "%s firmware %s: fetch failed with error %d\n",
670 			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path, err);
671 	drm_info(&i915->drm, "%s firmware(s) can be downloaded from %s\n",
672 		 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL);
673 
674 	release_firmware(fw);		/* OK even if fw is NULL */
675 	return err;
676 }
677 
678 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw)
679 {
680 	struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
681 	struct drm_mm_node *node = &ggtt->uc_fw;
682 
683 	GEM_BUG_ON(!drm_mm_node_allocated(node));
684 	GEM_BUG_ON(upper_32_bits(node->start));
685 	GEM_BUG_ON(upper_32_bits(node->start + node->size - 1));
686 
687 	return lower_32_bits(node->start);
688 }
689 
690 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw)
691 {
692 	struct drm_i915_gem_object *obj = uc_fw->obj;
693 	struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
694 	struct i915_vma_resource *dummy = &uc_fw->dummy;
695 	u32 pte_flags = 0;
696 
697 	dummy->start = uc_fw_ggtt_offset(uc_fw);
698 	dummy->node_size = obj->base.size;
699 	dummy->bi.pages = obj->mm.pages;
700 
701 	GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
702 	GEM_BUG_ON(dummy->node_size > ggtt->uc_fw.size);
703 
704 	/* uc_fw->obj cache domains were not controlled across suspend */
705 	if (i915_gem_object_has_struct_page(obj))
706 		drm_clflush_sg(dummy->bi.pages);
707 
708 	if (i915_gem_object_is_lmem(obj))
709 		pte_flags |= PTE_LM;
710 
711 	if (ggtt->vm.raw_insert_entries)
712 		ggtt->vm.raw_insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags);
713 	else
714 		ggtt->vm.insert_entries(&ggtt->vm, dummy, I915_CACHE_NONE, pte_flags);
715 }
716 
717 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw)
718 {
719 	struct drm_i915_gem_object *obj = uc_fw->obj;
720 	struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
721 	u64 start = uc_fw_ggtt_offset(uc_fw);
722 
723 	ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size);
724 }
725 
726 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags)
727 {
728 	struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
729 	struct intel_uncore *uncore = gt->uncore;
730 	u64 offset;
731 	int ret;
732 
733 	ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT);
734 	if (ret)
735 		return ret;
736 
737 	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
738 
739 	/* Set the source address for the uCode */
740 	offset = uc_fw_ggtt_offset(uc_fw);
741 	GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000);
742 	intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset));
743 	intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset));
744 
745 	/* Set the DMA destination */
746 	intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset);
747 	intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);
748 
749 	/*
750 	 * Set the transfer size. The header plus uCode will be copied to WOPCM
751 	 * via DMA, excluding any other components
752 	 */
753 	intel_uncore_write_fw(uncore, DMA_COPY_SIZE,
754 			      sizeof(struct uc_css_header) + uc_fw->ucode_size);
755 
756 	/* Start the DMA */
757 	intel_uncore_write_fw(uncore, DMA_CTRL,
758 			      _MASKED_BIT_ENABLE(dma_flags | START_DMA));
759 
760 	/* Wait for DMA to finish */
761 	ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100);
762 	if (ret)
763 		drm_err(&gt->i915->drm, "DMA for %s fw failed, DMA_CTRL=%u\n",
764 			intel_uc_fw_type_repr(uc_fw->type),
765 			intel_uncore_read_fw(uncore, DMA_CTRL));
766 
767 	/* Disable the bits once DMA is over */
768 	intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags));
769 
770 	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
771 
772 	return ret;
773 }
774 
775 /**
776  * intel_uc_fw_upload - load uC firmware using custom loader
777  * @uc_fw: uC firmware
778  * @dst_offset: destination offset
779  * @dma_flags: flags for flags for dma ctrl
780  *
781  * Loads uC firmware and updates internal flags.
782  *
783  * Return: 0 on success, non-zero on failure.
784  */
785 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags)
786 {
787 	struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
788 	int err;
789 
790 	/* make sure the status was cleared the last time we reset the uc */
791 	GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw));
792 
793 	err = i915_inject_probe_error(gt->i915, -ENOEXEC);
794 	if (err)
795 		return err;
796 
797 	if (!intel_uc_fw_is_loadable(uc_fw))
798 		return -ENOEXEC;
799 
800 	/* Call custom loader */
801 	uc_fw_bind_ggtt(uc_fw);
802 	err = uc_fw_xfer(uc_fw, dst_offset, dma_flags);
803 	uc_fw_unbind_ggtt(uc_fw);
804 	if (err)
805 		goto fail;
806 
807 	intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED);
808 	return 0;
809 
810 fail:
811 	i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n",
812 			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
813 			 err);
814 	intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_LOAD_FAIL);
815 	return err;
816 }
817 
818 static inline bool uc_fw_need_rsa_in_memory(struct intel_uc_fw *uc_fw)
819 {
820 	/*
821 	 * The HW reads the GuC RSA from memory if the key size is > 256 bytes,
822 	 * while it reads it from the 64 RSA registers if it is smaller.
823 	 * The HuC RSA is always read from memory.
824 	 */
825 	return uc_fw->type == INTEL_UC_FW_TYPE_HUC || uc_fw->rsa_size > 256;
826 }
827 
828 static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
829 {
830 	struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
831 	struct i915_vma *vma;
832 	size_t copied;
833 	void *vaddr;
834 	int err;
835 
836 	err = i915_inject_probe_error(gt->i915, -ENXIO);
837 	if (err)
838 		return err;
839 
840 	if (!uc_fw_need_rsa_in_memory(uc_fw))
841 		return 0;
842 
843 	/*
844 	 * uC firmwares will sit above GUC_GGTT_TOP and will not map through
845 	 * GGTT. Unfortunately, this means that the GuC HW cannot perform the uC
846 	 * authentication from memory, as the RSA offset now falls within the
847 	 * GuC inaccessible range. We resort to perma-pinning an additional vma
848 	 * within the accessible range that only contains the RSA signature.
849 	 * The GuC HW can use this extra pinning to perform the authentication
850 	 * since its GGTT offset will be GuC accessible.
851 	 */
852 	GEM_BUG_ON(uc_fw->rsa_size > PAGE_SIZE);
853 	vma = intel_guc_allocate_vma(&gt->uc.guc, PAGE_SIZE);
854 	if (IS_ERR(vma))
855 		return PTR_ERR(vma);
856 
857 	vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
858 						 i915_coherent_map_type(gt->i915, vma->obj, true));
859 	if (IS_ERR(vaddr)) {
860 		i915_vma_unpin_and_release(&vma, 0);
861 		err = PTR_ERR(vaddr);
862 		goto unpin_out;
863 	}
864 
865 	copied = intel_uc_fw_copy_rsa(uc_fw, vaddr, vma->size);
866 	i915_gem_object_unpin_map(vma->obj);
867 
868 	if (copied < uc_fw->rsa_size) {
869 		err = -ENOMEM;
870 		goto unpin_out;
871 	}
872 
873 	uc_fw->rsa_data = vma;
874 
875 	return 0;
876 
877 unpin_out:
878 	i915_vma_unpin_and_release(&vma, 0);
879 	return err;
880 }
881 
882 static void uc_fw_rsa_data_destroy(struct intel_uc_fw *uc_fw)
883 {
884 	i915_vma_unpin_and_release(&uc_fw->rsa_data, 0);
885 }
886 
887 int intel_uc_fw_init(struct intel_uc_fw *uc_fw)
888 {
889 	int err;
890 
891 	/* this should happen before the load! */
892 	GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw));
893 
894 	if (!intel_uc_fw_is_available(uc_fw))
895 		return -ENOEXEC;
896 
897 	err = i915_gem_object_pin_pages_unlocked(uc_fw->obj);
898 	if (err) {
899 		DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n",
900 				 intel_uc_fw_type_repr(uc_fw->type), err);
901 		goto out;
902 	}
903 
904 	err = uc_fw_rsa_data_create(uc_fw);
905 	if (err) {
906 		DRM_DEBUG_DRIVER("%s fw rsa data creation failed, err=%d\n",
907 				 intel_uc_fw_type_repr(uc_fw->type), err);
908 		goto out_unpin;
909 	}
910 
911 	return 0;
912 
913 out_unpin:
914 	i915_gem_object_unpin_pages(uc_fw->obj);
915 out:
916 	return err;
917 }
918 
919 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw)
920 {
921 	uc_fw_rsa_data_destroy(uc_fw);
922 
923 	if (i915_gem_object_has_pinned_pages(uc_fw->obj))
924 		i915_gem_object_unpin_pages(uc_fw->obj);
925 
926 	intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE);
927 }
928 
929 /**
930  * intel_uc_fw_cleanup_fetch - cleanup uC firmware
931  * @uc_fw: uC firmware
932  *
933  * Cleans up uC firmware by releasing the firmware GEM obj.
934  */
935 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw)
936 {
937 	if (!intel_uc_fw_is_available(uc_fw))
938 		return;
939 
940 	i915_gem_object_put(fetch_and_zero(&uc_fw->obj));
941 
942 	intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED);
943 }
944 
945 /**
946  * intel_uc_fw_copy_rsa - copy fw RSA to buffer
947  *
948  * @uc_fw: uC firmware
949  * @dst: dst buffer
950  * @max_len: max number of bytes to copy
951  *
952  * Return: number of copied bytes.
953  */
954 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len)
955 {
956 	struct intel_memory_region *mr = uc_fw->obj->mm.region;
957 	u32 size = min_t(u32, uc_fw->rsa_size, max_len);
958 	u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size;
959 	struct sgt_iter iter;
960 	size_t count = 0;
961 	int idx;
962 
963 	/* Called during reset handling, must be atomic [no fs_reclaim] */
964 	GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw));
965 
966 	idx = offset >> PAGE_SHIFT;
967 	offset = offset_in_page(offset);
968 	if (i915_gem_object_has_struct_page(uc_fw->obj)) {
969 		struct page *page;
970 
971 		for_each_sgt_page(page, iter, uc_fw->obj->mm.pages) {
972 			u32 len = min_t(u32, size, PAGE_SIZE - offset);
973 			void *vaddr;
974 
975 			if (idx > 0) {
976 				idx--;
977 				continue;
978 			}
979 
980 			vaddr = kmap_atomic(page);
981 			memcpy(dst, vaddr + offset, len);
982 			kunmap_atomic(vaddr);
983 
984 			offset = 0;
985 			dst += len;
986 			size -= len;
987 			count += len;
988 			if (!size)
989 				break;
990 		}
991 	} else {
992 		dma_addr_t addr;
993 
994 		for_each_sgt_daddr(addr, iter, uc_fw->obj->mm.pages) {
995 			u32 len = min_t(u32, size, PAGE_SIZE - offset);
996 			void __iomem *vaddr;
997 
998 			if (idx > 0) {
999 				idx--;
1000 				continue;
1001 			}
1002 
1003 			vaddr = io_mapping_map_atomic_wc(&mr->iomap,
1004 							 addr - mr->region.start);
1005 			memcpy_fromio(dst, vaddr + offset, len);
1006 			io_mapping_unmap_atomic(vaddr);
1007 
1008 			offset = 0;
1009 			dst += len;
1010 			size -= len;
1011 			count += len;
1012 			if (!size)
1013 				break;
1014 		}
1015 	}
1016 
1017 	return count;
1018 }
1019 
1020 /**
1021  * intel_uc_fw_dump - dump information about uC firmware
1022  * @uc_fw: uC firmware
1023  * @p: the &drm_printer
1024  *
1025  * Pretty printer for uC firmware.
1026  */
1027 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p)
1028 {
1029 	u32 ver_sel, ver_want;
1030 
1031 	drm_printf(p, "%s firmware: %s\n",
1032 		   intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path);
1033 	if (uc_fw->file_selected.path != uc_fw->file_wanted.path)
1034 		drm_printf(p, "%s firmware wanted: %s\n",
1035 			   intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_wanted.path);
1036 	drm_printf(p, "\tstatus: %s\n",
1037 		   intel_uc_fw_status_repr(uc_fw->status));
1038 	ver_sel = MAKE_UC_VER(uc_fw->file_selected.major_ver,
1039 			      uc_fw->file_selected.minor_ver,
1040 			      uc_fw->file_selected.patch_ver);
1041 	ver_want = MAKE_UC_VER(uc_fw->file_wanted.major_ver,
1042 			       uc_fw->file_wanted.minor_ver,
1043 			       uc_fw->file_wanted.patch_ver);
1044 	if (ver_sel < ver_want)
1045 		drm_printf(p, "\tversion: wanted %u.%u.%u, found %u.%u.%u\n",
1046 			   uc_fw->file_wanted.major_ver,
1047 			   uc_fw->file_wanted.minor_ver,
1048 			   uc_fw->file_wanted.patch_ver,
1049 			   uc_fw->file_selected.major_ver,
1050 			   uc_fw->file_selected.minor_ver,
1051 			   uc_fw->file_selected.patch_ver);
1052 	else
1053 		drm_printf(p, "\tversion: found %u.%u.%u\n",
1054 			   uc_fw->file_selected.major_ver,
1055 			   uc_fw->file_selected.minor_ver,
1056 			   uc_fw->file_selected.patch_ver);
1057 	drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size);
1058 	drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size);
1059 }
1060