1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016-2019 Intel Corporation 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/firmware.h> 8 #include <drm/drm_print.h> 9 10 #include "intel_uc_fw.h" 11 #include "intel_uc_fw_abi.h" 12 #include "i915_drv.h" 13 14 static inline struct intel_gt * 15 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type) 16 { 17 if (type == INTEL_UC_FW_TYPE_GUC) 18 return container_of(uc_fw, struct intel_gt, uc.guc.fw); 19 20 GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC); 21 return container_of(uc_fw, struct intel_gt, uc.huc.fw); 22 } 23 24 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw) 25 { 26 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); 27 return ____uc_fw_to_gt(uc_fw, uc_fw->type); 28 } 29 30 #ifdef CONFIG_DRM_I915_DEBUG_GUC 31 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, 32 enum intel_uc_fw_status status) 33 { 34 uc_fw->__status = status; 35 drm_dbg(&__uc_fw_to_gt(uc_fw)->i915->drm, 36 "%s firmware -> %s\n", 37 intel_uc_fw_type_repr(uc_fw->type), 38 status == INTEL_UC_FIRMWARE_SELECTED ? 39 uc_fw->path : intel_uc_fw_status_repr(status)); 40 } 41 #endif 42 43 /* 44 * List of required GuC and HuC binaries per-platform. 45 * Must be ordered based on platform + revid, from newer to older. 46 * 47 * Note that RKL uses the same firmware as TGL. 48 */ 49 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \ 50 fw_def(ROCKETLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ 51 fw_def(TIGERLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ 52 fw_def(JASPERLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ 53 fw_def(ELKHARTLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ 54 fw_def(ICELAKE, 0, guc_def(icl, 49, 0, 1), huc_def(icl, 9, 0, 0)) \ 55 fw_def(COMETLAKE, 5, guc_def(cml, 49, 0, 1), huc_def(cml, 4, 0, 0)) \ 56 fw_def(COMETLAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ 57 fw_def(COFFEELAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ 58 fw_def(GEMINILAKE, 0, guc_def(glk, 49, 0, 1), huc_def(glk, 4, 0, 0)) \ 59 fw_def(KABYLAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ 60 fw_def(BROXTON, 0, guc_def(bxt, 49, 0, 1), huc_def(bxt, 2, 0, 0)) \ 61 fw_def(SKYLAKE, 0, guc_def(skl, 49, 0, 1), huc_def(skl, 2, 0, 0)) 62 63 #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \ 64 "i915/" \ 65 __stringify(prefix_) name_ \ 66 __stringify(major_) "." \ 67 __stringify(minor_) "." \ 68 __stringify(patch_) ".bin" 69 70 #define MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_) \ 71 __MAKE_UC_FW_PATH(prefix_, "_guc_", major_, minor_, patch_) 72 73 #define MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_) \ 74 __MAKE_UC_FW_PATH(prefix_, "_huc_", major_, minor_, bld_num_) 75 76 /* All blobs need to be declared via MODULE_FIRMWARE() */ 77 #define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \ 78 MODULE_FIRMWARE(guc_); \ 79 MODULE_FIRMWARE(huc_); 80 81 INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH) 82 83 /* The below structs and macros are used to iterate across the list of blobs */ 84 struct __packed uc_fw_blob { 85 u8 major; 86 u8 minor; 87 const char *path; 88 }; 89 90 #define UC_FW_BLOB(major_, minor_, path_) \ 91 { .major = major_, .minor = minor_, .path = path_ } 92 93 #define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \ 94 UC_FW_BLOB(major_, minor_, \ 95 MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_)) 96 97 #define HUC_FW_BLOB(prefix_, major_, minor_, bld_num_) \ 98 UC_FW_BLOB(major_, minor_, \ 99 MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_)) 100 101 struct __packed uc_fw_platform_requirement { 102 enum intel_platform p; 103 u8 rev; /* first platform rev using this FW */ 104 const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES]; 105 }; 106 107 #define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \ 108 { \ 109 .p = INTEL_##platform_, \ 110 .rev = revid_, \ 111 .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \ 112 .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \ 113 }, 114 115 static void 116 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 117 { 118 static const struct uc_fw_platform_requirement fw_blobs[] = { 119 INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB) 120 }; 121 enum intel_platform p = INTEL_INFO(i915)->platform; 122 u8 rev = INTEL_REVID(i915); 123 int i; 124 125 for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) { 126 if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) { 127 const struct uc_fw_blob *blob = 128 &fw_blobs[i].blobs[uc_fw->type]; 129 uc_fw->path = blob->path; 130 uc_fw->major_ver_wanted = blob->major; 131 uc_fw->minor_ver_wanted = blob->minor; 132 break; 133 } 134 } 135 136 /* make sure the list is ordered as expected */ 137 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) { 138 for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) { 139 if (fw_blobs[i].p < fw_blobs[i - 1].p) 140 continue; 141 142 if (fw_blobs[i].p == fw_blobs[i - 1].p && 143 fw_blobs[i].rev < fw_blobs[i - 1].rev) 144 continue; 145 146 pr_err("invalid FW blob order: %s r%u comes before %s r%u\n", 147 intel_platform_name(fw_blobs[i - 1].p), 148 fw_blobs[i - 1].rev, 149 intel_platform_name(fw_blobs[i].p), 150 fw_blobs[i].rev); 151 152 uc_fw->path = NULL; 153 } 154 } 155 } 156 157 static const char *__override_guc_firmware_path(struct drm_i915_private *i915) 158 { 159 if (i915->params.enable_guc & ENABLE_GUC_MASK) 160 return i915->params.guc_firmware_path; 161 return ""; 162 } 163 164 static const char *__override_huc_firmware_path(struct drm_i915_private *i915) 165 { 166 if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC) 167 return i915->params.huc_firmware_path; 168 return ""; 169 } 170 171 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 172 { 173 const char *path = NULL; 174 175 switch (uc_fw->type) { 176 case INTEL_UC_FW_TYPE_GUC: 177 path = __override_guc_firmware_path(i915); 178 break; 179 case INTEL_UC_FW_TYPE_HUC: 180 path = __override_huc_firmware_path(i915); 181 break; 182 } 183 184 if (unlikely(path)) { 185 uc_fw->path = path; 186 uc_fw->user_overridden = true; 187 } 188 } 189 190 /** 191 * intel_uc_fw_init_early - initialize the uC object and select the firmware 192 * @uc_fw: uC firmware 193 * @type: type of uC 194 * 195 * Initialize the state of our uC object and relevant tracking and select the 196 * firmware to fetch and load. 197 */ 198 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, 199 enum intel_uc_fw_type type) 200 { 201 struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915; 202 203 /* 204 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status 205 * before we're looked at the HW caps to see if we have uc support 206 */ 207 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED); 208 GEM_BUG_ON(uc_fw->status); 209 GEM_BUG_ON(uc_fw->path); 210 211 uc_fw->type = type; 212 213 if (HAS_GT_UC(i915)) { 214 __uc_fw_auto_select(i915, uc_fw); 215 __uc_fw_user_override(i915, uc_fw); 216 } 217 218 intel_uc_fw_change_status(uc_fw, uc_fw->path ? *uc_fw->path ? 219 INTEL_UC_FIRMWARE_SELECTED : 220 INTEL_UC_FIRMWARE_DISABLED : 221 INTEL_UC_FIRMWARE_NOT_SUPPORTED); 222 } 223 224 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e) 225 { 226 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 227 bool user = e == -EINVAL; 228 229 if (i915_inject_probe_error(i915, e)) { 230 /* non-existing blob */ 231 uc_fw->path = "<invalid>"; 232 uc_fw->user_overridden = user; 233 } else if (i915_inject_probe_error(i915, e)) { 234 /* require next major version */ 235 uc_fw->major_ver_wanted += 1; 236 uc_fw->minor_ver_wanted = 0; 237 uc_fw->user_overridden = user; 238 } else if (i915_inject_probe_error(i915, e)) { 239 /* require next minor version */ 240 uc_fw->minor_ver_wanted += 1; 241 uc_fw->user_overridden = user; 242 } else if (uc_fw->major_ver_wanted && 243 i915_inject_probe_error(i915, e)) { 244 /* require prev major version */ 245 uc_fw->major_ver_wanted -= 1; 246 uc_fw->minor_ver_wanted = 0; 247 uc_fw->user_overridden = user; 248 } else if (uc_fw->minor_ver_wanted && 249 i915_inject_probe_error(i915, e)) { 250 /* require prev minor version - hey, this should work! */ 251 uc_fw->minor_ver_wanted -= 1; 252 uc_fw->user_overridden = user; 253 } else if (user && i915_inject_probe_error(i915, e)) { 254 /* officially unsupported platform */ 255 uc_fw->major_ver_wanted = 0; 256 uc_fw->minor_ver_wanted = 0; 257 uc_fw->user_overridden = true; 258 } 259 } 260 261 /** 262 * intel_uc_fw_fetch - fetch uC firmware 263 * @uc_fw: uC firmware 264 * 265 * Fetch uC firmware into GEM obj. 266 * 267 * Return: 0 on success, a negative errno code on failure. 268 */ 269 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) 270 { 271 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 272 struct device *dev = i915->drm.dev; 273 struct drm_i915_gem_object *obj; 274 const struct firmware *fw = NULL; 275 struct uc_css_header *css; 276 size_t size; 277 int err; 278 279 GEM_BUG_ON(!i915->wopcm.size); 280 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw)); 281 282 err = i915_inject_probe_error(i915, -ENXIO); 283 if (err) 284 goto fail; 285 286 __force_fw_fetch_failures(uc_fw, -EINVAL); 287 __force_fw_fetch_failures(uc_fw, -ESTALE); 288 289 err = request_firmware(&fw, uc_fw->path, dev); 290 if (err) 291 goto fail; 292 293 /* Check the size of the blob before examining buffer contents */ 294 if (unlikely(fw->size < sizeof(struct uc_css_header))) { 295 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 296 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 297 fw->size, sizeof(struct uc_css_header)); 298 err = -ENODATA; 299 goto fail; 300 } 301 302 css = (struct uc_css_header *)fw->data; 303 304 /* Check integrity of size values inside CSS header */ 305 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw - 306 css->exponent_size_dw) * sizeof(u32); 307 if (unlikely(size != sizeof(struct uc_css_header))) { 308 drm_warn(&i915->drm, 309 "%s firmware %s: unexpected header size: %zu != %zu\n", 310 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 311 fw->size, sizeof(struct uc_css_header)); 312 err = -EPROTO; 313 goto fail; 314 } 315 316 /* uCode size must calculated from other sizes */ 317 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); 318 319 /* now RSA */ 320 if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) { 321 drm_warn(&i915->drm, "%s firmware %s: unexpected key size: %u != %u\n", 322 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 323 css->key_size_dw, UOS_RSA_SCRATCH_COUNT); 324 err = -EPROTO; 325 goto fail; 326 } 327 uc_fw->rsa_size = css->key_size_dw * sizeof(u32); 328 329 /* At least, it should have header, uCode and RSA. Size of all three. */ 330 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size; 331 if (unlikely(fw->size < size)) { 332 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 333 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 334 fw->size, size); 335 err = -ENOEXEC; 336 goto fail; 337 } 338 339 /* Sanity check whether this fw is not larger than whole WOPCM memory */ 340 size = __intel_uc_fw_get_upload_size(uc_fw); 341 if (unlikely(size >= i915->wopcm.size)) { 342 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n", 343 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 344 size, (size_t)i915->wopcm.size); 345 err = -E2BIG; 346 goto fail; 347 } 348 349 /* Get version numbers from the CSS header */ 350 uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MAJOR, 351 css->sw_version); 352 uc_fw->minor_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MINOR, 353 css->sw_version); 354 355 if (uc_fw->major_ver_found != uc_fw->major_ver_wanted || 356 uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) { 357 drm_notice(&i915->drm, "%s firmware %s: unexpected version: %u.%u != %u.%u\n", 358 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 359 uc_fw->major_ver_found, uc_fw->minor_ver_found, 360 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted); 361 if (!intel_uc_fw_is_overridden(uc_fw)) { 362 err = -ENOEXEC; 363 goto fail; 364 } 365 } 366 367 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC) 368 uc_fw->private_data_size = css->private_data_size; 369 370 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); 371 if (IS_ERR(obj)) { 372 err = PTR_ERR(obj); 373 goto fail; 374 } 375 376 uc_fw->obj = obj; 377 uc_fw->size = fw->size; 378 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 379 380 release_firmware(fw); 381 return 0; 382 383 fail: 384 intel_uc_fw_change_status(uc_fw, err == -ENOENT ? 385 INTEL_UC_FIRMWARE_MISSING : 386 INTEL_UC_FIRMWARE_ERROR); 387 388 drm_notice(&i915->drm, "%s firmware %s: fetch failed with error %d\n", 389 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err); 390 drm_info(&i915->drm, "%s firmware(s) can be downloaded from %s\n", 391 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL); 392 393 release_firmware(fw); /* OK even if fw is NULL */ 394 return err; 395 } 396 397 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw) 398 { 399 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 400 struct drm_mm_node *node = &ggtt->uc_fw; 401 402 GEM_BUG_ON(!drm_mm_node_allocated(node)); 403 GEM_BUG_ON(upper_32_bits(node->start)); 404 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1)); 405 406 return lower_32_bits(node->start); 407 } 408 409 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw) 410 { 411 struct drm_i915_gem_object *obj = uc_fw->obj; 412 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 413 struct i915_vma dummy = { 414 .node.start = uc_fw_ggtt_offset(uc_fw), 415 .node.size = obj->base.size, 416 .pages = obj->mm.pages, 417 .vm = &ggtt->vm, 418 }; 419 420 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); 421 GEM_BUG_ON(dummy.node.size > ggtt->uc_fw.size); 422 423 /* uc_fw->obj cache domains were not controlled across suspend */ 424 drm_clflush_sg(dummy.pages); 425 426 ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0); 427 } 428 429 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw) 430 { 431 struct drm_i915_gem_object *obj = uc_fw->obj; 432 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 433 u64 start = uc_fw_ggtt_offset(uc_fw); 434 435 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); 436 } 437 438 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 439 { 440 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 441 struct intel_uncore *uncore = gt->uncore; 442 u64 offset; 443 int ret; 444 445 ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT); 446 if (ret) 447 return ret; 448 449 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); 450 451 /* Set the source address for the uCode */ 452 offset = uc_fw_ggtt_offset(uc_fw); 453 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000); 454 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); 455 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); 456 457 /* Set the DMA destination */ 458 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset); 459 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); 460 461 /* 462 * Set the transfer size. The header plus uCode will be copied to WOPCM 463 * via DMA, excluding any other components 464 */ 465 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, 466 sizeof(struct uc_css_header) + uc_fw->ucode_size); 467 468 /* Start the DMA */ 469 intel_uncore_write_fw(uncore, DMA_CTRL, 470 _MASKED_BIT_ENABLE(dma_flags | START_DMA)); 471 472 /* Wait for DMA to finish */ 473 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100); 474 if (ret) 475 drm_err(>->i915->drm, "DMA for %s fw failed, DMA_CTRL=%u\n", 476 intel_uc_fw_type_repr(uc_fw->type), 477 intel_uncore_read_fw(uncore, DMA_CTRL)); 478 479 /* Disable the bits once DMA is over */ 480 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); 481 482 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL); 483 484 return ret; 485 } 486 487 /** 488 * intel_uc_fw_upload - load uC firmware using custom loader 489 * @uc_fw: uC firmware 490 * @dst_offset: destination offset 491 * @dma_flags: flags for flags for dma ctrl 492 * 493 * Loads uC firmware and updates internal flags. 494 * 495 * Return: 0 on success, non-zero on failure. 496 */ 497 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 498 { 499 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 500 int err; 501 502 /* make sure the status was cleared the last time we reset the uc */ 503 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 504 505 err = i915_inject_probe_error(gt->i915, -ENOEXEC); 506 if (err) 507 return err; 508 509 if (!intel_uc_fw_is_loadable(uc_fw)) 510 return -ENOEXEC; 511 512 /* Call custom loader */ 513 uc_fw_bind_ggtt(uc_fw); 514 err = uc_fw_xfer(uc_fw, dst_offset, dma_flags); 515 uc_fw_unbind_ggtt(uc_fw); 516 if (err) 517 goto fail; 518 519 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); 520 return 0; 521 522 fail: 523 i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", 524 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 525 err); 526 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 527 return err; 528 } 529 530 int intel_uc_fw_init(struct intel_uc_fw *uc_fw) 531 { 532 int err; 533 534 /* this should happen before the load! */ 535 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 536 537 if (!intel_uc_fw_is_available(uc_fw)) 538 return -ENOEXEC; 539 540 err = i915_gem_object_pin_pages(uc_fw->obj); 541 if (err) { 542 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", 543 intel_uc_fw_type_repr(uc_fw->type), err); 544 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 545 } 546 547 return err; 548 } 549 550 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) 551 { 552 if (i915_gem_object_has_pinned_pages(uc_fw->obj)) 553 i915_gem_object_unpin_pages(uc_fw->obj); 554 555 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 556 } 557 558 /** 559 * intel_uc_fw_cleanup_fetch - cleanup uC firmware 560 * @uc_fw: uC firmware 561 * 562 * Cleans up uC firmware by releasing the firmware GEM obj. 563 */ 564 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw) 565 { 566 if (!intel_uc_fw_is_available(uc_fw)) 567 return; 568 569 i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); 570 571 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED); 572 } 573 574 /** 575 * intel_uc_fw_copy_rsa - copy fw RSA to buffer 576 * 577 * @uc_fw: uC firmware 578 * @dst: dst buffer 579 * @max_len: max number of bytes to copy 580 * 581 * Return: number of copied bytes. 582 */ 583 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len) 584 { 585 struct sg_table *pages = uc_fw->obj->mm.pages; 586 u32 size = min_t(u32, uc_fw->rsa_size, max_len); 587 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size; 588 589 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw)); 590 591 return sg_pcopy_to_buffer(pages->sgl, pages->nents, dst, size, offset); 592 } 593 594 /** 595 * intel_uc_fw_dump - dump information about uC firmware 596 * @uc_fw: uC firmware 597 * @p: the &drm_printer 598 * 599 * Pretty printer for uC firmware. 600 */ 601 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p) 602 { 603 drm_printf(p, "%s firmware: %s\n", 604 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path); 605 drm_printf(p, "\tstatus: %s\n", 606 intel_uc_fw_status_repr(uc_fw->status)); 607 drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n", 608 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted, 609 uc_fw->major_ver_found, uc_fw->minor_ver_found); 610 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); 611 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); 612 } 613