1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016-2019 Intel Corporation 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/firmware.h> 8 #include <drm/drm_print.h> 9 10 #include "intel_uc_fw.h" 11 #include "intel_uc_fw_abi.h" 12 #include "i915_drv.h" 13 14 static inline struct intel_gt * 15 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type) 16 { 17 if (type == INTEL_UC_FW_TYPE_GUC) 18 return container_of(uc_fw, struct intel_gt, uc.guc.fw); 19 20 GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC); 21 return container_of(uc_fw, struct intel_gt, uc.huc.fw); 22 } 23 24 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw) 25 { 26 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); 27 return ____uc_fw_to_gt(uc_fw, uc_fw->type); 28 } 29 30 #ifdef CONFIG_DRM_I915_DEBUG_GUC 31 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, 32 enum intel_uc_fw_status status) 33 { 34 uc_fw->__status = status; 35 drm_dbg(&__uc_fw_to_gt(uc_fw)->i915->drm, 36 "%s firmware -> %s\n", 37 intel_uc_fw_type_repr(uc_fw->type), 38 status == INTEL_UC_FIRMWARE_SELECTED ? 39 uc_fw->path : intel_uc_fw_status_repr(status)); 40 } 41 #endif 42 43 /* 44 * List of required GuC and HuC binaries per-platform. 45 * Must be ordered based on platform + revid, from newer to older. 46 * 47 * TGL 35.2 is interface-compatible with 33.0 for previous Gens. The deltas 48 * between 33.0 and 35.2 are only related to new additions to support new Gen12 49 * features. 50 * 51 * Note that RKL uses the same firmware as TGL. 52 */ 53 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \ 54 fw_def(ROCKETLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 5, 0)) \ 55 fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 5, 0)) \ 56 fw_def(JASPERLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \ 57 fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \ 58 fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \ 59 fw_def(COMETLAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \ 60 fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \ 61 fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \ 62 fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \ 63 fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \ 64 fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0)) 65 66 #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \ 67 "i915/" \ 68 __stringify(prefix_) name_ \ 69 __stringify(major_) "." \ 70 __stringify(minor_) "." \ 71 __stringify(patch_) ".bin" 72 73 #define MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_) \ 74 __MAKE_UC_FW_PATH(prefix_, "_guc_", major_, minor_, patch_) 75 76 #define MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_) \ 77 __MAKE_UC_FW_PATH(prefix_, "_huc_", major_, minor_, bld_num_) 78 79 /* All blobs need to be declared via MODULE_FIRMWARE() */ 80 #define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \ 81 MODULE_FIRMWARE(guc_); \ 82 MODULE_FIRMWARE(huc_); 83 84 INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH) 85 86 /* The below structs and macros are used to iterate across the list of blobs */ 87 struct __packed uc_fw_blob { 88 u8 major; 89 u8 minor; 90 const char *path; 91 }; 92 93 #define UC_FW_BLOB(major_, minor_, path_) \ 94 { .major = major_, .minor = minor_, .path = path_ } 95 96 #define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \ 97 UC_FW_BLOB(major_, minor_, \ 98 MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_)) 99 100 #define HUC_FW_BLOB(prefix_, major_, minor_, bld_num_) \ 101 UC_FW_BLOB(major_, minor_, \ 102 MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_)) 103 104 struct __packed uc_fw_platform_requirement { 105 enum intel_platform p; 106 u8 rev; /* first platform rev using this FW */ 107 const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES]; 108 }; 109 110 #define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \ 111 { \ 112 .p = INTEL_##platform_, \ 113 .rev = revid_, \ 114 .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \ 115 .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \ 116 }, 117 118 static void 119 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 120 { 121 static const struct uc_fw_platform_requirement fw_blobs[] = { 122 INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB) 123 }; 124 enum intel_platform p = INTEL_INFO(i915)->platform; 125 u8 rev = INTEL_REVID(i915); 126 int i; 127 128 for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) { 129 if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) { 130 const struct uc_fw_blob *blob = 131 &fw_blobs[i].blobs[uc_fw->type]; 132 uc_fw->path = blob->path; 133 uc_fw->major_ver_wanted = blob->major; 134 uc_fw->minor_ver_wanted = blob->minor; 135 break; 136 } 137 } 138 139 /* make sure the list is ordered as expected */ 140 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) { 141 for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) { 142 if (fw_blobs[i].p < fw_blobs[i - 1].p) 143 continue; 144 145 if (fw_blobs[i].p == fw_blobs[i - 1].p && 146 fw_blobs[i].rev < fw_blobs[i - 1].rev) 147 continue; 148 149 pr_err("invalid FW blob order: %s r%u comes before %s r%u\n", 150 intel_platform_name(fw_blobs[i - 1].p), 151 fw_blobs[i - 1].rev, 152 intel_platform_name(fw_blobs[i].p), 153 fw_blobs[i].rev); 154 155 uc_fw->path = NULL; 156 } 157 } 158 159 /* We don't want to enable GuC/HuC on pre-Gen11 by default */ 160 if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE) 161 uc_fw->path = NULL; 162 } 163 164 static const char *__override_guc_firmware_path(struct drm_i915_private *i915) 165 { 166 if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION | 167 ENABLE_GUC_LOAD_HUC)) 168 return i915->params.guc_firmware_path; 169 return ""; 170 } 171 172 static const char *__override_huc_firmware_path(struct drm_i915_private *i915) 173 { 174 if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC) 175 return i915->params.huc_firmware_path; 176 return ""; 177 } 178 179 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 180 { 181 const char *path = NULL; 182 183 switch (uc_fw->type) { 184 case INTEL_UC_FW_TYPE_GUC: 185 path = __override_guc_firmware_path(i915); 186 break; 187 case INTEL_UC_FW_TYPE_HUC: 188 path = __override_huc_firmware_path(i915); 189 break; 190 } 191 192 if (unlikely(path)) { 193 uc_fw->path = path; 194 uc_fw->user_overridden = true; 195 } 196 } 197 198 /** 199 * intel_uc_fw_init_early - initialize the uC object and select the firmware 200 * @uc_fw: uC firmware 201 * @type: type of uC 202 * 203 * Initialize the state of our uC object and relevant tracking and select the 204 * firmware to fetch and load. 205 */ 206 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, 207 enum intel_uc_fw_type type) 208 { 209 struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915; 210 211 /* 212 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status 213 * before we're looked at the HW caps to see if we have uc support 214 */ 215 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED); 216 GEM_BUG_ON(uc_fw->status); 217 GEM_BUG_ON(uc_fw->path); 218 219 uc_fw->type = type; 220 221 if (HAS_GT_UC(i915)) { 222 __uc_fw_auto_select(i915, uc_fw); 223 __uc_fw_user_override(i915, uc_fw); 224 } 225 226 intel_uc_fw_change_status(uc_fw, uc_fw->path ? *uc_fw->path ? 227 INTEL_UC_FIRMWARE_SELECTED : 228 INTEL_UC_FIRMWARE_DISABLED : 229 INTEL_UC_FIRMWARE_NOT_SUPPORTED); 230 } 231 232 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e) 233 { 234 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 235 bool user = e == -EINVAL; 236 237 if (i915_inject_probe_error(i915, e)) { 238 /* non-existing blob */ 239 uc_fw->path = "<invalid>"; 240 uc_fw->user_overridden = user; 241 } else if (i915_inject_probe_error(i915, e)) { 242 /* require next major version */ 243 uc_fw->major_ver_wanted += 1; 244 uc_fw->minor_ver_wanted = 0; 245 uc_fw->user_overridden = user; 246 } else if (i915_inject_probe_error(i915, e)) { 247 /* require next minor version */ 248 uc_fw->minor_ver_wanted += 1; 249 uc_fw->user_overridden = user; 250 } else if (uc_fw->major_ver_wanted && 251 i915_inject_probe_error(i915, e)) { 252 /* require prev major version */ 253 uc_fw->major_ver_wanted -= 1; 254 uc_fw->minor_ver_wanted = 0; 255 uc_fw->user_overridden = user; 256 } else if (uc_fw->minor_ver_wanted && 257 i915_inject_probe_error(i915, e)) { 258 /* require prev minor version - hey, this should work! */ 259 uc_fw->minor_ver_wanted -= 1; 260 uc_fw->user_overridden = user; 261 } else if (user && i915_inject_probe_error(i915, e)) { 262 /* officially unsupported platform */ 263 uc_fw->major_ver_wanted = 0; 264 uc_fw->minor_ver_wanted = 0; 265 uc_fw->user_overridden = true; 266 } 267 } 268 269 /** 270 * intel_uc_fw_fetch - fetch uC firmware 271 * @uc_fw: uC firmware 272 * 273 * Fetch uC firmware into GEM obj. 274 * 275 * Return: 0 on success, a negative errno code on failure. 276 */ 277 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) 278 { 279 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 280 struct device *dev = i915->drm.dev; 281 struct drm_i915_gem_object *obj; 282 const struct firmware *fw = NULL; 283 struct uc_css_header *css; 284 size_t size; 285 int err; 286 287 GEM_BUG_ON(!i915->wopcm.size); 288 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw)); 289 290 err = i915_inject_probe_error(i915, -ENXIO); 291 if (err) 292 goto fail; 293 294 __force_fw_fetch_failures(uc_fw, -EINVAL); 295 __force_fw_fetch_failures(uc_fw, -ESTALE); 296 297 err = request_firmware(&fw, uc_fw->path, dev); 298 if (err) 299 goto fail; 300 301 /* Check the size of the blob before examining buffer contents */ 302 if (unlikely(fw->size < sizeof(struct uc_css_header))) { 303 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 304 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 305 fw->size, sizeof(struct uc_css_header)); 306 err = -ENODATA; 307 goto fail; 308 } 309 310 css = (struct uc_css_header *)fw->data; 311 312 /* Check integrity of size values inside CSS header */ 313 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw - 314 css->exponent_size_dw) * sizeof(u32); 315 if (unlikely(size != sizeof(struct uc_css_header))) { 316 drm_warn(&i915->drm, 317 "%s firmware %s: unexpected header size: %zu != %zu\n", 318 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 319 fw->size, sizeof(struct uc_css_header)); 320 err = -EPROTO; 321 goto fail; 322 } 323 324 /* uCode size must calculated from other sizes */ 325 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); 326 327 /* now RSA */ 328 if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) { 329 drm_warn(&i915->drm, "%s firmware %s: unexpected key size: %u != %u\n", 330 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 331 css->key_size_dw, UOS_RSA_SCRATCH_COUNT); 332 err = -EPROTO; 333 goto fail; 334 } 335 uc_fw->rsa_size = css->key_size_dw * sizeof(u32); 336 337 /* At least, it should have header, uCode and RSA. Size of all three. */ 338 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size; 339 if (unlikely(fw->size < size)) { 340 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 341 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 342 fw->size, size); 343 err = -ENOEXEC; 344 goto fail; 345 } 346 347 /* Sanity check whether this fw is not larger than whole WOPCM memory */ 348 size = __intel_uc_fw_get_upload_size(uc_fw); 349 if (unlikely(size >= i915->wopcm.size)) { 350 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n", 351 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 352 size, (size_t)i915->wopcm.size); 353 err = -E2BIG; 354 goto fail; 355 } 356 357 /* Get version numbers from the CSS header */ 358 uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MAJOR, 359 css->sw_version); 360 uc_fw->minor_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MINOR, 361 css->sw_version); 362 363 if (uc_fw->major_ver_found != uc_fw->major_ver_wanted || 364 uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) { 365 drm_notice(&i915->drm, "%s firmware %s: unexpected version: %u.%u != %u.%u\n", 366 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 367 uc_fw->major_ver_found, uc_fw->minor_ver_found, 368 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted); 369 if (!intel_uc_fw_is_overridden(uc_fw)) { 370 err = -ENOEXEC; 371 goto fail; 372 } 373 } 374 375 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); 376 if (IS_ERR(obj)) { 377 err = PTR_ERR(obj); 378 goto fail; 379 } 380 381 uc_fw->obj = obj; 382 uc_fw->size = fw->size; 383 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 384 385 release_firmware(fw); 386 return 0; 387 388 fail: 389 intel_uc_fw_change_status(uc_fw, err == -ENOENT ? 390 INTEL_UC_FIRMWARE_MISSING : 391 INTEL_UC_FIRMWARE_ERROR); 392 393 drm_notice(&i915->drm, "%s firmware %s: fetch failed with error %d\n", 394 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err); 395 drm_info(&i915->drm, "%s firmware(s) can be downloaded from %s\n", 396 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL); 397 398 release_firmware(fw); /* OK even if fw is NULL */ 399 return err; 400 } 401 402 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw) 403 { 404 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 405 struct drm_mm_node *node = &ggtt->uc_fw; 406 407 GEM_BUG_ON(!drm_mm_node_allocated(node)); 408 GEM_BUG_ON(upper_32_bits(node->start)); 409 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1)); 410 411 return lower_32_bits(node->start); 412 } 413 414 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw) 415 { 416 struct drm_i915_gem_object *obj = uc_fw->obj; 417 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 418 struct i915_vma dummy = { 419 .node.start = uc_fw_ggtt_offset(uc_fw), 420 .node.size = obj->base.size, 421 .pages = obj->mm.pages, 422 .vm = &ggtt->vm, 423 }; 424 425 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); 426 GEM_BUG_ON(dummy.node.size > ggtt->uc_fw.size); 427 428 /* uc_fw->obj cache domains were not controlled across suspend */ 429 drm_clflush_sg(dummy.pages); 430 431 ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0); 432 } 433 434 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw) 435 { 436 struct drm_i915_gem_object *obj = uc_fw->obj; 437 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 438 u64 start = uc_fw_ggtt_offset(uc_fw); 439 440 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); 441 } 442 443 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 444 { 445 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 446 struct intel_uncore *uncore = gt->uncore; 447 u64 offset; 448 int ret; 449 450 ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT); 451 if (ret) 452 return ret; 453 454 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); 455 456 /* Set the source address for the uCode */ 457 offset = uc_fw_ggtt_offset(uc_fw); 458 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000); 459 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); 460 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); 461 462 /* Set the DMA destination */ 463 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset); 464 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); 465 466 /* 467 * Set the transfer size. The header plus uCode will be copied to WOPCM 468 * via DMA, excluding any other components 469 */ 470 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, 471 sizeof(struct uc_css_header) + uc_fw->ucode_size); 472 473 /* Start the DMA */ 474 intel_uncore_write_fw(uncore, DMA_CTRL, 475 _MASKED_BIT_ENABLE(dma_flags | START_DMA)); 476 477 /* Wait for DMA to finish */ 478 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100); 479 if (ret) 480 drm_err(>->i915->drm, "DMA for %s fw failed, DMA_CTRL=%u\n", 481 intel_uc_fw_type_repr(uc_fw->type), 482 intel_uncore_read_fw(uncore, DMA_CTRL)); 483 484 /* Disable the bits once DMA is over */ 485 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); 486 487 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL); 488 489 return ret; 490 } 491 492 /** 493 * intel_uc_fw_upload - load uC firmware using custom loader 494 * @uc_fw: uC firmware 495 * @dst_offset: destination offset 496 * @dma_flags: flags for flags for dma ctrl 497 * 498 * Loads uC firmware and updates internal flags. 499 * 500 * Return: 0 on success, non-zero on failure. 501 */ 502 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 503 { 504 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 505 int err; 506 507 /* make sure the status was cleared the last time we reset the uc */ 508 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 509 510 err = i915_inject_probe_error(gt->i915, -ENOEXEC); 511 if (err) 512 return err; 513 514 if (!intel_uc_fw_is_loadable(uc_fw)) 515 return -ENOEXEC; 516 517 /* Call custom loader */ 518 uc_fw_bind_ggtt(uc_fw); 519 err = uc_fw_xfer(uc_fw, dst_offset, dma_flags); 520 uc_fw_unbind_ggtt(uc_fw); 521 if (err) 522 goto fail; 523 524 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); 525 return 0; 526 527 fail: 528 i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", 529 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 530 err); 531 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 532 return err; 533 } 534 535 int intel_uc_fw_init(struct intel_uc_fw *uc_fw) 536 { 537 int err; 538 539 /* this should happen before the load! */ 540 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 541 542 if (!intel_uc_fw_is_available(uc_fw)) 543 return -ENOEXEC; 544 545 err = i915_gem_object_pin_pages(uc_fw->obj); 546 if (err) { 547 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", 548 intel_uc_fw_type_repr(uc_fw->type), err); 549 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 550 } 551 552 return err; 553 } 554 555 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) 556 { 557 if (i915_gem_object_has_pinned_pages(uc_fw->obj)) 558 i915_gem_object_unpin_pages(uc_fw->obj); 559 560 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 561 } 562 563 /** 564 * intel_uc_fw_cleanup_fetch - cleanup uC firmware 565 * @uc_fw: uC firmware 566 * 567 * Cleans up uC firmware by releasing the firmware GEM obj. 568 */ 569 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw) 570 { 571 if (!intel_uc_fw_is_available(uc_fw)) 572 return; 573 574 i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); 575 576 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED); 577 } 578 579 /** 580 * intel_uc_fw_copy_rsa - copy fw RSA to buffer 581 * 582 * @uc_fw: uC firmware 583 * @dst: dst buffer 584 * @max_len: max number of bytes to copy 585 * 586 * Return: number of copied bytes. 587 */ 588 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len) 589 { 590 struct sg_table *pages = uc_fw->obj->mm.pages; 591 u32 size = min_t(u32, uc_fw->rsa_size, max_len); 592 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size; 593 594 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw)); 595 596 return sg_pcopy_to_buffer(pages->sgl, pages->nents, dst, size, offset); 597 } 598 599 /** 600 * intel_uc_fw_dump - dump information about uC firmware 601 * @uc_fw: uC firmware 602 * @p: the &drm_printer 603 * 604 * Pretty printer for uC firmware. 605 */ 606 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p) 607 { 608 drm_printf(p, "%s firmware: %s\n", 609 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path); 610 drm_printf(p, "\tstatus: %s\n", 611 intel_uc_fw_status_repr(uc_fw->status)); 612 drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n", 613 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted, 614 uc_fw->major_ver_found, uc_fw->minor_ver_found); 615 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); 616 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); 617 } 618