1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016-2019 Intel Corporation 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/firmware.h> 8 #include <drm/drm_print.h> 9 10 #include "intel_uc_fw.h" 11 #include "intel_uc_fw_abi.h" 12 #include "i915_drv.h" 13 14 static inline struct intel_gt * 15 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type) 16 { 17 if (type == INTEL_UC_FW_TYPE_GUC) 18 return container_of(uc_fw, struct intel_gt, uc.guc.fw); 19 20 GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC); 21 return container_of(uc_fw, struct intel_gt, uc.huc.fw); 22 } 23 24 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw) 25 { 26 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); 27 return ____uc_fw_to_gt(uc_fw, uc_fw->type); 28 } 29 30 #ifdef CONFIG_DRM_I915_DEBUG_GUC 31 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, 32 enum intel_uc_fw_status status) 33 { 34 uc_fw->__status = status; 35 drm_dbg(&__uc_fw_to_gt(uc_fw)->i915->drm, 36 "%s firmware -> %s\n", 37 intel_uc_fw_type_repr(uc_fw->type), 38 status == INTEL_UC_FIRMWARE_SELECTED ? 39 uc_fw->path : intel_uc_fw_status_repr(status)); 40 } 41 #endif 42 43 /* 44 * List of required GuC and HuC binaries per-platform. 45 * Must be ordered based on platform + revid, from newer to older. 46 * 47 * Note that RKL uses the same firmware as TGL. 48 */ 49 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \ 50 fw_def(ROCKETLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ 51 fw_def(TIGERLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ 52 fw_def(JASPERLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ 53 fw_def(ELKHARTLAKE, 0, guc_def(ehl, 49, 0, 1), huc_def(ehl, 9, 0, 0)) \ 54 fw_def(ICELAKE, 0, guc_def(icl, 49, 0, 1), huc_def(icl, 9, 0, 0)) \ 55 fw_def(COMETLAKE, 5, guc_def(cml, 49, 0, 1), huc_def(cml, 4, 0, 0)) \ 56 fw_def(COFFEELAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ 57 fw_def(GEMINILAKE, 0, guc_def(glk, 49, 0, 1), huc_def(glk, 4, 0, 0)) \ 58 fw_def(KABYLAKE, 0, guc_def(kbl, 49, 0, 1), huc_def(kbl, 4, 0, 0)) \ 59 fw_def(BROXTON, 0, guc_def(bxt, 49, 0, 1), huc_def(bxt, 2, 0, 0)) \ 60 fw_def(SKYLAKE, 0, guc_def(skl, 49, 0, 1), huc_def(skl, 2, 0, 0)) 61 62 #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \ 63 "i915/" \ 64 __stringify(prefix_) name_ \ 65 __stringify(major_) "." \ 66 __stringify(minor_) "." \ 67 __stringify(patch_) ".bin" 68 69 #define MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_) \ 70 __MAKE_UC_FW_PATH(prefix_, "_guc_", major_, minor_, patch_) 71 72 #define MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_) \ 73 __MAKE_UC_FW_PATH(prefix_, "_huc_", major_, minor_, bld_num_) 74 75 /* All blobs need to be declared via MODULE_FIRMWARE() */ 76 #define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \ 77 MODULE_FIRMWARE(guc_); \ 78 MODULE_FIRMWARE(huc_); 79 80 INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH) 81 82 /* The below structs and macros are used to iterate across the list of blobs */ 83 struct __packed uc_fw_blob { 84 u8 major; 85 u8 minor; 86 const char *path; 87 }; 88 89 #define UC_FW_BLOB(major_, minor_, path_) \ 90 { .major = major_, .minor = minor_, .path = path_ } 91 92 #define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \ 93 UC_FW_BLOB(major_, minor_, \ 94 MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_)) 95 96 #define HUC_FW_BLOB(prefix_, major_, minor_, bld_num_) \ 97 UC_FW_BLOB(major_, minor_, \ 98 MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_)) 99 100 struct __packed uc_fw_platform_requirement { 101 enum intel_platform p; 102 u8 rev; /* first platform rev using this FW */ 103 const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES]; 104 }; 105 106 #define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \ 107 { \ 108 .p = INTEL_##platform_, \ 109 .rev = revid_, \ 110 .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \ 111 .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \ 112 }, 113 114 static void 115 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 116 { 117 static const struct uc_fw_platform_requirement fw_blobs[] = { 118 INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB) 119 }; 120 enum intel_platform p = INTEL_INFO(i915)->platform; 121 u8 rev = INTEL_REVID(i915); 122 int i; 123 124 for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) { 125 if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) { 126 const struct uc_fw_blob *blob = 127 &fw_blobs[i].blobs[uc_fw->type]; 128 uc_fw->path = blob->path; 129 uc_fw->major_ver_wanted = blob->major; 130 uc_fw->minor_ver_wanted = blob->minor; 131 break; 132 } 133 } 134 135 /* make sure the list is ordered as expected */ 136 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) { 137 for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) { 138 if (fw_blobs[i].p < fw_blobs[i - 1].p) 139 continue; 140 141 if (fw_blobs[i].p == fw_blobs[i - 1].p && 142 fw_blobs[i].rev < fw_blobs[i - 1].rev) 143 continue; 144 145 pr_err("invalid FW blob order: %s r%u comes before %s r%u\n", 146 intel_platform_name(fw_blobs[i - 1].p), 147 fw_blobs[i - 1].rev, 148 intel_platform_name(fw_blobs[i].p), 149 fw_blobs[i].rev); 150 151 uc_fw->path = NULL; 152 } 153 } 154 155 /* We don't want to enable GuC/HuC on pre-Gen11 by default */ 156 if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE) 157 uc_fw->path = NULL; 158 } 159 160 static const char *__override_guc_firmware_path(struct drm_i915_private *i915) 161 { 162 if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION | 163 ENABLE_GUC_LOAD_HUC)) 164 return i915->params.guc_firmware_path; 165 return ""; 166 } 167 168 static const char *__override_huc_firmware_path(struct drm_i915_private *i915) 169 { 170 if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC) 171 return i915->params.huc_firmware_path; 172 return ""; 173 } 174 175 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw) 176 { 177 const char *path = NULL; 178 179 switch (uc_fw->type) { 180 case INTEL_UC_FW_TYPE_GUC: 181 path = __override_guc_firmware_path(i915); 182 break; 183 case INTEL_UC_FW_TYPE_HUC: 184 path = __override_huc_firmware_path(i915); 185 break; 186 } 187 188 if (unlikely(path)) { 189 uc_fw->path = path; 190 uc_fw->user_overridden = true; 191 } 192 } 193 194 /** 195 * intel_uc_fw_init_early - initialize the uC object and select the firmware 196 * @uc_fw: uC firmware 197 * @type: type of uC 198 * 199 * Initialize the state of our uC object and relevant tracking and select the 200 * firmware to fetch and load. 201 */ 202 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, 203 enum intel_uc_fw_type type) 204 { 205 struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915; 206 207 /* 208 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status 209 * before we're looked at the HW caps to see if we have uc support 210 */ 211 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED); 212 GEM_BUG_ON(uc_fw->status); 213 GEM_BUG_ON(uc_fw->path); 214 215 uc_fw->type = type; 216 217 if (HAS_GT_UC(i915)) { 218 __uc_fw_auto_select(i915, uc_fw); 219 __uc_fw_user_override(i915, uc_fw); 220 } 221 222 intel_uc_fw_change_status(uc_fw, uc_fw->path ? *uc_fw->path ? 223 INTEL_UC_FIRMWARE_SELECTED : 224 INTEL_UC_FIRMWARE_DISABLED : 225 INTEL_UC_FIRMWARE_NOT_SUPPORTED); 226 } 227 228 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e) 229 { 230 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 231 bool user = e == -EINVAL; 232 233 if (i915_inject_probe_error(i915, e)) { 234 /* non-existing blob */ 235 uc_fw->path = "<invalid>"; 236 uc_fw->user_overridden = user; 237 } else if (i915_inject_probe_error(i915, e)) { 238 /* require next major version */ 239 uc_fw->major_ver_wanted += 1; 240 uc_fw->minor_ver_wanted = 0; 241 uc_fw->user_overridden = user; 242 } else if (i915_inject_probe_error(i915, e)) { 243 /* require next minor version */ 244 uc_fw->minor_ver_wanted += 1; 245 uc_fw->user_overridden = user; 246 } else if (uc_fw->major_ver_wanted && 247 i915_inject_probe_error(i915, e)) { 248 /* require prev major version */ 249 uc_fw->major_ver_wanted -= 1; 250 uc_fw->minor_ver_wanted = 0; 251 uc_fw->user_overridden = user; 252 } else if (uc_fw->minor_ver_wanted && 253 i915_inject_probe_error(i915, e)) { 254 /* require prev minor version - hey, this should work! */ 255 uc_fw->minor_ver_wanted -= 1; 256 uc_fw->user_overridden = user; 257 } else if (user && i915_inject_probe_error(i915, e)) { 258 /* officially unsupported platform */ 259 uc_fw->major_ver_wanted = 0; 260 uc_fw->minor_ver_wanted = 0; 261 uc_fw->user_overridden = true; 262 } 263 } 264 265 /** 266 * intel_uc_fw_fetch - fetch uC firmware 267 * @uc_fw: uC firmware 268 * 269 * Fetch uC firmware into GEM obj. 270 * 271 * Return: 0 on success, a negative errno code on failure. 272 */ 273 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw) 274 { 275 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915; 276 struct device *dev = i915->drm.dev; 277 struct drm_i915_gem_object *obj; 278 const struct firmware *fw = NULL; 279 struct uc_css_header *css; 280 size_t size; 281 int err; 282 283 GEM_BUG_ON(!i915->wopcm.size); 284 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw)); 285 286 err = i915_inject_probe_error(i915, -ENXIO); 287 if (err) 288 goto fail; 289 290 __force_fw_fetch_failures(uc_fw, -EINVAL); 291 __force_fw_fetch_failures(uc_fw, -ESTALE); 292 293 err = request_firmware(&fw, uc_fw->path, dev); 294 if (err) 295 goto fail; 296 297 /* Check the size of the blob before examining buffer contents */ 298 if (unlikely(fw->size < sizeof(struct uc_css_header))) { 299 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 300 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 301 fw->size, sizeof(struct uc_css_header)); 302 err = -ENODATA; 303 goto fail; 304 } 305 306 css = (struct uc_css_header *)fw->data; 307 308 /* Check integrity of size values inside CSS header */ 309 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw - 310 css->exponent_size_dw) * sizeof(u32); 311 if (unlikely(size != sizeof(struct uc_css_header))) { 312 drm_warn(&i915->drm, 313 "%s firmware %s: unexpected header size: %zu != %zu\n", 314 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 315 fw->size, sizeof(struct uc_css_header)); 316 err = -EPROTO; 317 goto fail; 318 } 319 320 /* uCode size must calculated from other sizes */ 321 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); 322 323 /* now RSA */ 324 if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) { 325 drm_warn(&i915->drm, "%s firmware %s: unexpected key size: %u != %u\n", 326 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 327 css->key_size_dw, UOS_RSA_SCRATCH_COUNT); 328 err = -EPROTO; 329 goto fail; 330 } 331 uc_fw->rsa_size = css->key_size_dw * sizeof(u32); 332 333 /* At least, it should have header, uCode and RSA. Size of all three. */ 334 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size; 335 if (unlikely(fw->size < size)) { 336 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n", 337 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 338 fw->size, size); 339 err = -ENOEXEC; 340 goto fail; 341 } 342 343 /* Sanity check whether this fw is not larger than whole WOPCM memory */ 344 size = __intel_uc_fw_get_upload_size(uc_fw); 345 if (unlikely(size >= i915->wopcm.size)) { 346 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n", 347 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 348 size, (size_t)i915->wopcm.size); 349 err = -E2BIG; 350 goto fail; 351 } 352 353 /* Get version numbers from the CSS header */ 354 uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MAJOR, 355 css->sw_version); 356 uc_fw->minor_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MINOR, 357 css->sw_version); 358 359 if (uc_fw->major_ver_found != uc_fw->major_ver_wanted || 360 uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) { 361 drm_notice(&i915->drm, "%s firmware %s: unexpected version: %u.%u != %u.%u\n", 362 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 363 uc_fw->major_ver_found, uc_fw->minor_ver_found, 364 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted); 365 if (!intel_uc_fw_is_overridden(uc_fw)) { 366 err = -ENOEXEC; 367 goto fail; 368 } 369 } 370 371 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC) 372 uc_fw->private_data_size = css->private_data_size; 373 374 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); 375 if (IS_ERR(obj)) { 376 err = PTR_ERR(obj); 377 goto fail; 378 } 379 380 uc_fw->obj = obj; 381 uc_fw->size = fw->size; 382 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 383 384 release_firmware(fw); 385 return 0; 386 387 fail: 388 intel_uc_fw_change_status(uc_fw, err == -ENOENT ? 389 INTEL_UC_FIRMWARE_MISSING : 390 INTEL_UC_FIRMWARE_ERROR); 391 392 drm_notice(&i915->drm, "%s firmware %s: fetch failed with error %d\n", 393 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err); 394 drm_info(&i915->drm, "%s firmware(s) can be downloaded from %s\n", 395 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL); 396 397 release_firmware(fw); /* OK even if fw is NULL */ 398 return err; 399 } 400 401 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw) 402 { 403 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 404 struct drm_mm_node *node = &ggtt->uc_fw; 405 406 GEM_BUG_ON(!drm_mm_node_allocated(node)); 407 GEM_BUG_ON(upper_32_bits(node->start)); 408 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1)); 409 410 return lower_32_bits(node->start); 411 } 412 413 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw) 414 { 415 struct drm_i915_gem_object *obj = uc_fw->obj; 416 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 417 struct i915_vma dummy = { 418 .node.start = uc_fw_ggtt_offset(uc_fw), 419 .node.size = obj->base.size, 420 .pages = obj->mm.pages, 421 .vm = &ggtt->vm, 422 }; 423 424 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); 425 GEM_BUG_ON(dummy.node.size > ggtt->uc_fw.size); 426 427 /* uc_fw->obj cache domains were not controlled across suspend */ 428 drm_clflush_sg(dummy.pages); 429 430 ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0); 431 } 432 433 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw) 434 { 435 struct drm_i915_gem_object *obj = uc_fw->obj; 436 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt; 437 u64 start = uc_fw_ggtt_offset(uc_fw); 438 439 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); 440 } 441 442 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 443 { 444 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 445 struct intel_uncore *uncore = gt->uncore; 446 u64 offset; 447 int ret; 448 449 ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT); 450 if (ret) 451 return ret; 452 453 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); 454 455 /* Set the source address for the uCode */ 456 offset = uc_fw_ggtt_offset(uc_fw); 457 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000); 458 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); 459 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); 460 461 /* Set the DMA destination */ 462 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset); 463 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); 464 465 /* 466 * Set the transfer size. The header plus uCode will be copied to WOPCM 467 * via DMA, excluding any other components 468 */ 469 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, 470 sizeof(struct uc_css_header) + uc_fw->ucode_size); 471 472 /* Start the DMA */ 473 intel_uncore_write_fw(uncore, DMA_CTRL, 474 _MASKED_BIT_ENABLE(dma_flags | START_DMA)); 475 476 /* Wait for DMA to finish */ 477 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100); 478 if (ret) 479 drm_err(>->i915->drm, "DMA for %s fw failed, DMA_CTRL=%u\n", 480 intel_uc_fw_type_repr(uc_fw->type), 481 intel_uncore_read_fw(uncore, DMA_CTRL)); 482 483 /* Disable the bits once DMA is over */ 484 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); 485 486 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL); 487 488 return ret; 489 } 490 491 /** 492 * intel_uc_fw_upload - load uC firmware using custom loader 493 * @uc_fw: uC firmware 494 * @dst_offset: destination offset 495 * @dma_flags: flags for flags for dma ctrl 496 * 497 * Loads uC firmware and updates internal flags. 498 * 499 * Return: 0 on success, non-zero on failure. 500 */ 501 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags) 502 { 503 struct intel_gt *gt = __uc_fw_to_gt(uc_fw); 504 int err; 505 506 /* make sure the status was cleared the last time we reset the uc */ 507 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 508 509 err = i915_inject_probe_error(gt->i915, -ENOEXEC); 510 if (err) 511 return err; 512 513 if (!intel_uc_fw_is_loadable(uc_fw)) 514 return -ENOEXEC; 515 516 /* Call custom loader */ 517 uc_fw_bind_ggtt(uc_fw); 518 err = uc_fw_xfer(uc_fw, dst_offset, dma_flags); 519 uc_fw_unbind_ggtt(uc_fw); 520 if (err) 521 goto fail; 522 523 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); 524 return 0; 525 526 fail: 527 i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", 528 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 529 err); 530 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 531 return err; 532 } 533 534 int intel_uc_fw_init(struct intel_uc_fw *uc_fw) 535 { 536 int err; 537 538 /* this should happen before the load! */ 539 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 540 541 if (!intel_uc_fw_is_available(uc_fw)) 542 return -ENOEXEC; 543 544 err = i915_gem_object_pin_pages(uc_fw->obj); 545 if (err) { 546 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", 547 intel_uc_fw_type_repr(uc_fw->type), err); 548 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 549 } 550 551 return err; 552 } 553 554 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) 555 { 556 if (i915_gem_object_has_pinned_pages(uc_fw->obj)) 557 i915_gem_object_unpin_pages(uc_fw->obj); 558 559 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 560 } 561 562 /** 563 * intel_uc_fw_cleanup_fetch - cleanup uC firmware 564 * @uc_fw: uC firmware 565 * 566 * Cleans up uC firmware by releasing the firmware GEM obj. 567 */ 568 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw) 569 { 570 if (!intel_uc_fw_is_available(uc_fw)) 571 return; 572 573 i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); 574 575 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED); 576 } 577 578 /** 579 * intel_uc_fw_copy_rsa - copy fw RSA to buffer 580 * 581 * @uc_fw: uC firmware 582 * @dst: dst buffer 583 * @max_len: max number of bytes to copy 584 * 585 * Return: number of copied bytes. 586 */ 587 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len) 588 { 589 struct sg_table *pages = uc_fw->obj->mm.pages; 590 u32 size = min_t(u32, uc_fw->rsa_size, max_len); 591 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size; 592 593 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw)); 594 595 return sg_pcopy_to_buffer(pages->sgl, pages->nents, dst, size, offset); 596 } 597 598 /** 599 * intel_uc_fw_dump - dump information about uC firmware 600 * @uc_fw: uC firmware 601 * @p: the &drm_printer 602 * 603 * Pretty printer for uC firmware. 604 */ 605 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p) 606 { 607 drm_printf(p, "%s firmware: %s\n", 608 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path); 609 drm_printf(p, "\tstatus: %s\n", 610 intel_uc_fw_status_repr(uc_fw->status)); 611 drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n", 612 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted, 613 uc_fw->major_ver_found, uc_fw->minor_ver_found); 614 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); 615 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); 616 } 617