1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2014-2019 Intel Corporation 4 */ 5 6 #include "gt/intel_gsc.h" 7 #include "gt/intel_gt.h" 8 #include "intel_gsc_binary_headers.h" 9 #include "intel_gsc_uc_heci_cmd_submit.h" 10 #include "intel_huc.h" 11 #include "intel_huc_fw.h" 12 #include "intel_huc_print.h" 13 #include "i915_drv.h" 14 #include "pxp/intel_pxp_huc.h" 15 #include "pxp/intel_pxp_cmd_interface_43.h" 16 17 struct mtl_huc_auth_msg_in { 18 struct intel_gsc_mtl_header header; 19 struct pxp43_new_huc_auth_in huc_in; 20 } __packed; 21 22 struct mtl_huc_auth_msg_out { 23 struct intel_gsc_mtl_header header; 24 struct pxp43_huc_auth_out huc_out; 25 } __packed; 26 27 int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc) 28 { 29 struct intel_gt *gt = huc_to_gt(huc); 30 struct drm_i915_private *i915 = gt->i915; 31 struct drm_i915_gem_object *obj; 32 struct mtl_huc_auth_msg_in *msg_in; 33 struct mtl_huc_auth_msg_out *msg_out; 34 void *pkt_vaddr; 35 u64 pkt_offset; 36 int retry = 5; 37 int err = 0; 38 39 if (!huc->heci_pkt) 40 return -ENODEV; 41 42 obj = huc->heci_pkt->obj; 43 pkt_offset = i915_ggtt_offset(huc->heci_pkt); 44 45 pkt_vaddr = i915_gem_object_pin_map_unlocked(obj, 46 i915_coherent_map_type(i915, obj, true)); 47 if (IS_ERR(pkt_vaddr)) 48 return PTR_ERR(pkt_vaddr); 49 50 msg_in = pkt_vaddr; 51 msg_out = pkt_vaddr + PXP43_HUC_AUTH_INOUT_SIZE; 52 53 intel_gsc_uc_heci_cmd_emit_mtl_header(&msg_in->header, 54 HECI_MEADDRESS_PXP, 55 sizeof(*msg_in), 0); 56 57 msg_in->huc_in.header.api_version = PXP_APIVER(4, 3); 58 msg_in->huc_in.header.command_id = PXP43_CMDID_NEW_HUC_AUTH; 59 msg_in->huc_in.header.status = 0; 60 msg_in->huc_in.header.buffer_len = sizeof(msg_in->huc_in) - 61 sizeof(msg_in->huc_in.header); 62 msg_in->huc_in.huc_base_address = huc->fw.vma_res.start; 63 msg_in->huc_in.huc_size = huc->fw.obj->base.size; 64 65 do { 66 err = intel_gsc_uc_heci_cmd_submit_packet(>->uc.gsc, 67 pkt_offset, sizeof(*msg_in), 68 pkt_offset + PXP43_HUC_AUTH_INOUT_SIZE, 69 PXP43_HUC_AUTH_INOUT_SIZE); 70 if (err) { 71 huc_err(huc, "failed to submit GSC request to auth: %d\n", err); 72 goto out_unpin; 73 } 74 75 if (msg_out->header.flags & GSC_OUTFLAG_MSG_PENDING) { 76 msg_in->header.gsc_message_handle = msg_out->header.gsc_message_handle; 77 err = -EBUSY; 78 msleep(50); 79 } 80 } while (--retry && err == -EBUSY); 81 82 if (err) 83 goto out_unpin; 84 85 if (msg_out->header.message_size != sizeof(*msg_out)) { 86 huc_err(huc, "invalid GSC reply length %u [expected %zu]\n", 87 msg_out->header.message_size, sizeof(*msg_out)); 88 err = -EPROTO; 89 goto out_unpin; 90 } 91 92 /* 93 * The GSC will return PXP_STATUS_OP_NOT_PERMITTED if the HuC is already 94 * loaded. If the same error is ever returned with HuC not loaded we'll 95 * still catch it when we check the authentication bit later. 96 */ 97 if (msg_out->huc_out.header.status != PXP_STATUS_SUCCESS && 98 msg_out->huc_out.header.status != PXP_STATUS_OP_NOT_PERMITTED) { 99 huc_err(huc, "auth failed with GSC error = 0x%x\n", 100 msg_out->huc_out.header.status); 101 err = -EIO; 102 goto out_unpin; 103 } 104 105 out_unpin: 106 i915_gem_object_unpin_map(obj); 107 return err; 108 } 109 110 static bool css_valid(const void *data, size_t size) 111 { 112 const struct uc_css_header *css = data; 113 114 if (unlikely(size < sizeof(struct uc_css_header))) 115 return false; 116 117 if (css->module_type != 0x6) 118 return false; 119 120 if (css->module_vendor != PCI_VENDOR_ID_INTEL) 121 return false; 122 123 return true; 124 } 125 126 static inline u32 entry_offset(const struct intel_gsc_cpd_entry *entry) 127 { 128 return entry->offset & INTEL_GSC_CPD_ENTRY_OFFSET_MASK; 129 } 130 131 int intel_huc_fw_get_binary_info(struct intel_uc_fw *huc_fw, const void *data, size_t size) 132 { 133 struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw); 134 const struct intel_gsc_cpd_header_v2 *header = data; 135 const struct intel_gsc_cpd_entry *entry; 136 size_t min_size = sizeof(*header); 137 int i; 138 139 if (!huc_fw->has_gsc_headers) { 140 huc_err(huc, "Invalid FW type for GSC header parsing!\n"); 141 return -EINVAL; 142 } 143 144 if (size < sizeof(*header)) { 145 huc_err(huc, "FW too small! %zu < %zu\n", size, min_size); 146 return -ENODATA; 147 } 148 149 /* 150 * The GSC-enabled HuC binary starts with a directory header, followed 151 * by a series of entries. Each entry is identified by a name and 152 * points to a specific section of the binary containing the relevant 153 * data. The entries we're interested in are: 154 * - "HUCP.man": points to the GSC manifest header for the HuC, which 155 * contains the version info. 156 * - "huc_fw": points to the legacy-style binary that can be used for 157 * load via the DMA. This entry only contains a valid CSS 158 * on binaries for platforms that support 2-step HuC load 159 * via dma and auth via GSC (like MTL). 160 * 161 * -------------------------------------------------- 162 * [ intel_gsc_cpd_header_v2 ] 163 * -------------------------------------------------- 164 * [ intel_gsc_cpd_entry[] ] 165 * [ entry1 ] 166 * [ ... ] 167 * [ entryX ] 168 * [ "HUCP.man" ] 169 * [ ... ] 170 * [ offset >----------------------------]------o 171 * [ ... ] | 172 * [ entryY ] | 173 * [ "huc_fw" ] | 174 * [ ... ] | 175 * [ offset >----------------------------]----------o 176 * -------------------------------------------------- | | 177 * | | 178 * -------------------------------------------------- | | 179 * [ intel_gsc_manifest_header ]<-----o | 180 * [ ... ] | 181 * [ intel_gsc_version fw_version ] | 182 * [ ... ] | 183 * -------------------------------------------------- | 184 * | 185 * -------------------------------------------------- | 186 * [ data[] ]<---------o 187 * [ ... ] 188 * [ ... ] 189 * -------------------------------------------------- 190 */ 191 192 if (header->header_marker != INTEL_GSC_CPD_HEADER_MARKER) { 193 huc_err(huc, "invalid marker for CPD header: 0x%08x!\n", 194 header->header_marker); 195 return -EINVAL; 196 } 197 198 /* we only have binaries with header v2 and entry v1 for now */ 199 if (header->header_version != 2 || header->entry_version != 1) { 200 huc_err(huc, "invalid CPD header/entry version %u:%u!\n", 201 header->header_version, header->entry_version); 202 return -EINVAL; 203 } 204 205 if (header->header_length < sizeof(struct intel_gsc_cpd_header_v2)) { 206 huc_err(huc, "invalid CPD header length %u!\n", 207 header->header_length); 208 return -EINVAL; 209 } 210 211 min_size = header->header_length + sizeof(*entry) * header->num_of_entries; 212 if (size < min_size) { 213 huc_err(huc, "FW too small! %zu < %zu\n", size, min_size); 214 return -ENODATA; 215 } 216 217 entry = data + header->header_length; 218 219 for (i = 0; i < header->num_of_entries; i++, entry++) { 220 if (strcmp(entry->name, "HUCP.man") == 0) 221 intel_uc_fw_version_from_gsc_manifest(&huc_fw->file_selected.ver, 222 data + entry_offset(entry)); 223 224 if (strcmp(entry->name, "huc_fw") == 0) { 225 u32 offset = entry_offset(entry); 226 227 if (offset < size && css_valid(data + offset, size - offset)) 228 huc_fw->dma_start_offset = offset; 229 } 230 } 231 232 return 0; 233 } 234 235 int intel_huc_fw_load_and_auth_via_gsc(struct intel_huc *huc) 236 { 237 int ret; 238 239 if (!intel_huc_is_loaded_by_gsc(huc)) 240 return -ENODEV; 241 242 if (!intel_uc_fw_is_loadable(&huc->fw)) 243 return -ENOEXEC; 244 245 /* 246 * If we abort a suspend, HuC might still be loaded when the mei 247 * component gets re-bound and this function called again. If so, just 248 * mark the HuC as loaded. 249 */ 250 if (intel_huc_is_authenticated(huc, INTEL_HUC_AUTH_BY_GSC)) { 251 intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_RUNNING); 252 return 0; 253 } 254 255 GEM_WARN_ON(intel_uc_fw_is_loaded(&huc->fw)); 256 257 ret = intel_pxp_huc_load_and_auth(huc_to_gt(huc)->i915->pxp); 258 if (ret) 259 return ret; 260 261 intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_TRANSFERRED); 262 263 return intel_huc_wait_for_auth_complete(huc, INTEL_HUC_AUTH_BY_GSC); 264 } 265 266 /** 267 * intel_huc_fw_upload() - load HuC uCode to device via DMA transfer 268 * @huc: intel_huc structure 269 * 270 * Called from intel_uc_init_hw() during driver load, resume from sleep and 271 * after a GPU reset. Note that HuC must be loaded before GuC. 272 * 273 * The firmware image should have already been fetched into memory, so only 274 * check that fetch succeeded, and then transfer the image to the h/w. 275 * 276 * Return: non-zero code on error 277 */ 278 int intel_huc_fw_upload(struct intel_huc *huc) 279 { 280 if (intel_huc_is_loaded_by_gsc(huc)) 281 return -ENODEV; 282 283 /* HW doesn't look at destination address for HuC, so set it to 0 */ 284 return intel_uc_fw_upload(&huc->fw, 0, HUC_UKERNEL); 285 } 286