1 /* 2 * Copyright © 2014-2017 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #include "gt/intel_gt.h" 26 #include "intel_guc_ads.h" 27 #include "intel_uc.h" 28 #include "i915_drv.h" 29 30 /* 31 * The Additional Data Struct (ADS) has pointers for different buffers used by 32 * the GuC. One single gem object contains the ADS struct itself (guc_ads), the 33 * scheduling policies (guc_policies), a structure describing a collection of 34 * register sets (guc_mmio_reg_state) and some extra pages for the GuC to save 35 * its internal state for sleep. 36 */ 37 38 static void guc_policy_init(struct guc_policy *policy) 39 { 40 policy->execution_quantum = POLICY_DEFAULT_EXECUTION_QUANTUM_US; 41 policy->preemption_time = POLICY_DEFAULT_PREEMPTION_TIME_US; 42 policy->fault_time = POLICY_DEFAULT_FAULT_TIME_US; 43 policy->policy_flags = 0; 44 } 45 46 static void guc_policies_init(struct guc_policies *policies) 47 { 48 struct guc_policy *policy; 49 u32 p, i; 50 51 policies->dpc_promote_time = POLICY_DEFAULT_DPC_PROMOTE_TIME_US; 52 policies->max_num_work_items = POLICY_MAX_NUM_WI; 53 54 for (p = 0; p < GUC_CLIENT_PRIORITY_NUM; p++) { 55 for (i = 0; i < GUC_MAX_ENGINE_CLASSES; i++) { 56 policy = &policies->policy[p][i]; 57 58 guc_policy_init(policy); 59 } 60 } 61 62 policies->is_valid = 1; 63 } 64 65 static void guc_ct_pool_entries_init(struct guc_ct_pool_entry *pool, u32 num) 66 { 67 memset(pool, 0, num * sizeof(*pool)); 68 } 69 70 /* 71 * The first 80 dwords of the register state context, containing the 72 * execlists and ppgtt registers. 73 */ 74 #define LR_HW_CONTEXT_SIZE (80 * sizeof(u32)) 75 76 /* The ads obj includes the struct itself and buffers passed to GuC */ 77 struct __guc_ads_blob { 78 struct guc_ads ads; 79 struct guc_policies policies; 80 struct guc_mmio_reg_state reg_state; 81 struct guc_gt_system_info system_info; 82 struct guc_clients_info clients_info; 83 struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE]; 84 u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE]; 85 } __packed; 86 87 static void __guc_ads_init(struct intel_guc *guc) 88 { 89 struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915; 90 struct __guc_ads_blob *blob = guc->ads_blob; 91 const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE; 92 u32 base; 93 u8 engine_class; 94 95 /* GuC scheduling policies */ 96 guc_policies_init(&blob->policies); 97 98 /* 99 * GuC expects a per-engine-class context image and size 100 * (minus hwsp and ring context). The context image will be 101 * used to reinitialize engines after a reset. It must exist 102 * and be pinned in the GGTT, so that the address won't change after 103 * we have told GuC where to find it. The context size will be used 104 * to validate that the LRC base + size fall within allowed GGTT. 105 */ 106 for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) { 107 if (engine_class == OTHER_CLASS) 108 continue; 109 /* 110 * TODO: Set context pointer to default state to allow 111 * GuC to re-init guilty contexts after internal reset. 112 */ 113 blob->ads.golden_context_lrca[engine_class] = 0; 114 blob->ads.eng_state_size[engine_class] = 115 intel_engine_context_size(dev_priv, engine_class) - 116 skipped_size; 117 } 118 119 /* System info */ 120 blob->system_info.slice_enabled = hweight8(RUNTIME_INFO(dev_priv)->sseu.slice_mask); 121 blob->system_info.rcs_enabled = 1; 122 blob->system_info.bcs_enabled = 1; 123 124 blob->system_info.vdbox_enable_mask = VDBOX_MASK(dev_priv); 125 blob->system_info.vebox_enable_mask = VEBOX_MASK(dev_priv); 126 blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access; 127 128 base = intel_guc_ggtt_offset(guc, guc->ads_vma); 129 130 /* Clients info */ 131 guc_ct_pool_entries_init(blob->ct_pool, ARRAY_SIZE(blob->ct_pool)); 132 133 blob->clients_info.clients_num = 1; 134 blob->clients_info.ct_pool_addr = base + ptr_offset(blob, ct_pool); 135 blob->clients_info.ct_pool_count = ARRAY_SIZE(blob->ct_pool); 136 137 /* ADS */ 138 blob->ads.scheduler_policies = base + ptr_offset(blob, policies); 139 blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer); 140 blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state); 141 blob->ads.gt_system_info = base + ptr_offset(blob, system_info); 142 blob->ads.clients_info = base + ptr_offset(blob, clients_info); 143 144 i915_gem_object_flush_map(guc->ads_vma->obj); 145 } 146 147 /** 148 * intel_guc_ads_create() - allocates and initializes GuC ADS. 149 * @guc: intel_guc struct 150 * 151 * GuC needs memory block (Additional Data Struct), where it will store 152 * some data. Allocate and initialize such memory block for GuC use. 153 */ 154 int intel_guc_ads_create(struct intel_guc *guc) 155 { 156 const u32 size = PAGE_ALIGN(sizeof(struct __guc_ads_blob)); 157 struct i915_vma *vma; 158 void *blob; 159 int ret; 160 161 GEM_BUG_ON(guc->ads_vma); 162 163 vma = intel_guc_allocate_vma(guc, size); 164 if (IS_ERR(vma)) 165 return PTR_ERR(vma); 166 167 blob = i915_gem_object_pin_map(vma->obj, I915_MAP_WB); 168 if (IS_ERR(blob)) { 169 ret = PTR_ERR(blob); 170 goto err_vma; 171 } 172 173 guc->ads_vma = vma; 174 guc->ads_blob = blob; 175 176 __guc_ads_init(guc); 177 178 return 0; 179 180 err_vma: 181 i915_vma_unpin_and_release(&guc->ads_vma, 0); 182 return ret; 183 } 184 185 void intel_guc_ads_destroy(struct intel_guc *guc) 186 { 187 i915_vma_unpin_and_release(&guc->ads_vma, I915_VMA_RELEASE_MAP); 188 } 189 190 /** 191 * intel_guc_ads_reset() - prepares GuC Additional Data Struct for reuse 192 * @guc: intel_guc struct 193 * 194 * GuC stores some data in ADS, which might be stale after a reset. 195 * Reinitialize whole ADS in case any part of it was corrupted during 196 * previous GuC run. 197 */ 198 void intel_guc_ads_reset(struct intel_guc *guc) 199 { 200 if (!guc->ads_vma) 201 return; 202 __guc_ads_init(guc); 203 } 204