1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2014-2021 Intel Corporation 4 */ 5 6 #ifndef _ABI_GUC_ACTIONS_ABI_H 7 #define _ABI_GUC_ACTIONS_ABI_H 8 9 enum intel_guc_action { 10 INTEL_GUC_ACTION_DEFAULT = 0x0, 11 INTEL_GUC_ACTION_REQUEST_PREEMPTION = 0x2, 12 INTEL_GUC_ACTION_REQUEST_ENGINE_RESET = 0x3, 13 INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10, 14 INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20, 15 INTEL_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE = 0x30, 16 INTEL_GUC_ACTION_UK_LOG_ENABLE_LOGGING = 0x40, 17 INTEL_GUC_ACTION_FORCE_LOG_BUFFER_FLUSH = 0x302, 18 INTEL_GUC_ACTION_ENTER_S_STATE = 0x501, 19 INTEL_GUC_ACTION_EXIT_S_STATE = 0x502, 20 INTEL_GUC_ACTION_SLPC_REQUEST = 0x3003, 21 INTEL_GUC_ACTION_AUTHENTICATE_HUC = 0x4000, 22 INTEL_GUC_ACTION_REGISTER_COMMAND_TRANSPORT_BUFFER = 0x4505, 23 INTEL_GUC_ACTION_DEREGISTER_COMMAND_TRANSPORT_BUFFER = 0x4506, 24 INTEL_GUC_ACTION_LIMIT 25 }; 26 27 enum intel_guc_preempt_options { 28 INTEL_GUC_PREEMPT_OPTION_DROP_WORK_Q = 0x4, 29 INTEL_GUC_PREEMPT_OPTION_DROP_SUBMIT_Q = 0x8, 30 }; 31 32 enum intel_guc_report_status { 33 INTEL_GUC_REPORT_STATUS_UNKNOWN = 0x0, 34 INTEL_GUC_REPORT_STATUS_ACKED = 0x1, 35 INTEL_GUC_REPORT_STATUS_ERROR = 0x2, 36 INTEL_GUC_REPORT_STATUS_COMPLETE = 0x4, 37 }; 38 39 enum intel_guc_sleep_state_status { 40 INTEL_GUC_SLEEP_STATE_SUCCESS = 0x1, 41 INTEL_GUC_SLEEP_STATE_PREEMPT_TO_IDLE_FAILED = 0x2, 42 INTEL_GUC_SLEEP_STATE_ENGINE_RESET_FAILED = 0x3 43 #define INTEL_GUC_SLEEP_STATE_INVALID_MASK 0x80000000 44 }; 45 46 #define GUC_LOG_CONTROL_LOGGING_ENABLED (1 << 0) 47 #define GUC_LOG_CONTROL_VERBOSITY_SHIFT 4 48 #define GUC_LOG_CONTROL_VERBOSITY_MASK (0xF << GUC_LOG_CONTROL_VERBOSITY_SHIFT) 49 #define GUC_LOG_CONTROL_DEFAULT_LOGGING (1 << 8) 50 51 #endif /* _ABI_GUC_ACTIONS_ABI_H */ 52