1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #include "intel_pm.h" /* intel_gpu_freq() */ 7 #include "selftest_llc.h" 8 #include "intel_rps.h" 9 10 static int gen6_verify_ring_freq(struct intel_llc *llc) 11 { 12 struct drm_i915_private *i915 = llc_to_gt(llc)->i915; 13 struct ia_constants consts; 14 intel_wakeref_t wakeref; 15 unsigned int gpu_freq; 16 int err = 0; 17 18 wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm); 19 20 if (!get_ia_constants(llc, &consts)) 21 goto out_rpm; 22 23 for (gpu_freq = consts.min_gpu_freq; 24 gpu_freq <= consts.max_gpu_freq; 25 gpu_freq++) { 26 struct intel_rps *rps = &llc_to_gt(llc)->rps; 27 28 unsigned int ia_freq, ring_freq, found; 29 u32 val; 30 31 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); 32 33 val = gpu_freq; 34 if (snb_pcode_read(llc_to_gt(llc)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE, 35 &val, NULL)) { 36 pr_err("Failed to read freq table[%d], range [%d, %d]\n", 37 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); 38 err = -ENXIO; 39 break; 40 } 41 42 found = (val >> 0) & 0xff; 43 if (found != ia_freq) { 44 pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n", 45 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 46 intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 47 found, ia_freq); 48 err = -EINVAL; 49 break; 50 } 51 52 found = (val >> 8) & 0xff; 53 if (found != ring_freq) { 54 pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n", 55 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 56 intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 57 found, ring_freq); 58 err = -EINVAL; 59 break; 60 } 61 } 62 63 out_rpm: 64 intel_runtime_pm_put(llc_to_gt(llc)->uncore->rpm, wakeref); 65 return err; 66 } 67 68 int st_llc_verify(struct intel_llc *llc) 69 { 70 return gen6_verify_ring_freq(llc); 71 } 72