1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/slab.h> 7 8 #include "gem/i915_gem_lmem.h" 9 10 #include "i915_trace.h" 11 #include "intel_gtt.h" 12 #include "gen6_ppgtt.h" 13 #include "gen8_ppgtt.h" 14 15 struct i915_page_table *alloc_pt(struct i915_address_space *vm) 16 { 17 struct i915_page_table *pt; 18 19 pt = kmalloc(sizeof(*pt), I915_GFP_ALLOW_FAIL); 20 if (unlikely(!pt)) 21 return ERR_PTR(-ENOMEM); 22 23 pt->base = vm->alloc_pt_dma(vm, I915_GTT_PAGE_SIZE_4K); 24 if (IS_ERR(pt->base)) { 25 kfree(pt); 26 return ERR_PTR(-ENOMEM); 27 } 28 29 atomic_set(&pt->used, 0); 30 return pt; 31 } 32 33 struct i915_page_directory *__alloc_pd(int count) 34 { 35 struct i915_page_directory *pd; 36 37 pd = kzalloc(sizeof(*pd), I915_GFP_ALLOW_FAIL); 38 if (unlikely(!pd)) 39 return NULL; 40 41 pd->entry = kcalloc(count, sizeof(*pd->entry), I915_GFP_ALLOW_FAIL); 42 if (unlikely(!pd->entry)) { 43 kfree(pd); 44 return NULL; 45 } 46 47 spin_lock_init(&pd->lock); 48 return pd; 49 } 50 51 struct i915_page_directory *alloc_pd(struct i915_address_space *vm) 52 { 53 struct i915_page_directory *pd; 54 55 pd = __alloc_pd(I915_PDES); 56 if (unlikely(!pd)) 57 return ERR_PTR(-ENOMEM); 58 59 pd->pt.base = vm->alloc_pt_dma(vm, I915_GTT_PAGE_SIZE_4K); 60 if (IS_ERR(pd->pt.base)) { 61 kfree(pd->entry); 62 kfree(pd); 63 return ERR_PTR(-ENOMEM); 64 } 65 66 return pd; 67 } 68 69 void free_px(struct i915_address_space *vm, struct i915_page_table *pt, int lvl) 70 { 71 BUILD_BUG_ON(offsetof(struct i915_page_directory, pt)); 72 73 if (lvl) { 74 struct i915_page_directory *pd = 75 container_of(pt, typeof(*pd), pt); 76 kfree(pd->entry); 77 } 78 79 if (pt->base) 80 i915_gem_object_put(pt->base); 81 82 kfree(pt); 83 } 84 85 static void 86 write_dma_entry(struct drm_i915_gem_object * const pdma, 87 const unsigned short idx, 88 const u64 encoded_entry) 89 { 90 u64 * const vaddr = __px_vaddr(pdma); 91 92 vaddr[idx] = encoded_entry; 93 clflush_cache_range(&vaddr[idx], sizeof(u64)); 94 } 95 96 void 97 __set_pd_entry(struct i915_page_directory * const pd, 98 const unsigned short idx, 99 struct i915_page_table * const to, 100 u64 (*encode)(const dma_addr_t, const enum i915_cache_level)) 101 { 102 /* Each thread pre-pins the pd, and we may have a thread per pde. */ 103 GEM_BUG_ON(atomic_read(px_used(pd)) > NALLOC * I915_PDES); 104 105 atomic_inc(px_used(pd)); 106 pd->entry[idx] = to; 107 write_dma_entry(px_base(pd), idx, encode(px_dma(to), I915_CACHE_LLC)); 108 } 109 110 void 111 clear_pd_entry(struct i915_page_directory * const pd, 112 const unsigned short idx, 113 const struct drm_i915_gem_object * const scratch) 114 { 115 GEM_BUG_ON(atomic_read(px_used(pd)) == 0); 116 117 write_dma_entry(px_base(pd), idx, scratch->encode); 118 pd->entry[idx] = NULL; 119 atomic_dec(px_used(pd)); 120 } 121 122 bool 123 release_pd_entry(struct i915_page_directory * const pd, 124 const unsigned short idx, 125 struct i915_page_table * const pt, 126 const struct drm_i915_gem_object * const scratch) 127 { 128 bool free = false; 129 130 if (atomic_add_unless(&pt->used, -1, 1)) 131 return false; 132 133 spin_lock(&pd->lock); 134 if (atomic_dec_and_test(&pt->used)) { 135 clear_pd_entry(pd, idx, scratch); 136 free = true; 137 } 138 spin_unlock(&pd->lock); 139 140 return free; 141 } 142 143 int i915_ppgtt_init_hw(struct intel_gt *gt) 144 { 145 struct drm_i915_private *i915 = gt->i915; 146 147 gtt_write_workarounds(gt); 148 149 if (GRAPHICS_VER(i915) == 6) 150 gen6_ppgtt_enable(gt); 151 else if (GRAPHICS_VER(i915) == 7) 152 gen7_ppgtt_enable(gt); 153 154 return 0; 155 } 156 157 static struct i915_ppgtt * 158 __ppgtt_create(struct intel_gt *gt, unsigned long lmem_pt_obj_flags) 159 { 160 if (GRAPHICS_VER(gt->i915) < 8) 161 return gen6_ppgtt_create(gt); 162 else 163 return gen8_ppgtt_create(gt, lmem_pt_obj_flags); 164 } 165 166 struct i915_ppgtt *i915_ppgtt_create(struct intel_gt *gt, 167 unsigned long lmem_pt_obj_flags) 168 { 169 struct i915_ppgtt *ppgtt; 170 171 ppgtt = __ppgtt_create(gt, lmem_pt_obj_flags); 172 if (IS_ERR(ppgtt)) 173 return ppgtt; 174 175 trace_i915_ppgtt_create(&ppgtt->vm); 176 177 return ppgtt; 178 } 179 180 void ppgtt_bind_vma(struct i915_address_space *vm, 181 struct i915_vm_pt_stash *stash, 182 struct i915_vma_resource *vma_res, 183 enum i915_cache_level cache_level, 184 u32 flags) 185 { 186 u32 pte_flags; 187 188 if (!vma_res->allocated) { 189 vm->allocate_va_range(vm, stash, vma_res->start, 190 vma_res->vma_size); 191 vma_res->allocated = true; 192 } 193 194 /* Applicable to VLV, and gen8+ */ 195 pte_flags = 0; 196 if (vma_res->bi.readonly) 197 pte_flags |= PTE_READ_ONLY; 198 if (vma_res->bi.lmem) 199 pte_flags |= PTE_LM; 200 201 vm->insert_entries(vm, vma_res, cache_level, pte_flags); 202 wmb(); 203 } 204 205 void ppgtt_unbind_vma(struct i915_address_space *vm, 206 struct i915_vma_resource *vma_res) 207 { 208 if (vma_res->allocated) 209 vm->clear_range(vm, vma_res->start, vma_res->vma_size); 210 } 211 212 static unsigned long pd_count(u64 size, int shift) 213 { 214 /* Beware later misalignment */ 215 return (size + 2 * (BIT_ULL(shift) - 1)) >> shift; 216 } 217 218 int i915_vm_alloc_pt_stash(struct i915_address_space *vm, 219 struct i915_vm_pt_stash *stash, 220 u64 size) 221 { 222 unsigned long count; 223 int shift, n; 224 225 shift = vm->pd_shift; 226 if (!shift) 227 return 0; 228 229 count = pd_count(size, shift); 230 while (count--) { 231 struct i915_page_table *pt; 232 233 pt = alloc_pt(vm); 234 if (IS_ERR(pt)) { 235 i915_vm_free_pt_stash(vm, stash); 236 return PTR_ERR(pt); 237 } 238 239 pt->stash = stash->pt[0]; 240 stash->pt[0] = pt; 241 } 242 243 for (n = 1; n < vm->top; n++) { 244 shift += ilog2(I915_PDES); /* Each PD holds 512 entries */ 245 count = pd_count(size, shift); 246 while (count--) { 247 struct i915_page_directory *pd; 248 249 pd = alloc_pd(vm); 250 if (IS_ERR(pd)) { 251 i915_vm_free_pt_stash(vm, stash); 252 return PTR_ERR(pd); 253 } 254 255 pd->pt.stash = stash->pt[1]; 256 stash->pt[1] = &pd->pt; 257 } 258 } 259 260 return 0; 261 } 262 263 int i915_vm_map_pt_stash(struct i915_address_space *vm, 264 struct i915_vm_pt_stash *stash) 265 { 266 struct i915_page_table *pt; 267 int n, err; 268 269 for (n = 0; n < ARRAY_SIZE(stash->pt); n++) { 270 for (pt = stash->pt[n]; pt; pt = pt->stash) { 271 err = map_pt_dma_locked(vm, pt->base); 272 if (err) 273 return err; 274 } 275 } 276 277 return 0; 278 } 279 280 void i915_vm_free_pt_stash(struct i915_address_space *vm, 281 struct i915_vm_pt_stash *stash) 282 { 283 struct i915_page_table *pt; 284 int n; 285 286 for (n = 0; n < ARRAY_SIZE(stash->pt); n++) { 287 while ((pt = stash->pt[n])) { 288 stash->pt[n] = pt->stash; 289 free_px(vm, pt, n); 290 } 291 } 292 } 293 294 void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt, 295 unsigned long lmem_pt_obj_flags) 296 { 297 struct drm_i915_private *i915 = gt->i915; 298 299 ppgtt->vm.gt = gt; 300 ppgtt->vm.i915 = i915; 301 ppgtt->vm.dma = i915->drm.dev; 302 ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size); 303 ppgtt->vm.lmem_pt_obj_flags = lmem_pt_obj_flags; 304 305 dma_resv_init(&ppgtt->vm._resv); 306 i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT); 307 308 ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma; 309 ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma; 310 } 311