1*24f90d66SChris Wilson /* SPDX-License-Identifier: MIT */ 2d762043fSAndi Shyti /* 3d762043fSAndi Shyti * Copyright © 2019 Intel Corporation 4d762043fSAndi Shyti */ 5d762043fSAndi Shyti 6d762043fSAndi Shyti #ifndef INTEL_GT_PM_IRQ_H 7d762043fSAndi Shyti #define INTEL_GT_PM_IRQ_H 8d762043fSAndi Shyti 9d762043fSAndi Shyti #include <linux/types.h> 10d762043fSAndi Shyti 11d762043fSAndi Shyti struct intel_gt; 12d762043fSAndi Shyti 13d762043fSAndi Shyti void gen6_gt_pm_unmask_irq(struct intel_gt *gt, u32 mask); 14d762043fSAndi Shyti void gen6_gt_pm_mask_irq(struct intel_gt *gt, u32 mask); 15d762043fSAndi Shyti 16d762043fSAndi Shyti void gen6_gt_pm_enable_irq(struct intel_gt *gt, u32 enable_mask); 17d762043fSAndi Shyti void gen6_gt_pm_disable_irq(struct intel_gt *gt, u32 disable_mask); 18d762043fSAndi Shyti 19d762043fSAndi Shyti void gen6_gt_pm_reset_iir(struct intel_gt *gt, u32 reset_mask); 20d762043fSAndi Shyti 21d762043fSAndi Shyti #endif /* INTEL_GT_PM_IRQ_H */ 22