1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_GT__ 7 #define __INTEL_GT__ 8 9 #include "intel_engine_types.h" 10 #include "intel_gt_types.h" 11 #include "intel_reset.h" 12 13 struct drm_i915_private; 14 struct drm_printer; 15 16 struct insert_entries { 17 struct i915_address_space *vm; 18 struct i915_vma_resource *vma_res; 19 enum i915_cache_level level; 20 u32 flags; 21 }; 22 23 #define GT_TRACE(gt, fmt, ...) do { \ 24 const struct intel_gt *gt__ __maybe_unused = (gt); \ 25 GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \ 26 ##__VA_ARGS__); \ 27 } while (0) 28 29 static inline bool gt_is_root(struct intel_gt *gt) 30 { 31 return !gt->info.id; 32 } 33 34 static inline struct intel_gt *uc_to_gt(struct intel_uc *uc) 35 { 36 return container_of(uc, struct intel_gt, uc); 37 } 38 39 static inline struct intel_gt *guc_to_gt(struct intel_guc *guc) 40 { 41 return container_of(guc, struct intel_gt, uc.guc); 42 } 43 44 static inline struct intel_gt *huc_to_gt(struct intel_huc *huc) 45 { 46 return container_of(huc, struct intel_gt, uc.huc); 47 } 48 49 static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc) 50 { 51 return container_of(gsc, struct intel_gt, gsc); 52 } 53 54 void intel_root_gt_init_early(struct drm_i915_private *i915); 55 int intel_gt_assign_ggtt(struct intel_gt *gt); 56 int intel_gt_init_mmio(struct intel_gt *gt); 57 int __must_check intel_gt_init_hw(struct intel_gt *gt); 58 int intel_gt_init(struct intel_gt *gt); 59 void intel_gt_driver_register(struct intel_gt *gt); 60 61 void intel_gt_driver_unregister(struct intel_gt *gt); 62 void intel_gt_driver_remove(struct intel_gt *gt); 63 void intel_gt_driver_release(struct intel_gt *gt); 64 65 void intel_gt_driver_late_release_all(struct drm_i915_private *i915); 66 67 int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout); 68 69 void intel_gt_check_and_clear_faults(struct intel_gt *gt); 70 void intel_gt_clear_error_registers(struct intel_gt *gt, 71 intel_engine_mask_t engine_mask); 72 73 void intel_gt_flush_ggtt_writes(struct intel_gt *gt); 74 void intel_gt_chipset_flush(struct intel_gt *gt); 75 76 static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt, 77 enum intel_gt_scratch_field field) 78 { 79 return i915_ggtt_offset(gt->scratch) + field; 80 } 81 82 static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt) 83 { 84 return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) || 85 test_bit(I915_WEDGED_ON_FINI, >->reset.flags); 86 } 87 88 static inline bool intel_gt_is_wedged(const struct intel_gt *gt) 89 { 90 GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) && 91 !test_bit(I915_WEDGED, >->reset.flags)); 92 93 return unlikely(test_bit(I915_WEDGED, >->reset.flags)); 94 } 95 96 static inline bool intel_gt_needs_read_steering(struct intel_gt *gt, 97 enum intel_steering_type type) 98 { 99 return gt->steering_table[type]; 100 } 101 102 void intel_gt_get_valid_steering_for_reg(struct intel_gt *gt, i915_reg_t reg, 103 u8 *sliceid, u8 *subsliceid); 104 105 u32 intel_gt_read_register_fw(struct intel_gt *gt, i915_reg_t reg); 106 u32 intel_gt_read_register(struct intel_gt *gt, i915_reg_t reg); 107 108 void intel_gt_report_steering(struct drm_printer *p, struct intel_gt *gt, 109 bool dump_table); 110 111 int intel_gt_probe_all(struct drm_i915_private *i915); 112 int intel_gt_tiles_init(struct drm_i915_private *i915); 113 void intel_gt_release_all(struct drm_i915_private *i915); 114 115 #define for_each_gt(gt__, i915__, id__) \ 116 for ((id__) = 0; \ 117 (id__) < I915_MAX_GT; \ 118 (id__)++) \ 119 for_each_if(((gt__) = (i915__)->gt[(id__)])) 120 121 void intel_gt_info_print(const struct intel_gt_info *info, 122 struct drm_printer *p); 123 124 void intel_gt_watchdog_work(struct work_struct *work); 125 126 void intel_gt_invalidate_tlbs(struct intel_gt *gt); 127 128 struct resource intel_pci_resource(struct pci_dev *pdev, int bar); 129 130 #endif /* __INTEL_GT_H__ */ 131