1 /*
2  * Copyright © 2015 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  */
24 
25 #include <linux/kthread.h>
26 #include <trace/events/dma_fence.h>
27 #include <uapi/linux/sched/types.h>
28 
29 #include "i915_drv.h"
30 #include "i915_trace.h"
31 #include "intel_breadcrumbs.h"
32 #include "intel_context.h"
33 #include "intel_gt_pm.h"
34 #include "intel_gt_requests.h"
35 
36 static void irq_enable(struct intel_engine_cs *engine)
37 {
38 	if (!engine->irq_enable)
39 		return;
40 
41 	/* Caller disables interrupts */
42 	spin_lock(&engine->gt->irq_lock);
43 	engine->irq_enable(engine);
44 	spin_unlock(&engine->gt->irq_lock);
45 }
46 
47 static void irq_disable(struct intel_engine_cs *engine)
48 {
49 	if (!engine->irq_disable)
50 		return;
51 
52 	/* Caller disables interrupts */
53 	spin_lock(&engine->gt->irq_lock);
54 	engine->irq_disable(engine);
55 	spin_unlock(&engine->gt->irq_lock);
56 }
57 
58 static void __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
59 {
60 	lockdep_assert_held(&b->irq_lock);
61 
62 	if (!b->irq_engine || b->irq_armed)
63 		return;
64 
65 	if (!intel_gt_pm_get_if_awake(b->irq_engine->gt))
66 		return;
67 
68 	/*
69 	 * The breadcrumb irq will be disarmed on the interrupt after the
70 	 * waiters are signaled. This gives us a single interrupt window in
71 	 * which we can add a new waiter and avoid the cost of re-enabling
72 	 * the irq.
73 	 */
74 	WRITE_ONCE(b->irq_armed, true);
75 
76 	/*
77 	 * Since we are waiting on a request, the GPU should be busy
78 	 * and should have its own rpm reference. This is tracked
79 	 * by i915->gt.awake, we can forgo holding our own wakref
80 	 * for the interrupt as before i915->gt.awake is released (when
81 	 * the driver is idle) we disarm the breadcrumbs.
82 	 */
83 
84 	if (!b->irq_enabled++)
85 		irq_enable(b->irq_engine);
86 }
87 
88 static void __intel_breadcrumbs_disarm_irq(struct intel_breadcrumbs *b)
89 {
90 	lockdep_assert_held(&b->irq_lock);
91 
92 	if (!b->irq_engine || !b->irq_armed)
93 		return;
94 
95 	GEM_BUG_ON(!b->irq_enabled);
96 	if (!--b->irq_enabled)
97 		irq_disable(b->irq_engine);
98 
99 	WRITE_ONCE(b->irq_armed, false);
100 	intel_gt_pm_put_async(b->irq_engine->gt);
101 }
102 
103 static void add_signaling_context(struct intel_breadcrumbs *b,
104 				  struct intel_context *ce)
105 {
106 	intel_context_get(ce);
107 	list_add_tail(&ce->signal_link, &b->signalers);
108 	if (list_is_first(&ce->signal_link, &b->signalers))
109 		__intel_breadcrumbs_arm_irq(b);
110 }
111 
112 static void remove_signaling_context(struct intel_breadcrumbs *b,
113 				     struct intel_context *ce)
114 {
115 	list_del(&ce->signal_link);
116 	intel_context_put(ce);
117 }
118 
119 static inline bool __request_completed(const struct i915_request *rq)
120 {
121 	return i915_seqno_passed(__hwsp_seqno(rq), rq->fence.seqno);
122 }
123 
124 __maybe_unused static bool
125 check_signal_order(struct intel_context *ce, struct i915_request *rq)
126 {
127 	if (rq->context != ce)
128 		return false;
129 
130 	if (!list_is_last(&rq->signal_link, &ce->signals) &&
131 	    i915_seqno_passed(rq->fence.seqno,
132 			      list_next_entry(rq, signal_link)->fence.seqno))
133 		return false;
134 
135 	if (!list_is_first(&rq->signal_link, &ce->signals) &&
136 	    i915_seqno_passed(list_prev_entry(rq, signal_link)->fence.seqno,
137 			      rq->fence.seqno))
138 		return false;
139 
140 	return true;
141 }
142 
143 static bool
144 __dma_fence_signal(struct dma_fence *fence)
145 {
146 	return !test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags);
147 }
148 
149 static void
150 __dma_fence_signal__timestamp(struct dma_fence *fence, ktime_t timestamp)
151 {
152 	fence->timestamp = timestamp;
153 	set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);
154 	trace_dma_fence_signaled(fence);
155 }
156 
157 static void
158 __dma_fence_signal__notify(struct dma_fence *fence,
159 			   const struct list_head *list)
160 {
161 	struct dma_fence_cb *cur, *tmp;
162 
163 	lockdep_assert_held(fence->lock);
164 
165 	list_for_each_entry_safe(cur, tmp, list, node) {
166 		INIT_LIST_HEAD(&cur->node);
167 		cur->func(fence, cur);
168 	}
169 }
170 
171 static void add_retire(struct intel_breadcrumbs *b, struct intel_timeline *tl)
172 {
173 	if (b->irq_engine)
174 		intel_engine_add_retire(b->irq_engine, tl);
175 }
176 
177 static bool __signal_request(struct i915_request *rq, struct list_head *signals)
178 {
179 	clear_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);
180 
181 	if (!__dma_fence_signal(&rq->fence)) {
182 		i915_request_put(rq);
183 		return false;
184 	}
185 
186 	list_add_tail(&rq->signal_link, signals);
187 	return true;
188 }
189 
190 static void signal_irq_work(struct irq_work *work)
191 {
192 	struct intel_breadcrumbs *b = container_of(work, typeof(*b), irq_work);
193 	const ktime_t timestamp = ktime_get();
194 	struct intel_context *ce, *cn;
195 	struct list_head *pos, *next;
196 	LIST_HEAD(signal);
197 
198 	spin_lock(&b->irq_lock);
199 
200 	if (list_empty(&b->signalers))
201 		__intel_breadcrumbs_disarm_irq(b);
202 
203 	list_splice_init(&b->signaled_requests, &signal);
204 
205 	list_for_each_entry_safe(ce, cn, &b->signalers, signal_link) {
206 		GEM_BUG_ON(list_empty(&ce->signals));
207 
208 		list_for_each_safe(pos, next, &ce->signals) {
209 			struct i915_request *rq =
210 				list_entry(pos, typeof(*rq), signal_link);
211 
212 			GEM_BUG_ON(!check_signal_order(ce, rq));
213 			if (!__request_completed(rq))
214 				break;
215 
216 			/*
217 			 * Queue for execution after dropping the signaling
218 			 * spinlock as the callback chain may end up adding
219 			 * more signalers to the same context or engine.
220 			 */
221 			__signal_request(rq, &signal);
222 		}
223 
224 		/*
225 		 * We process the list deletion in bulk, only using a list_add
226 		 * (not list_move) above but keeping the status of
227 		 * rq->signal_link known with the I915_FENCE_FLAG_SIGNAL bit.
228 		 */
229 		if (!list_is_first(pos, &ce->signals)) {
230 			/* Advance the list to the first incomplete request */
231 			__list_del_many(&ce->signals, pos);
232 			if (&ce->signals == pos) { /* now empty */
233 				add_retire(b, ce->timeline);
234 				remove_signaling_context(b, ce);
235 			}
236 		}
237 	}
238 
239 	spin_unlock(&b->irq_lock);
240 
241 	list_for_each_safe(pos, next, &signal) {
242 		struct i915_request *rq =
243 			list_entry(pos, typeof(*rq), signal_link);
244 		struct list_head cb_list;
245 
246 		spin_lock(&rq->lock);
247 		list_replace(&rq->fence.cb_list, &cb_list);
248 		__dma_fence_signal__timestamp(&rq->fence, timestamp);
249 		__dma_fence_signal__notify(&rq->fence, &cb_list);
250 		spin_unlock(&rq->lock);
251 
252 		i915_request_put(rq);
253 	}
254 }
255 
256 struct intel_breadcrumbs *
257 intel_breadcrumbs_create(struct intel_engine_cs *irq_engine)
258 {
259 	struct intel_breadcrumbs *b;
260 
261 	b = kzalloc(sizeof(*b), GFP_KERNEL);
262 	if (!b)
263 		return NULL;
264 
265 	spin_lock_init(&b->irq_lock);
266 	INIT_LIST_HEAD(&b->signalers);
267 	INIT_LIST_HEAD(&b->signaled_requests);
268 
269 	init_irq_work(&b->irq_work, signal_irq_work);
270 
271 	b->irq_engine = irq_engine;
272 
273 	return b;
274 }
275 
276 void intel_breadcrumbs_reset(struct intel_breadcrumbs *b)
277 {
278 	unsigned long flags;
279 
280 	if (!b->irq_engine)
281 		return;
282 
283 	spin_lock_irqsave(&b->irq_lock, flags);
284 
285 	if (b->irq_enabled)
286 		irq_enable(b->irq_engine);
287 	else
288 		irq_disable(b->irq_engine);
289 
290 	spin_unlock_irqrestore(&b->irq_lock, flags);
291 }
292 
293 void intel_breadcrumbs_park(struct intel_breadcrumbs *b)
294 {
295 	unsigned long flags;
296 
297 	if (!READ_ONCE(b->irq_armed))
298 		return;
299 
300 	spin_lock_irqsave(&b->irq_lock, flags);
301 	__intel_breadcrumbs_disarm_irq(b);
302 	spin_unlock_irqrestore(&b->irq_lock, flags);
303 
304 	if (!list_empty(&b->signalers))
305 		irq_work_queue(&b->irq_work);
306 }
307 
308 void intel_breadcrumbs_free(struct intel_breadcrumbs *b)
309 {
310 	kfree(b);
311 }
312 
313 static void insert_breadcrumb(struct i915_request *rq,
314 			      struct intel_breadcrumbs *b)
315 {
316 	struct intel_context *ce = rq->context;
317 	struct list_head *pos;
318 
319 	if (test_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags))
320 		return;
321 
322 	i915_request_get(rq);
323 
324 	/*
325 	 * If the request is already completed, we can transfer it
326 	 * straight onto a signaled list, and queue the irq worker for
327 	 * its signal completion.
328 	 */
329 	if (__request_completed(rq)) {
330 		if (__signal_request(rq, &b->signaled_requests))
331 			irq_work_queue(&b->irq_work);
332 		return;
333 	}
334 
335 	if (list_empty(&ce->signals)) {
336 		add_signaling_context(b, ce);
337 		pos = &ce->signals;
338 	} else {
339 		/*
340 		 * We keep the seqno in retirement order, so we can break
341 		 * inside intel_engine_signal_breadcrumbs as soon as we've
342 		 * passed the last completed request (or seen a request that
343 		 * hasn't event started). We could walk the timeline->requests,
344 		 * but keeping a separate signalers_list has the advantage of
345 		 * hopefully being much smaller than the full list and so
346 		 * provides faster iteration and detection when there are no
347 		 * more interrupts required for this context.
348 		 *
349 		 * We typically expect to add new signalers in order, so we
350 		 * start looking for our insertion point from the tail of
351 		 * the list.
352 		 */
353 		list_for_each_prev(pos, &ce->signals) {
354 			struct i915_request *it =
355 				list_entry(pos, typeof(*it), signal_link);
356 
357 			if (i915_seqno_passed(rq->fence.seqno, it->fence.seqno))
358 				break;
359 		}
360 	}
361 	list_add(&rq->signal_link, pos);
362 	GEM_BUG_ON(!check_signal_order(ce, rq));
363 	set_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);
364 
365 	/* Check after attaching to irq, interrupt may have already fired. */
366 	if (__request_completed(rq))
367 		irq_work_queue(&b->irq_work);
368 }
369 
370 bool i915_request_enable_breadcrumb(struct i915_request *rq)
371 {
372 	struct intel_breadcrumbs *b;
373 
374 	/* Serialises with i915_request_retire() using rq->lock */
375 	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags))
376 		return true;
377 
378 	/*
379 	 * Peek at i915_request_submit()/i915_request_unsubmit() status.
380 	 *
381 	 * If the request is not yet active (and not signaled), we will
382 	 * attach the breadcrumb later.
383 	 */
384 	if (!test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags))
385 		return true;
386 
387 	/*
388 	 * rq->engine is locked by rq->engine->active.lock. That however
389 	 * is not known until after rq->engine has been dereferenced and
390 	 * the lock acquired. Hence we acquire the lock and then validate
391 	 * that rq->engine still matches the lock we hold for it.
392 	 *
393 	 * Here, we are using the breadcrumb lock as a proxy for the
394 	 * rq->engine->active.lock, and we know that since the breadcrumb
395 	 * will be serialised within i915_request_submit/i915_request_unsubmit,
396 	 * the engine cannot change while active as long as we hold the
397 	 * breadcrumb lock on that engine.
398 	 *
399 	 * From the dma_fence_enable_signaling() path, we are outside of the
400 	 * request submit/unsubmit path, and so we must be more careful to
401 	 * acquire the right lock.
402 	 */
403 	b = READ_ONCE(rq->engine)->breadcrumbs;
404 	spin_lock(&b->irq_lock);
405 	while (unlikely(b != READ_ONCE(rq->engine)->breadcrumbs)) {
406 		spin_unlock(&b->irq_lock);
407 		b = READ_ONCE(rq->engine)->breadcrumbs;
408 		spin_lock(&b->irq_lock);
409 	}
410 
411 	/*
412 	 * Now that we are finally serialised with request submit/unsubmit,
413 	 * [with b->irq_lock] and with i915_request_retire() [via checking
414 	 * SIGNALED with rq->lock] confirm the request is indeed active. If
415 	 * it is no longer active, the breadcrumb will be attached upon
416 	 * i915_request_submit().
417 	 */
418 	if (test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags))
419 		insert_breadcrumb(rq, b);
420 
421 	spin_unlock(&b->irq_lock);
422 
423 	return true;
424 }
425 
426 void i915_request_cancel_breadcrumb(struct i915_request *rq)
427 {
428 	struct intel_breadcrumbs *b = rq->engine->breadcrumbs;
429 
430 	/*
431 	 * We must wait for b->irq_lock so that we know the interrupt handler
432 	 * has released its reference to the intel_context and has completed
433 	 * the DMA_FENCE_FLAG_SIGNALED_BIT/I915_FENCE_FLAG_SIGNAL dance (if
434 	 * required).
435 	 */
436 	spin_lock(&b->irq_lock);
437 	if (test_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags)) {
438 		struct intel_context *ce = rq->context;
439 
440 		list_del(&rq->signal_link);
441 		if (list_empty(&ce->signals))
442 			remove_signaling_context(b, ce);
443 
444 		clear_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);
445 		i915_request_put(rq);
446 	}
447 	spin_unlock(&b->irq_lock);
448 }
449 
450 static void print_signals(struct intel_breadcrumbs *b, struct drm_printer *p)
451 {
452 	struct intel_context *ce;
453 	struct i915_request *rq;
454 
455 	drm_printf(p, "Signals:\n");
456 
457 	spin_lock_irq(&b->irq_lock);
458 	list_for_each_entry(ce, &b->signalers, signal_link) {
459 		list_for_each_entry(rq, &ce->signals, signal_link) {
460 			drm_printf(p, "\t[%llx:%llx%s] @ %dms\n",
461 				   rq->fence.context, rq->fence.seqno,
462 				   i915_request_completed(rq) ? "!" :
463 				   i915_request_started(rq) ? "*" :
464 				   "",
465 				   jiffies_to_msecs(jiffies - rq->emitted_jiffies));
466 		}
467 	}
468 	spin_unlock_irq(&b->irq_lock);
469 }
470 
471 void intel_engine_print_breadcrumbs(struct intel_engine_cs *engine,
472 				    struct drm_printer *p)
473 {
474 	struct intel_breadcrumbs *b;
475 
476 	b = engine->breadcrumbs;
477 	if (!b)
478 		return;
479 
480 	drm_printf(p, "IRQ: %s\n", enableddisabled(b->irq_armed));
481 	if (!list_empty(&b->signalers))
482 		print_signals(b, p);
483 }
484