1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/log2.h> 7 8 #include "gen8_ppgtt.h" 9 #include "i915_scatterlist.h" 10 #include "i915_trace.h" 11 #include "i915_vgpu.h" 12 #include "intel_gt.h" 13 #include "intel_gtt.h" 14 15 static u64 gen8_pde_encode(const dma_addr_t addr, 16 const enum i915_cache_level level) 17 { 18 u64 pde = addr | _PAGE_PRESENT | _PAGE_RW; 19 20 if (level != I915_CACHE_NONE) 21 pde |= PPAT_CACHED_PDE; 22 else 23 pde |= PPAT_UNCACHED; 24 25 return pde; 26 } 27 28 static u64 gen8_pte_encode(dma_addr_t addr, 29 enum i915_cache_level level, 30 u32 flags) 31 { 32 gen8_pte_t pte = addr | _PAGE_PRESENT | _PAGE_RW; 33 34 if (unlikely(flags & PTE_READ_ONLY)) 35 pte &= ~_PAGE_RW; 36 37 switch (level) { 38 case I915_CACHE_NONE: 39 pte |= PPAT_UNCACHED; 40 break; 41 case I915_CACHE_WT: 42 pte |= PPAT_DISPLAY_ELLC; 43 break; 44 default: 45 pte |= PPAT_CACHED; 46 break; 47 } 48 49 return pte; 50 } 51 52 static void gen8_ppgtt_notify_vgt(struct i915_ppgtt *ppgtt, bool create) 53 { 54 struct drm_i915_private *i915 = ppgtt->vm.i915; 55 struct intel_uncore *uncore = ppgtt->vm.gt->uncore; 56 enum vgt_g2v_type msg; 57 int i; 58 59 if (create) 60 atomic_inc(px_used(ppgtt->pd)); /* never remove */ 61 else 62 atomic_dec(px_used(ppgtt->pd)); 63 64 mutex_lock(&i915->vgpu.lock); 65 66 if (i915_vm_is_4lvl(&ppgtt->vm)) { 67 const u64 daddr = px_dma(ppgtt->pd); 68 69 intel_uncore_write(uncore, 70 vgtif_reg(pdp[0].lo), lower_32_bits(daddr)); 71 intel_uncore_write(uncore, 72 vgtif_reg(pdp[0].hi), upper_32_bits(daddr)); 73 74 msg = create ? 75 VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE : 76 VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY; 77 } else { 78 for (i = 0; i < GEN8_3LVL_PDPES; i++) { 79 const u64 daddr = i915_page_dir_dma_addr(ppgtt, i); 80 81 intel_uncore_write(uncore, 82 vgtif_reg(pdp[i].lo), 83 lower_32_bits(daddr)); 84 intel_uncore_write(uncore, 85 vgtif_reg(pdp[i].hi), 86 upper_32_bits(daddr)); 87 } 88 89 msg = create ? 90 VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE : 91 VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY; 92 } 93 94 /* g2v_notify atomically (via hv trap) consumes the message packet. */ 95 intel_uncore_write(uncore, vgtif_reg(g2v_notify), msg); 96 97 mutex_unlock(&i915->vgpu.lock); 98 } 99 100 /* Index shifts into the pagetable are offset by GEN8_PTE_SHIFT [12] */ 101 #define GEN8_PAGE_SIZE (SZ_4K) /* page and page-directory sizes are the same */ 102 #define GEN8_PTE_SHIFT (ilog2(GEN8_PAGE_SIZE)) 103 #define GEN8_PDES (GEN8_PAGE_SIZE / sizeof(u64)) 104 #define gen8_pd_shift(lvl) ((lvl) * ilog2(GEN8_PDES)) 105 #define gen8_pd_index(i, lvl) i915_pde_index((i), gen8_pd_shift(lvl)) 106 #define __gen8_pte_shift(lvl) (GEN8_PTE_SHIFT + gen8_pd_shift(lvl)) 107 #define __gen8_pte_index(a, lvl) i915_pde_index((a), __gen8_pte_shift(lvl)) 108 109 #define as_pd(x) container_of((x), typeof(struct i915_page_directory), pt) 110 111 static inline unsigned int 112 gen8_pd_range(u64 start, u64 end, int lvl, unsigned int *idx) 113 { 114 const int shift = gen8_pd_shift(lvl); 115 const u64 mask = ~0ull << gen8_pd_shift(lvl + 1); 116 117 GEM_BUG_ON(start >= end); 118 end += ~mask >> gen8_pd_shift(1); 119 120 *idx = i915_pde_index(start, shift); 121 if ((start ^ end) & mask) 122 return GEN8_PDES - *idx; 123 else 124 return i915_pde_index(end, shift) - *idx; 125 } 126 127 static inline bool gen8_pd_contains(u64 start, u64 end, int lvl) 128 { 129 const u64 mask = ~0ull << gen8_pd_shift(lvl + 1); 130 131 GEM_BUG_ON(start >= end); 132 return (start ^ end) & mask && (start & ~mask) == 0; 133 } 134 135 static inline unsigned int gen8_pt_count(u64 start, u64 end) 136 { 137 GEM_BUG_ON(start >= end); 138 if ((start ^ end) >> gen8_pd_shift(1)) 139 return GEN8_PDES - (start & (GEN8_PDES - 1)); 140 else 141 return end - start; 142 } 143 144 static inline unsigned int 145 gen8_pd_top_count(const struct i915_address_space *vm) 146 { 147 unsigned int shift = __gen8_pte_shift(vm->top); 148 return (vm->total + (1ull << shift) - 1) >> shift; 149 } 150 151 static inline struct i915_page_directory * 152 gen8_pdp_for_page_index(struct i915_address_space * const vm, const u64 idx) 153 { 154 struct i915_ppgtt * const ppgtt = i915_vm_to_ppgtt(vm); 155 156 if (vm->top == 2) 157 return ppgtt->pd; 158 else 159 return i915_pd_entry(ppgtt->pd, gen8_pd_index(idx, vm->top)); 160 } 161 162 static inline struct i915_page_directory * 163 gen8_pdp_for_page_address(struct i915_address_space * const vm, const u64 addr) 164 { 165 return gen8_pdp_for_page_index(vm, addr >> GEN8_PTE_SHIFT); 166 } 167 168 static void __gen8_ppgtt_cleanup(struct i915_address_space *vm, 169 struct i915_page_directory *pd, 170 int count, int lvl) 171 { 172 if (lvl) { 173 void **pde = pd->entry; 174 175 do { 176 if (!*pde) 177 continue; 178 179 __gen8_ppgtt_cleanup(vm, *pde, GEN8_PDES, lvl - 1); 180 } while (pde++, --count); 181 } 182 183 free_px(vm, pd); 184 } 185 186 static void gen8_ppgtt_cleanup(struct i915_address_space *vm) 187 { 188 struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm); 189 190 if (intel_vgpu_active(vm->i915)) 191 gen8_ppgtt_notify_vgt(ppgtt, false); 192 193 __gen8_ppgtt_cleanup(vm, ppgtt->pd, gen8_pd_top_count(vm), vm->top); 194 free_scratch(vm); 195 } 196 197 static u64 __gen8_ppgtt_clear(struct i915_address_space * const vm, 198 struct i915_page_directory * const pd, 199 u64 start, const u64 end, int lvl) 200 { 201 const struct i915_page_scratch * const scratch = &vm->scratch[lvl]; 202 unsigned int idx, len; 203 204 GEM_BUG_ON(end > vm->total >> GEN8_PTE_SHIFT); 205 206 len = gen8_pd_range(start, end, lvl--, &idx); 207 DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n", 208 __func__, vm, lvl + 1, start, end, 209 idx, len, atomic_read(px_used(pd))); 210 GEM_BUG_ON(!len || len >= atomic_read(px_used(pd))); 211 212 do { 213 struct i915_page_table *pt = pd->entry[idx]; 214 215 if (atomic_fetch_inc(&pt->used) >> gen8_pd_shift(1) && 216 gen8_pd_contains(start, end, lvl)) { 217 DBG("%s(%p):{ lvl:%d, idx:%d, start:%llx, end:%llx } removing pd\n", 218 __func__, vm, lvl + 1, idx, start, end); 219 clear_pd_entry(pd, idx, scratch); 220 __gen8_ppgtt_cleanup(vm, as_pd(pt), I915_PDES, lvl); 221 start += (u64)I915_PDES << gen8_pd_shift(lvl); 222 continue; 223 } 224 225 if (lvl) { 226 start = __gen8_ppgtt_clear(vm, as_pd(pt), 227 start, end, lvl); 228 } else { 229 unsigned int count; 230 u64 *vaddr; 231 232 count = gen8_pt_count(start, end); 233 DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } removing pte\n", 234 __func__, vm, lvl, start, end, 235 gen8_pd_index(start, 0), count, 236 atomic_read(&pt->used)); 237 GEM_BUG_ON(!count || count >= atomic_read(&pt->used)); 238 239 vaddr = kmap_atomic_px(pt); 240 memset64(vaddr + gen8_pd_index(start, 0), 241 vm->scratch[0].encode, 242 count); 243 kunmap_atomic(vaddr); 244 245 atomic_sub(count, &pt->used); 246 start += count; 247 } 248 249 if (release_pd_entry(pd, idx, pt, scratch)) 250 free_px(vm, pt); 251 } while (idx++, --len); 252 253 return start; 254 } 255 256 static void gen8_ppgtt_clear(struct i915_address_space *vm, 257 u64 start, u64 length) 258 { 259 GEM_BUG_ON(!IS_ALIGNED(start, BIT_ULL(GEN8_PTE_SHIFT))); 260 GEM_BUG_ON(!IS_ALIGNED(length, BIT_ULL(GEN8_PTE_SHIFT))); 261 GEM_BUG_ON(range_overflows(start, length, vm->total)); 262 263 start >>= GEN8_PTE_SHIFT; 264 length >>= GEN8_PTE_SHIFT; 265 GEM_BUG_ON(length == 0); 266 267 __gen8_ppgtt_clear(vm, i915_vm_to_ppgtt(vm)->pd, 268 start, start + length, vm->top); 269 } 270 271 static int __gen8_ppgtt_alloc(struct i915_address_space * const vm, 272 struct i915_page_directory * const pd, 273 u64 * const start, const u64 end, int lvl) 274 { 275 const struct i915_page_scratch * const scratch = &vm->scratch[lvl]; 276 struct i915_page_table *alloc = NULL; 277 unsigned int idx, len; 278 int ret = 0; 279 280 GEM_BUG_ON(end > vm->total >> GEN8_PTE_SHIFT); 281 282 len = gen8_pd_range(*start, end, lvl--, &idx); 283 DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d }\n", 284 __func__, vm, lvl + 1, *start, end, 285 idx, len, atomic_read(px_used(pd))); 286 GEM_BUG_ON(!len || (idx + len - 1) >> gen8_pd_shift(1)); 287 288 spin_lock(&pd->lock); 289 GEM_BUG_ON(!atomic_read(px_used(pd))); /* Must be pinned! */ 290 do { 291 struct i915_page_table *pt = pd->entry[idx]; 292 293 if (!pt) { 294 spin_unlock(&pd->lock); 295 296 DBG("%s(%p):{ lvl:%d, idx:%d } allocating new tree\n", 297 __func__, vm, lvl + 1, idx); 298 299 pt = fetch_and_zero(&alloc); 300 if (lvl) { 301 if (!pt) { 302 pt = &alloc_pd(vm)->pt; 303 if (IS_ERR(pt)) { 304 ret = PTR_ERR(pt); 305 goto out; 306 } 307 } 308 309 fill_px(pt, vm->scratch[lvl].encode); 310 } else { 311 if (!pt) { 312 pt = alloc_pt(vm); 313 if (IS_ERR(pt)) { 314 ret = PTR_ERR(pt); 315 goto out; 316 } 317 } 318 319 if (intel_vgpu_active(vm->i915) || 320 gen8_pt_count(*start, end) < I915_PDES) 321 fill_px(pt, vm->scratch[lvl].encode); 322 } 323 324 spin_lock(&pd->lock); 325 if (likely(!pd->entry[idx])) 326 set_pd_entry(pd, idx, pt); 327 else 328 alloc = pt, pt = pd->entry[idx]; 329 } 330 331 if (lvl) { 332 atomic_inc(&pt->used); 333 spin_unlock(&pd->lock); 334 335 ret = __gen8_ppgtt_alloc(vm, as_pd(pt), 336 start, end, lvl); 337 if (unlikely(ret)) { 338 if (release_pd_entry(pd, idx, pt, scratch)) 339 free_px(vm, pt); 340 goto out; 341 } 342 343 spin_lock(&pd->lock); 344 atomic_dec(&pt->used); 345 GEM_BUG_ON(!atomic_read(&pt->used)); 346 } else { 347 unsigned int count = gen8_pt_count(*start, end); 348 349 DBG("%s(%p):{ lvl:%d, start:%llx, end:%llx, idx:%d, len:%d, used:%d } inserting pte\n", 350 __func__, vm, lvl, *start, end, 351 gen8_pd_index(*start, 0), count, 352 atomic_read(&pt->used)); 353 354 atomic_add(count, &pt->used); 355 /* All other pdes may be simultaneously removed */ 356 GEM_BUG_ON(atomic_read(&pt->used) > NALLOC * I915_PDES); 357 *start += count; 358 } 359 } while (idx++, --len); 360 spin_unlock(&pd->lock); 361 out: 362 if (alloc) 363 free_px(vm, alloc); 364 return ret; 365 } 366 367 static int gen8_ppgtt_alloc(struct i915_address_space *vm, 368 u64 start, u64 length) 369 { 370 u64 from; 371 int err; 372 373 GEM_BUG_ON(!IS_ALIGNED(start, BIT_ULL(GEN8_PTE_SHIFT))); 374 GEM_BUG_ON(!IS_ALIGNED(length, BIT_ULL(GEN8_PTE_SHIFT))); 375 GEM_BUG_ON(range_overflows(start, length, vm->total)); 376 377 start >>= GEN8_PTE_SHIFT; 378 length >>= GEN8_PTE_SHIFT; 379 GEM_BUG_ON(length == 0); 380 from = start; 381 382 err = __gen8_ppgtt_alloc(vm, i915_vm_to_ppgtt(vm)->pd, 383 &start, start + length, vm->top); 384 if (unlikely(err && from != start)) 385 __gen8_ppgtt_clear(vm, i915_vm_to_ppgtt(vm)->pd, 386 from, start, vm->top); 387 388 return err; 389 } 390 391 static __always_inline u64 392 gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt, 393 struct i915_page_directory *pdp, 394 struct sgt_dma *iter, 395 u64 idx, 396 enum i915_cache_level cache_level, 397 u32 flags) 398 { 399 struct i915_page_directory *pd; 400 const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags); 401 gen8_pte_t *vaddr; 402 403 pd = i915_pd_entry(pdp, gen8_pd_index(idx, 2)); 404 vaddr = kmap_atomic_px(i915_pt_entry(pd, gen8_pd_index(idx, 1))); 405 do { 406 GEM_BUG_ON(iter->sg->length < I915_GTT_PAGE_SIZE); 407 vaddr[gen8_pd_index(idx, 0)] = pte_encode | iter->dma; 408 409 iter->dma += I915_GTT_PAGE_SIZE; 410 if (iter->dma >= iter->max) { 411 iter->sg = __sg_next(iter->sg); 412 if (!iter->sg) { 413 idx = 0; 414 break; 415 } 416 417 iter->dma = sg_dma_address(iter->sg); 418 iter->max = iter->dma + iter->sg->length; 419 } 420 421 if (gen8_pd_index(++idx, 0) == 0) { 422 if (gen8_pd_index(idx, 1) == 0) { 423 /* Limited by sg length for 3lvl */ 424 if (gen8_pd_index(idx, 2) == 0) 425 break; 426 427 pd = pdp->entry[gen8_pd_index(idx, 2)]; 428 } 429 430 kunmap_atomic(vaddr); 431 vaddr = kmap_atomic_px(i915_pt_entry(pd, gen8_pd_index(idx, 1))); 432 } 433 } while (1); 434 kunmap_atomic(vaddr); 435 436 return idx; 437 } 438 439 static void gen8_ppgtt_insert_huge(struct i915_vma *vma, 440 struct sgt_dma *iter, 441 enum i915_cache_level cache_level, 442 u32 flags) 443 { 444 const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags); 445 u64 start = vma->node.start; 446 dma_addr_t rem = iter->sg->length; 447 448 GEM_BUG_ON(!i915_vm_is_4lvl(vma->vm)); 449 450 do { 451 struct i915_page_directory * const pdp = 452 gen8_pdp_for_page_address(vma->vm, start); 453 struct i915_page_directory * const pd = 454 i915_pd_entry(pdp, __gen8_pte_index(start, 2)); 455 gen8_pte_t encode = pte_encode; 456 unsigned int maybe_64K = -1; 457 unsigned int page_size; 458 gen8_pte_t *vaddr; 459 u16 index; 460 461 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M && 462 IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) && 463 rem >= I915_GTT_PAGE_SIZE_2M && 464 !__gen8_pte_index(start, 0)) { 465 index = __gen8_pte_index(start, 1); 466 encode |= GEN8_PDE_PS_2M; 467 page_size = I915_GTT_PAGE_SIZE_2M; 468 469 vaddr = kmap_atomic_px(pd); 470 } else { 471 struct i915_page_table *pt = 472 i915_pt_entry(pd, __gen8_pte_index(start, 1)); 473 474 index = __gen8_pte_index(start, 0); 475 page_size = I915_GTT_PAGE_SIZE; 476 477 if (!index && 478 vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K && 479 IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) && 480 (IS_ALIGNED(rem, I915_GTT_PAGE_SIZE_64K) || 481 rem >= (I915_PDES - index) * I915_GTT_PAGE_SIZE)) 482 maybe_64K = __gen8_pte_index(start, 1); 483 484 vaddr = kmap_atomic_px(pt); 485 } 486 487 do { 488 GEM_BUG_ON(iter->sg->length < page_size); 489 vaddr[index++] = encode | iter->dma; 490 491 start += page_size; 492 iter->dma += page_size; 493 rem -= page_size; 494 if (iter->dma >= iter->max) { 495 iter->sg = __sg_next(iter->sg); 496 if (!iter->sg) 497 break; 498 499 rem = iter->sg->length; 500 iter->dma = sg_dma_address(iter->sg); 501 iter->max = iter->dma + rem; 502 503 if (maybe_64K != -1 && index < I915_PDES && 504 !(IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) && 505 (IS_ALIGNED(rem, I915_GTT_PAGE_SIZE_64K) || 506 rem >= (I915_PDES - index) * I915_GTT_PAGE_SIZE))) 507 maybe_64K = -1; 508 509 if (unlikely(!IS_ALIGNED(iter->dma, page_size))) 510 break; 511 } 512 } while (rem >= page_size && index < I915_PDES); 513 514 kunmap_atomic(vaddr); 515 516 /* 517 * Is it safe to mark the 2M block as 64K? -- Either we have 518 * filled whole page-table with 64K entries, or filled part of 519 * it and have reached the end of the sg table and we have 520 * enough padding. 521 */ 522 if (maybe_64K != -1 && 523 (index == I915_PDES || 524 (i915_vm_has_scratch_64K(vma->vm) && 525 !iter->sg && IS_ALIGNED(vma->node.start + 526 vma->node.size, 527 I915_GTT_PAGE_SIZE_2M)))) { 528 vaddr = kmap_atomic_px(pd); 529 vaddr[maybe_64K] |= GEN8_PDE_IPS_64K; 530 kunmap_atomic(vaddr); 531 page_size = I915_GTT_PAGE_SIZE_64K; 532 533 /* 534 * We write all 4K page entries, even when using 64K 535 * pages. In order to verify that the HW isn't cheating 536 * by using the 4K PTE instead of the 64K PTE, we want 537 * to remove all the surplus entries. If the HW skipped 538 * the 64K PTE, it will read/write into the scratch page 539 * instead - which we detect as missing results during 540 * selftests. 541 */ 542 if (I915_SELFTEST_ONLY(vma->vm->scrub_64K)) { 543 u16 i; 544 545 encode = vma->vm->scratch[0].encode; 546 vaddr = kmap_atomic_px(i915_pt_entry(pd, maybe_64K)); 547 548 for (i = 1; i < index; i += 16) 549 memset64(vaddr + i, encode, 15); 550 551 kunmap_atomic(vaddr); 552 } 553 } 554 555 vma->page_sizes.gtt |= page_size; 556 } while (iter->sg); 557 } 558 559 static void gen8_ppgtt_insert(struct i915_address_space *vm, 560 struct i915_vma *vma, 561 enum i915_cache_level cache_level, 562 u32 flags) 563 { 564 struct i915_ppgtt * const ppgtt = i915_vm_to_ppgtt(vm); 565 struct sgt_dma iter = sgt_dma(vma); 566 567 if (vma->page_sizes.sg > I915_GTT_PAGE_SIZE) { 568 gen8_ppgtt_insert_huge(vma, &iter, cache_level, flags); 569 } else { 570 u64 idx = vma->node.start >> GEN8_PTE_SHIFT; 571 572 do { 573 struct i915_page_directory * const pdp = 574 gen8_pdp_for_page_index(vm, idx); 575 576 idx = gen8_ppgtt_insert_pte(ppgtt, pdp, &iter, idx, 577 cache_level, flags); 578 } while (idx); 579 580 vma->page_sizes.gtt = I915_GTT_PAGE_SIZE; 581 } 582 } 583 584 static int gen8_init_scratch(struct i915_address_space *vm) 585 { 586 int ret; 587 int i; 588 589 /* 590 * If everybody agrees to not to write into the scratch page, 591 * we can reuse it for all vm, keeping contexts and processes separate. 592 */ 593 if (vm->has_read_only && vm->gt->vm && !i915_is_ggtt(vm->gt->vm)) { 594 struct i915_address_space *clone = vm->gt->vm; 595 596 GEM_BUG_ON(!clone->has_read_only); 597 598 vm->scratch_order = clone->scratch_order; 599 memcpy(vm->scratch, clone->scratch, sizeof(vm->scratch)); 600 px_dma(&vm->scratch[0]) = 0; /* no xfer of ownership */ 601 return 0; 602 } 603 604 ret = setup_scratch_page(vm, __GFP_HIGHMEM); 605 if (ret) 606 return ret; 607 608 vm->scratch[0].encode = 609 gen8_pte_encode(px_dma(&vm->scratch[0]), 610 I915_CACHE_LLC, vm->has_read_only); 611 612 for (i = 1; i <= vm->top; i++) { 613 if (unlikely(setup_page_dma(vm, px_base(&vm->scratch[i])))) 614 goto free_scratch; 615 616 fill_px(&vm->scratch[i], vm->scratch[i - 1].encode); 617 vm->scratch[i].encode = 618 gen8_pde_encode(px_dma(&vm->scratch[i]), 619 I915_CACHE_LLC); 620 } 621 622 return 0; 623 624 free_scratch: 625 free_scratch(vm); 626 return -ENOMEM; 627 } 628 629 static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt) 630 { 631 struct i915_address_space *vm = &ppgtt->vm; 632 struct i915_page_directory *pd = ppgtt->pd; 633 unsigned int idx; 634 635 GEM_BUG_ON(vm->top != 2); 636 GEM_BUG_ON(gen8_pd_top_count(vm) != GEN8_3LVL_PDPES); 637 638 for (idx = 0; idx < GEN8_3LVL_PDPES; idx++) { 639 struct i915_page_directory *pde; 640 641 pde = alloc_pd(vm); 642 if (IS_ERR(pde)) 643 return PTR_ERR(pde); 644 645 fill_px(pde, vm->scratch[1].encode); 646 set_pd_entry(pd, idx, pde); 647 atomic_inc(px_used(pde)); /* keep pinned */ 648 } 649 wmb(); 650 651 return 0; 652 } 653 654 static struct i915_page_directory * 655 gen8_alloc_top_pd(struct i915_address_space *vm) 656 { 657 const unsigned int count = gen8_pd_top_count(vm); 658 struct i915_page_directory *pd; 659 660 GEM_BUG_ON(count > ARRAY_SIZE(pd->entry)); 661 662 pd = __alloc_pd(offsetof(typeof(*pd), entry[count])); 663 if (unlikely(!pd)) 664 return ERR_PTR(-ENOMEM); 665 666 if (unlikely(setup_page_dma(vm, px_base(pd)))) { 667 kfree(pd); 668 return ERR_PTR(-ENOMEM); 669 } 670 671 fill_page_dma(px_base(pd), vm->scratch[vm->top].encode, count); 672 atomic_inc(px_used(pd)); /* mark as pinned */ 673 return pd; 674 } 675 676 /* 677 * GEN8 legacy ppgtt programming is accomplished through a max 4 PDP registers 678 * with a net effect resembling a 2-level page table in normal x86 terms. Each 679 * PDP represents 1GB of memory 4 * 512 * 512 * 4096 = 4GB legacy 32b address 680 * space. 681 * 682 */ 683 struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt) 684 { 685 struct i915_ppgtt *ppgtt; 686 int err; 687 688 ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL); 689 if (!ppgtt) 690 return ERR_PTR(-ENOMEM); 691 692 ppgtt_init(ppgtt, gt); 693 ppgtt->vm.top = i915_vm_is_4lvl(&ppgtt->vm) ? 3 : 2; 694 695 /* 696 * From bdw, there is hw support for read-only pages in the PPGTT. 697 * 698 * Gen11 has HSDES#:1807136187 unresolved. Disable ro support 699 * for now. 700 * 701 * Gen12 has inherited the same read-only fault issue from gen11. 702 */ 703 ppgtt->vm.has_read_only = !IS_GEN_RANGE(gt->i915, 11, 12); 704 705 /* 706 * There are only few exceptions for gen >=6. chv and bxt. 707 * And we are not sure about the latter so play safe for now. 708 */ 709 if (IS_CHERRYVIEW(gt->i915) || IS_BROXTON(gt->i915)) 710 ppgtt->vm.pt_kmap_wc = true; 711 712 err = gen8_init_scratch(&ppgtt->vm); 713 if (err) 714 goto err_free; 715 716 ppgtt->pd = gen8_alloc_top_pd(&ppgtt->vm); 717 if (IS_ERR(ppgtt->pd)) { 718 err = PTR_ERR(ppgtt->pd); 719 goto err_free_scratch; 720 } 721 722 if (!i915_vm_is_4lvl(&ppgtt->vm)) { 723 err = gen8_preallocate_top_level_pdp(ppgtt); 724 if (err) 725 goto err_free_pd; 726 } 727 728 ppgtt->vm.bind_async_flags = I915_VMA_LOCAL_BIND; 729 ppgtt->vm.insert_entries = gen8_ppgtt_insert; 730 ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc; 731 ppgtt->vm.clear_range = gen8_ppgtt_clear; 732 733 ppgtt->vm.pte_encode = gen8_pte_encode; 734 735 if (intel_vgpu_active(gt->i915)) 736 gen8_ppgtt_notify_vgt(ppgtt, true); 737 738 ppgtt->vm.cleanup = gen8_ppgtt_cleanup; 739 740 return ppgtt; 741 742 err_free_pd: 743 __gen8_ppgtt_cleanup(&ppgtt->vm, ppgtt->pd, 744 gen8_pd_top_count(&ppgtt->vm), ppgtt->vm.top); 745 err_free_scratch: 746 free_scratch(&ppgtt->vm); 747 err_free: 748 kfree(ppgtt); 749 return ERR_PTR(err); 750 } 751