1 /*
2  * SPDX-License-Identifier: MIT
3  *
4  * Copyright © 2014-2016 Intel Corporation
5  */
6 
7 #include <linux/anon_inodes.h>
8 #include <linux/mman.h>
9 #include <linux/pfn_t.h>
10 #include <linux/sizes.h>
11 
12 #include "gt/intel_gt.h"
13 #include "gt/intel_gt_requests.h"
14 
15 #include "i915_drv.h"
16 #include "i915_gem_gtt.h"
17 #include "i915_gem_ioctls.h"
18 #include "i915_gem_object.h"
19 #include "i915_gem_mman.h"
20 #include "i915_mm.h"
21 #include "i915_trace.h"
22 #include "i915_user_extensions.h"
23 #include "i915_gem_ttm.h"
24 #include "i915_vma.h"
25 
26 static inline bool
27 __vma_matches(struct vm_area_struct *vma, struct file *filp,
28 	      unsigned long addr, unsigned long size)
29 {
30 	if (vma->vm_file != filp)
31 		return false;
32 
33 	return vma->vm_start == addr &&
34 	       (vma->vm_end - vma->vm_start) == PAGE_ALIGN(size);
35 }
36 
37 /**
38  * i915_gem_mmap_ioctl - Maps the contents of an object, returning the address
39  *			 it is mapped to.
40  * @dev: drm device
41  * @data: ioctl data blob
42  * @file: drm file
43  *
44  * While the mapping holds a reference on the contents of the object, it doesn't
45  * imply a ref on the object itself.
46  *
47  * IMPORTANT:
48  *
49  * DRM driver writers who look a this function as an example for how to do GEM
50  * mmap support, please don't implement mmap support like here. The modern way
51  * to implement DRM mmap support is with an mmap offset ioctl (like
52  * i915_gem_mmap_gtt) and then using the mmap syscall on the DRM fd directly.
53  * That way debug tooling like valgrind will understand what's going on, hiding
54  * the mmap call in a driver private ioctl will break that. The i915 driver only
55  * does cpu mmaps this way because we didn't know better.
56  */
57 int
58 i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
59 		    struct drm_file *file)
60 {
61 	struct drm_i915_private *i915 = to_i915(dev);
62 	struct drm_i915_gem_mmap *args = data;
63 	struct drm_i915_gem_object *obj;
64 	unsigned long addr;
65 
66 	/*
67 	 * mmap ioctl is disallowed for all discrete platforms,
68 	 * and for all platforms with GRAPHICS_VER > 12.
69 	 */
70 	if (IS_DGFX(i915) || GRAPHICS_VER(i915) > 12)
71 		return -EOPNOTSUPP;
72 
73 	if (args->flags & ~(I915_MMAP_WC))
74 		return -EINVAL;
75 
76 	if (args->flags & I915_MMAP_WC && !boot_cpu_has(X86_FEATURE_PAT))
77 		return -ENODEV;
78 
79 	obj = i915_gem_object_lookup(file, args->handle);
80 	if (!obj)
81 		return -ENOENT;
82 
83 	/* prime objects have no backing filp to GEM mmap
84 	 * pages from.
85 	 */
86 	if (!obj->base.filp) {
87 		addr = -ENXIO;
88 		goto err;
89 	}
90 
91 	if (range_overflows(args->offset, args->size, (u64)obj->base.size)) {
92 		addr = -EINVAL;
93 		goto err;
94 	}
95 
96 	addr = vm_mmap(obj->base.filp, 0, args->size,
97 		       PROT_READ | PROT_WRITE, MAP_SHARED,
98 		       args->offset);
99 	if (IS_ERR_VALUE(addr))
100 		goto err;
101 
102 	if (args->flags & I915_MMAP_WC) {
103 		struct mm_struct *mm = current->mm;
104 		struct vm_area_struct *vma;
105 
106 		if (mmap_write_lock_killable(mm)) {
107 			addr = -EINTR;
108 			goto err;
109 		}
110 		vma = find_vma(mm, addr);
111 		if (vma && __vma_matches(vma, obj->base.filp, addr, args->size))
112 			vma->vm_page_prot =
113 				pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
114 		else
115 			addr = -ENOMEM;
116 		mmap_write_unlock(mm);
117 		if (IS_ERR_VALUE(addr))
118 			goto err;
119 	}
120 	i915_gem_object_put(obj);
121 
122 	args->addr_ptr = (u64)addr;
123 	return 0;
124 
125 err:
126 	i915_gem_object_put(obj);
127 	return addr;
128 }
129 
130 static unsigned int tile_row_pages(const struct drm_i915_gem_object *obj)
131 {
132 	return i915_gem_object_get_tile_row_size(obj) >> PAGE_SHIFT;
133 }
134 
135 /**
136  * i915_gem_mmap_gtt_version - report the current feature set for GTT mmaps
137  *
138  * A history of the GTT mmap interface:
139  *
140  * 0 - Everything had to fit into the GTT. Both parties of a memcpy had to
141  *     aligned and suitable for fencing, and still fit into the available
142  *     mappable space left by the pinned display objects. A classic problem
143  *     we called the page-fault-of-doom where we would ping-pong between
144  *     two objects that could not fit inside the GTT and so the memcpy
145  *     would page one object in at the expense of the other between every
146  *     single byte.
147  *
148  * 1 - Objects can be any size, and have any compatible fencing (X Y, or none
149  *     as set via i915_gem_set_tiling() [DRM_I915_GEM_SET_TILING]). If the
150  *     object is too large for the available space (or simply too large
151  *     for the mappable aperture!), a view is created instead and faulted
152  *     into userspace. (This view is aligned and sized appropriately for
153  *     fenced access.)
154  *
155  * 2 - Recognise WC as a separate cache domain so that we can flush the
156  *     delayed writes via GTT before performing direct access via WC.
157  *
158  * 3 - Remove implicit set-domain(GTT) and synchronisation on initial
159  *     pagefault; swapin remains transparent.
160  *
161  * 4 - Support multiple fault handlers per object depending on object's
162  *     backing storage (a.k.a. MMAP_OFFSET).
163  *
164  * Restrictions:
165  *
166  *  * snoopable objects cannot be accessed via the GTT. It can cause machine
167  *    hangs on some architectures, corruption on others. An attempt to service
168  *    a GTT page fault from a snoopable object will generate a SIGBUS.
169  *
170  *  * the object must be able to fit into RAM (physical memory, though no
171  *    limited to the mappable aperture).
172  *
173  *
174  * Caveats:
175  *
176  *  * a new GTT page fault will synchronize rendering from the GPU and flush
177  *    all data to system memory. Subsequent access will not be synchronized.
178  *
179  *  * all mappings are revoked on runtime device suspend.
180  *
181  *  * there are only 8, 16 or 32 fence registers to share between all users
182  *    (older machines require fence register for display and blitter access
183  *    as well). Contention of the fence registers will cause the previous users
184  *    to be unmapped and any new access will generate new page faults.
185  *
186  *  * running out of memory while servicing a fault may generate a SIGBUS,
187  *    rather than the expected SIGSEGV.
188  */
189 int i915_gem_mmap_gtt_version(void)
190 {
191 	return 4;
192 }
193 
194 static inline struct i915_ggtt_view
195 compute_partial_view(const struct drm_i915_gem_object *obj,
196 		     pgoff_t page_offset,
197 		     unsigned int chunk)
198 {
199 	struct i915_ggtt_view view;
200 
201 	if (i915_gem_object_is_tiled(obj))
202 		chunk = roundup(chunk, tile_row_pages(obj) ?: 1);
203 
204 	view.type = I915_GGTT_VIEW_PARTIAL;
205 	view.partial.offset = rounddown(page_offset, chunk);
206 	view.partial.size =
207 		min_t(unsigned int, chunk,
208 		      (obj->base.size >> PAGE_SHIFT) - view.partial.offset);
209 
210 	/* If the partial covers the entire object, just create a normal VMA. */
211 	if (chunk >= obj->base.size >> PAGE_SHIFT)
212 		view.type = I915_GGTT_VIEW_NORMAL;
213 
214 	return view;
215 }
216 
217 static vm_fault_t i915_error_to_vmf_fault(int err)
218 {
219 	switch (err) {
220 	default:
221 		WARN_ONCE(err, "unhandled error in %s: %i\n", __func__, err);
222 		fallthrough;
223 	case -EIO: /* shmemfs failure from swap device */
224 	case -EFAULT: /* purged object */
225 	case -ENODEV: /* bad object, how did you get here! */
226 	case -ENXIO: /* unable to access backing store (on device) */
227 		return VM_FAULT_SIGBUS;
228 
229 	case -ENOMEM: /* our allocation failure */
230 		return VM_FAULT_OOM;
231 
232 	case 0:
233 	case -EAGAIN:
234 	case -ENOSPC: /* transient failure to evict? */
235 	case -ERESTARTSYS:
236 	case -EINTR:
237 	case -EBUSY:
238 		/*
239 		 * EBUSY is ok: this just means that another thread
240 		 * already did the job.
241 		 */
242 		return VM_FAULT_NOPAGE;
243 	}
244 }
245 
246 static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
247 {
248 	struct vm_area_struct *area = vmf->vma;
249 	struct i915_mmap_offset *mmo = area->vm_private_data;
250 	struct drm_i915_gem_object *obj = mmo->obj;
251 	resource_size_t iomap;
252 	int err;
253 
254 	/* Sanity check that we allow writing into this object */
255 	if (unlikely(i915_gem_object_is_readonly(obj) &&
256 		     area->vm_flags & VM_WRITE))
257 		return VM_FAULT_SIGBUS;
258 
259 	if (i915_gem_object_lock_interruptible(obj, NULL))
260 		return VM_FAULT_NOPAGE;
261 
262 	err = i915_gem_object_pin_pages(obj);
263 	if (err)
264 		goto out;
265 
266 	iomap = -1;
267 	if (!i915_gem_object_has_struct_page(obj)) {
268 		iomap = obj->mm.region->iomap.base;
269 		iomap -= obj->mm.region->region.start;
270 	}
271 
272 	/* PTEs are revoked in obj->ops->put_pages() */
273 	err = remap_io_sg(area,
274 			  area->vm_start, area->vm_end - area->vm_start,
275 			  obj->mm.pages->sgl, iomap);
276 
277 	if (area->vm_flags & VM_WRITE) {
278 		GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
279 		obj->mm.dirty = true;
280 	}
281 
282 	i915_gem_object_unpin_pages(obj);
283 
284 out:
285 	i915_gem_object_unlock(obj);
286 	return i915_error_to_vmf_fault(err);
287 }
288 
289 static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
290 {
291 #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT)
292 	struct vm_area_struct *area = vmf->vma;
293 	struct i915_mmap_offset *mmo = area->vm_private_data;
294 	struct drm_i915_gem_object *obj = mmo->obj;
295 	struct drm_device *dev = obj->base.dev;
296 	struct drm_i915_private *i915 = to_i915(dev);
297 	struct intel_runtime_pm *rpm = &i915->runtime_pm;
298 	struct i915_ggtt *ggtt = &i915->ggtt;
299 	bool write = area->vm_flags & VM_WRITE;
300 	struct i915_gem_ww_ctx ww;
301 	intel_wakeref_t wakeref;
302 	struct i915_vma *vma;
303 	pgoff_t page_offset;
304 	int srcu;
305 	int ret;
306 
307 	/* We don't use vmf->pgoff since that has the fake offset */
308 	page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT;
309 
310 	trace_i915_gem_object_fault(obj, page_offset, true, write);
311 
312 	wakeref = intel_runtime_pm_get(rpm);
313 
314 	i915_gem_ww_ctx_init(&ww, true);
315 retry:
316 	ret = i915_gem_object_lock(obj, &ww);
317 	if (ret)
318 		goto err_rpm;
319 
320 	/* Sanity check that we allow writing into this object */
321 	if (i915_gem_object_is_readonly(obj) && write) {
322 		ret = -EFAULT;
323 		goto err_rpm;
324 	}
325 
326 	ret = i915_gem_object_pin_pages(obj);
327 	if (ret)
328 		goto err_rpm;
329 
330 	ret = intel_gt_reset_trylock(ggtt->vm.gt, &srcu);
331 	if (ret)
332 		goto err_pages;
333 
334 	/* Now pin it into the GTT as needed */
335 	vma = i915_gem_object_ggtt_pin_ww(obj, &ww, NULL, 0, 0,
336 					  PIN_MAPPABLE |
337 					  PIN_NONBLOCK /* NOWARN */ |
338 					  PIN_NOEVICT);
339 	if (IS_ERR(vma) && vma != ERR_PTR(-EDEADLK)) {
340 		/* Use a partial view if it is bigger than available space */
341 		struct i915_ggtt_view view =
342 			compute_partial_view(obj, page_offset, MIN_CHUNK_PAGES);
343 		unsigned int flags;
344 
345 		flags = PIN_MAPPABLE | PIN_NOSEARCH;
346 		if (view.type == I915_GGTT_VIEW_NORMAL)
347 			flags |= PIN_NONBLOCK; /* avoid warnings for pinned */
348 
349 		/*
350 		 * Userspace is now writing through an untracked VMA, abandon
351 		 * all hope that the hardware is able to track future writes.
352 		 */
353 
354 		vma = i915_gem_object_ggtt_pin_ww(obj, &ww, &view, 0, 0, flags);
355 		if (IS_ERR(vma) && vma != ERR_PTR(-EDEADLK)) {
356 			flags = PIN_MAPPABLE;
357 			view.type = I915_GGTT_VIEW_PARTIAL;
358 			vma = i915_gem_object_ggtt_pin_ww(obj, &ww, &view, 0, 0, flags);
359 		}
360 
361 		/* The entire mappable GGTT is pinned? Unexpected! */
362 		GEM_BUG_ON(vma == ERR_PTR(-ENOSPC));
363 	}
364 	if (IS_ERR(vma)) {
365 		ret = PTR_ERR(vma);
366 		goto err_reset;
367 	}
368 
369 	/* Access to snoopable pages through the GTT is incoherent. */
370 	if (obj->cache_level != I915_CACHE_NONE && !HAS_LLC(i915)) {
371 		ret = -EFAULT;
372 		goto err_unpin;
373 	}
374 
375 	ret = i915_vma_pin_fence(vma);
376 	if (ret)
377 		goto err_unpin;
378 
379 	/* Finally, remap it using the new GTT offset */
380 	ret = remap_io_mapping(area,
381 			       area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT),
382 			       (ggtt->gmadr.start + vma->node.start) >> PAGE_SHIFT,
383 			       min_t(u64, vma->size, area->vm_end - area->vm_start),
384 			       &ggtt->iomap);
385 	if (ret)
386 		goto err_fence;
387 
388 	assert_rpm_wakelock_held(rpm);
389 
390 	/* Mark as being mmapped into userspace for later revocation */
391 	mutex_lock(&i915->ggtt.vm.mutex);
392 	if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
393 		list_add(&obj->userfault_link, &i915->ggtt.userfault_list);
394 	mutex_unlock(&i915->ggtt.vm.mutex);
395 
396 	/* Track the mmo associated with the fenced vma */
397 	vma->mmo = mmo;
398 
399 	if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
400 		intel_wakeref_auto(&i915->ggtt.userfault_wakeref,
401 				   msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
402 
403 	if (write) {
404 		GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
405 		i915_vma_set_ggtt_write(vma);
406 		obj->mm.dirty = true;
407 	}
408 
409 err_fence:
410 	i915_vma_unpin_fence(vma);
411 err_unpin:
412 	__i915_vma_unpin(vma);
413 err_reset:
414 	intel_gt_reset_unlock(ggtt->vm.gt, srcu);
415 err_pages:
416 	i915_gem_object_unpin_pages(obj);
417 err_rpm:
418 	if (ret == -EDEADLK) {
419 		ret = i915_gem_ww_ctx_backoff(&ww);
420 		if (!ret)
421 			goto retry;
422 	}
423 	i915_gem_ww_ctx_fini(&ww);
424 	intel_runtime_pm_put(rpm, wakeref);
425 	return i915_error_to_vmf_fault(ret);
426 }
427 
428 static int
429 vm_access(struct vm_area_struct *area, unsigned long addr,
430 	  void *buf, int len, int write)
431 {
432 	struct i915_mmap_offset *mmo = area->vm_private_data;
433 	struct drm_i915_gem_object *obj = mmo->obj;
434 	struct i915_gem_ww_ctx ww;
435 	void *vaddr;
436 	int err = 0;
437 
438 	if (i915_gem_object_is_readonly(obj) && write)
439 		return -EACCES;
440 
441 	addr -= area->vm_start;
442 	if (addr >= obj->base.size)
443 		return -EINVAL;
444 
445 	i915_gem_ww_ctx_init(&ww, true);
446 retry:
447 	err = i915_gem_object_lock(obj, &ww);
448 	if (err)
449 		goto out;
450 
451 	/* As this is primarily for debugging, let's focus on simplicity */
452 	vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC);
453 	if (IS_ERR(vaddr)) {
454 		err = PTR_ERR(vaddr);
455 		goto out;
456 	}
457 
458 	if (write) {
459 		memcpy(vaddr + addr, buf, len);
460 		__i915_gem_object_flush_map(obj, addr, len);
461 	} else {
462 		memcpy(buf, vaddr + addr, len);
463 	}
464 
465 	i915_gem_object_unpin_map(obj);
466 out:
467 	if (err == -EDEADLK) {
468 		err = i915_gem_ww_ctx_backoff(&ww);
469 		if (!err)
470 			goto retry;
471 	}
472 	i915_gem_ww_ctx_fini(&ww);
473 
474 	if (err)
475 		return err;
476 
477 	return len;
478 }
479 
480 void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
481 {
482 	struct i915_vma *vma;
483 
484 	GEM_BUG_ON(!obj->userfault_count);
485 
486 	for_each_ggtt_vma(vma, obj)
487 		i915_vma_revoke_mmap(vma);
488 
489 	GEM_BUG_ON(obj->userfault_count);
490 }
491 
492 /*
493  * It is vital that we remove the page mapping if we have mapped a tiled
494  * object through the GTT and then lose the fence register due to
495  * resource pressure. Similarly if the object has been moved out of the
496  * aperture, than pages mapped into userspace must be revoked. Removing the
497  * mapping will then trigger a page fault on the next user access, allowing
498  * fixup by vm_fault_gtt().
499  */
500 void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
501 {
502 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
503 	intel_wakeref_t wakeref;
504 
505 	/*
506 	 * Serialisation between user GTT access and our code depends upon
507 	 * revoking the CPU's PTE whilst the mutex is held. The next user
508 	 * pagefault then has to wait until we release the mutex.
509 	 *
510 	 * Note that RPM complicates somewhat by adding an additional
511 	 * requirement that operations to the GGTT be made holding the RPM
512 	 * wakeref.
513 	 */
514 	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
515 	mutex_lock(&i915->ggtt.vm.mutex);
516 
517 	if (!obj->userfault_count)
518 		goto out;
519 
520 	__i915_gem_object_release_mmap_gtt(obj);
521 
522 	/*
523 	 * Ensure that the CPU's PTE are revoked and there are not outstanding
524 	 * memory transactions from userspace before we return. The TLB
525 	 * flushing implied above by changing the PTE above *should* be
526 	 * sufficient, an extra barrier here just provides us with a bit
527 	 * of paranoid documentation about our requirement to serialise
528 	 * memory writes before touching registers / GSM.
529 	 */
530 	wmb();
531 
532 out:
533 	mutex_unlock(&i915->ggtt.vm.mutex);
534 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
535 }
536 
537 void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
538 {
539 	struct i915_mmap_offset *mmo, *mn;
540 
541 	spin_lock(&obj->mmo.lock);
542 	rbtree_postorder_for_each_entry_safe(mmo, mn,
543 					     &obj->mmo.offsets, offset) {
544 		/*
545 		 * vma_node_unmap for GTT mmaps handled already in
546 		 * __i915_gem_object_release_mmap_gtt
547 		 */
548 		if (mmo->mmap_type == I915_MMAP_TYPE_GTT)
549 			continue;
550 
551 		spin_unlock(&obj->mmo.lock);
552 		drm_vma_node_unmap(&mmo->vma_node,
553 				   obj->base.dev->anon_inode->i_mapping);
554 		spin_lock(&obj->mmo.lock);
555 	}
556 	spin_unlock(&obj->mmo.lock);
557 }
558 
559 static struct i915_mmap_offset *
560 lookup_mmo(struct drm_i915_gem_object *obj,
561 	   enum i915_mmap_type mmap_type)
562 {
563 	struct rb_node *rb;
564 
565 	spin_lock(&obj->mmo.lock);
566 	rb = obj->mmo.offsets.rb_node;
567 	while (rb) {
568 		struct i915_mmap_offset *mmo =
569 			rb_entry(rb, typeof(*mmo), offset);
570 
571 		if (mmo->mmap_type == mmap_type) {
572 			spin_unlock(&obj->mmo.lock);
573 			return mmo;
574 		}
575 
576 		if (mmo->mmap_type < mmap_type)
577 			rb = rb->rb_right;
578 		else
579 			rb = rb->rb_left;
580 	}
581 	spin_unlock(&obj->mmo.lock);
582 
583 	return NULL;
584 }
585 
586 static struct i915_mmap_offset *
587 insert_mmo(struct drm_i915_gem_object *obj, struct i915_mmap_offset *mmo)
588 {
589 	struct rb_node *rb, **p;
590 
591 	spin_lock(&obj->mmo.lock);
592 	rb = NULL;
593 	p = &obj->mmo.offsets.rb_node;
594 	while (*p) {
595 		struct i915_mmap_offset *pos;
596 
597 		rb = *p;
598 		pos = rb_entry(rb, typeof(*pos), offset);
599 
600 		if (pos->mmap_type == mmo->mmap_type) {
601 			spin_unlock(&obj->mmo.lock);
602 			drm_vma_offset_remove(obj->base.dev->vma_offset_manager,
603 					      &mmo->vma_node);
604 			kfree(mmo);
605 			return pos;
606 		}
607 
608 		if (pos->mmap_type < mmo->mmap_type)
609 			p = &rb->rb_right;
610 		else
611 			p = &rb->rb_left;
612 	}
613 	rb_link_node(&mmo->offset, rb, p);
614 	rb_insert_color(&mmo->offset, &obj->mmo.offsets);
615 	spin_unlock(&obj->mmo.lock);
616 
617 	return mmo;
618 }
619 
620 static struct i915_mmap_offset *
621 mmap_offset_attach(struct drm_i915_gem_object *obj,
622 		   enum i915_mmap_type mmap_type,
623 		   struct drm_file *file)
624 {
625 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
626 	struct i915_mmap_offset *mmo;
627 	int err;
628 
629 	GEM_BUG_ON(obj->ops->mmap_offset || obj->ops->mmap_ops);
630 
631 	mmo = lookup_mmo(obj, mmap_type);
632 	if (mmo)
633 		goto out;
634 
635 	mmo = kmalloc(sizeof(*mmo), GFP_KERNEL);
636 	if (!mmo)
637 		return ERR_PTR(-ENOMEM);
638 
639 	mmo->obj = obj;
640 	mmo->mmap_type = mmap_type;
641 	drm_vma_node_reset(&mmo->vma_node);
642 
643 	err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
644 				 &mmo->vma_node, obj->base.size / PAGE_SIZE);
645 	if (likely(!err))
646 		goto insert;
647 
648 	/* Attempt to reap some mmap space from dead objects */
649 	err = intel_gt_retire_requests_timeout(&i915->gt, MAX_SCHEDULE_TIMEOUT,
650 					       NULL);
651 	if (err)
652 		goto err;
653 
654 	i915_gem_drain_freed_objects(i915);
655 	err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
656 				 &mmo->vma_node, obj->base.size / PAGE_SIZE);
657 	if (err)
658 		goto err;
659 
660 insert:
661 	mmo = insert_mmo(obj, mmo);
662 	GEM_BUG_ON(lookup_mmo(obj, mmap_type) != mmo);
663 out:
664 	if (file)
665 		drm_vma_node_allow(&mmo->vma_node, file);
666 	return mmo;
667 
668 err:
669 	kfree(mmo);
670 	return ERR_PTR(err);
671 }
672 
673 static int
674 __assign_mmap_offset(struct drm_i915_gem_object *obj,
675 		     enum i915_mmap_type mmap_type,
676 		     u64 *offset, struct drm_file *file)
677 {
678 	struct i915_mmap_offset *mmo;
679 
680 	if (i915_gem_object_never_mmap(obj))
681 		return -ENODEV;
682 
683 	if (obj->ops->mmap_offset)  {
684 		if (mmap_type != I915_MMAP_TYPE_FIXED)
685 			return -ENODEV;
686 
687 		*offset = obj->ops->mmap_offset(obj);
688 		return 0;
689 	}
690 
691 	if (mmap_type == I915_MMAP_TYPE_FIXED)
692 		return -ENODEV;
693 
694 	if (mmap_type != I915_MMAP_TYPE_GTT &&
695 	    !i915_gem_object_has_struct_page(obj) &&
696 	    !i915_gem_object_has_iomem(obj))
697 		return -ENODEV;
698 
699 	mmo = mmap_offset_attach(obj, mmap_type, file);
700 	if (IS_ERR(mmo))
701 		return PTR_ERR(mmo);
702 
703 	*offset = drm_vma_node_offset_addr(&mmo->vma_node);
704 	return 0;
705 }
706 
707 static int
708 __assign_mmap_offset_handle(struct drm_file *file,
709 			    u32 handle,
710 			    enum i915_mmap_type mmap_type,
711 			    u64 *offset)
712 {
713 	struct drm_i915_gem_object *obj;
714 	int err;
715 
716 	obj = i915_gem_object_lookup(file, handle);
717 	if (!obj)
718 		return -ENOENT;
719 
720 	err = i915_gem_object_lock_interruptible(obj, NULL);
721 	if (err)
722 		goto out_put;
723 	err = __assign_mmap_offset(obj, mmap_type, offset, file);
724 	i915_gem_object_unlock(obj);
725 out_put:
726 	i915_gem_object_put(obj);
727 	return err;
728 }
729 
730 int
731 i915_gem_dumb_mmap_offset(struct drm_file *file,
732 			  struct drm_device *dev,
733 			  u32 handle,
734 			  u64 *offset)
735 {
736 	enum i915_mmap_type mmap_type;
737 
738 	if (HAS_LMEM(to_i915(dev)))
739 		mmap_type = I915_MMAP_TYPE_FIXED;
740 	else if (boot_cpu_has(X86_FEATURE_PAT))
741 		mmap_type = I915_MMAP_TYPE_WC;
742 	else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
743 		return -ENODEV;
744 	else
745 		mmap_type = I915_MMAP_TYPE_GTT;
746 
747 	return __assign_mmap_offset_handle(file, handle, mmap_type, offset);
748 }
749 
750 /**
751  * i915_gem_mmap_offset_ioctl - prepare an object for GTT mmap'ing
752  * @dev: DRM device
753  * @data: GTT mapping ioctl data
754  * @file: GEM object info
755  *
756  * Simply returns the fake offset to userspace so it can mmap it.
757  * The mmap call will end up in drm_gem_mmap(), which will set things
758  * up so we can get faults in the handler above.
759  *
760  * The fault handler will take care of binding the object into the GTT
761  * (since it may have been evicted to make room for something), allocating
762  * a fence register, and mapping the appropriate aperture address into
763  * userspace.
764  */
765 int
766 i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
767 			   struct drm_file *file)
768 {
769 	struct drm_i915_private *i915 = to_i915(dev);
770 	struct drm_i915_gem_mmap_offset *args = data;
771 	enum i915_mmap_type type;
772 	int err;
773 
774 	/*
775 	 * Historically we failed to check args.pad and args.offset
776 	 * and so we cannot use those fields for user input and we cannot
777 	 * add -EINVAL for them as the ABI is fixed, i.e. old userspace
778 	 * may be feeding in garbage in those fields.
779 	 *
780 	 * if (args->pad) return -EINVAL; is verbotten!
781 	 */
782 
783 	err = i915_user_extensions(u64_to_user_ptr(args->extensions),
784 				   NULL, 0, NULL);
785 	if (err)
786 		return err;
787 
788 	switch (args->flags) {
789 	case I915_MMAP_OFFSET_GTT:
790 		if (!i915_ggtt_has_aperture(&i915->ggtt))
791 			return -ENODEV;
792 		type = I915_MMAP_TYPE_GTT;
793 		break;
794 
795 	case I915_MMAP_OFFSET_WC:
796 		if (!boot_cpu_has(X86_FEATURE_PAT))
797 			return -ENODEV;
798 		type = I915_MMAP_TYPE_WC;
799 		break;
800 
801 	case I915_MMAP_OFFSET_WB:
802 		type = I915_MMAP_TYPE_WB;
803 		break;
804 
805 	case I915_MMAP_OFFSET_UC:
806 		if (!boot_cpu_has(X86_FEATURE_PAT))
807 			return -ENODEV;
808 		type = I915_MMAP_TYPE_UC;
809 		break;
810 
811 	case I915_MMAP_OFFSET_FIXED:
812 		type = I915_MMAP_TYPE_FIXED;
813 		break;
814 
815 	default:
816 		return -EINVAL;
817 	}
818 
819 	return __assign_mmap_offset_handle(file, args->handle, type, &args->offset);
820 }
821 
822 static void vm_open(struct vm_area_struct *vma)
823 {
824 	struct i915_mmap_offset *mmo = vma->vm_private_data;
825 	struct drm_i915_gem_object *obj = mmo->obj;
826 
827 	GEM_BUG_ON(!obj);
828 	i915_gem_object_get(obj);
829 }
830 
831 static void vm_close(struct vm_area_struct *vma)
832 {
833 	struct i915_mmap_offset *mmo = vma->vm_private_data;
834 	struct drm_i915_gem_object *obj = mmo->obj;
835 
836 	GEM_BUG_ON(!obj);
837 	i915_gem_object_put(obj);
838 }
839 
840 static const struct vm_operations_struct vm_ops_gtt = {
841 	.fault = vm_fault_gtt,
842 	.access = vm_access,
843 	.open = vm_open,
844 	.close = vm_close,
845 };
846 
847 static const struct vm_operations_struct vm_ops_cpu = {
848 	.fault = vm_fault_cpu,
849 	.access = vm_access,
850 	.open = vm_open,
851 	.close = vm_close,
852 };
853 
854 static int singleton_release(struct inode *inode, struct file *file)
855 {
856 	struct drm_i915_private *i915 = file->private_data;
857 
858 	cmpxchg(&i915->gem.mmap_singleton, file, NULL);
859 	drm_dev_put(&i915->drm);
860 
861 	return 0;
862 }
863 
864 static const struct file_operations singleton_fops = {
865 	.owner = THIS_MODULE,
866 	.release = singleton_release,
867 };
868 
869 static struct file *mmap_singleton(struct drm_i915_private *i915)
870 {
871 	struct file *file;
872 
873 	rcu_read_lock();
874 	file = READ_ONCE(i915->gem.mmap_singleton);
875 	if (file && !get_file_rcu(file))
876 		file = NULL;
877 	rcu_read_unlock();
878 	if (file)
879 		return file;
880 
881 	file = anon_inode_getfile("i915.gem", &singleton_fops, i915, O_RDWR);
882 	if (IS_ERR(file))
883 		return file;
884 
885 	/* Everyone shares a single global address space */
886 	file->f_mapping = i915->drm.anon_inode->i_mapping;
887 
888 	smp_store_mb(i915->gem.mmap_singleton, file);
889 	drm_dev_get(&i915->drm);
890 
891 	return file;
892 }
893 
894 /*
895  * This overcomes the limitation in drm_gem_mmap's assignment of a
896  * drm_gem_object as the vma->vm_private_data. Since we need to
897  * be able to resolve multiple mmap offsets which could be tied
898  * to a single gem object.
899  */
900 int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
901 {
902 	struct drm_vma_offset_node *node;
903 	struct drm_file *priv = filp->private_data;
904 	struct drm_device *dev = priv->minor->dev;
905 	struct drm_i915_gem_object *obj = NULL;
906 	struct i915_mmap_offset *mmo = NULL;
907 	struct file *anon;
908 
909 	if (drm_dev_is_unplugged(dev))
910 		return -ENODEV;
911 
912 	rcu_read_lock();
913 	drm_vma_offset_lock_lookup(dev->vma_offset_manager);
914 	node = drm_vma_offset_exact_lookup_locked(dev->vma_offset_manager,
915 						  vma->vm_pgoff,
916 						  vma_pages(vma));
917 	if (node && drm_vma_node_is_allowed(node, priv)) {
918 		/*
919 		 * Skip 0-refcnted objects as it is in the process of being
920 		 * destroyed and will be invalid when the vma manager lock
921 		 * is released.
922 		 */
923 		if (!node->driver_private) {
924 			mmo = container_of(node, struct i915_mmap_offset, vma_node);
925 			obj = i915_gem_object_get_rcu(mmo->obj);
926 
927 			GEM_BUG_ON(obj && obj->ops->mmap_ops);
928 		} else {
929 			obj = i915_gem_object_get_rcu
930 				(container_of(node, struct drm_i915_gem_object,
931 					      base.vma_node));
932 
933 			GEM_BUG_ON(obj && !obj->ops->mmap_ops);
934 		}
935 	}
936 	drm_vma_offset_unlock_lookup(dev->vma_offset_manager);
937 	rcu_read_unlock();
938 	if (!obj)
939 		return node ? -EACCES : -EINVAL;
940 
941 	if (i915_gem_object_is_readonly(obj)) {
942 		if (vma->vm_flags & VM_WRITE) {
943 			i915_gem_object_put(obj);
944 			return -EINVAL;
945 		}
946 		vma->vm_flags &= ~VM_MAYWRITE;
947 	}
948 
949 	anon = mmap_singleton(to_i915(dev));
950 	if (IS_ERR(anon)) {
951 		i915_gem_object_put(obj);
952 		return PTR_ERR(anon);
953 	}
954 
955 	vma->vm_flags |= VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP | VM_IO;
956 
957 	/*
958 	 * We keep the ref on mmo->obj, not vm_file, but we require
959 	 * vma->vm_file->f_mapping, see vma_link(), for later revocation.
960 	 * Our userspace is accustomed to having per-file resource cleanup
961 	 * (i.e. contexts, objects and requests) on their close(fd), which
962 	 * requires avoiding extraneous references to their filp, hence why
963 	 * we prefer to use an anonymous file for their mmaps.
964 	 */
965 	vma_set_file(vma, anon);
966 	/* Drop the initial creation reference, the vma is now holding one. */
967 	fput(anon);
968 
969 	if (obj->ops->mmap_ops) {
970 		vma->vm_page_prot = pgprot_decrypted(vm_get_page_prot(vma->vm_flags));
971 		vma->vm_ops = obj->ops->mmap_ops;
972 		vma->vm_private_data = node->driver_private;
973 		return 0;
974 	}
975 
976 	vma->vm_private_data = mmo;
977 
978 	switch (mmo->mmap_type) {
979 	case I915_MMAP_TYPE_WC:
980 		vma->vm_page_prot =
981 			pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
982 		vma->vm_ops = &vm_ops_cpu;
983 		break;
984 
985 	case I915_MMAP_TYPE_FIXED:
986 		GEM_WARN_ON(1);
987 		fallthrough;
988 	case I915_MMAP_TYPE_WB:
989 		vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
990 		vma->vm_ops = &vm_ops_cpu;
991 		break;
992 
993 	case I915_MMAP_TYPE_UC:
994 		vma->vm_page_prot =
995 			pgprot_noncached(vm_get_page_prot(vma->vm_flags));
996 		vma->vm_ops = &vm_ops_cpu;
997 		break;
998 
999 	case I915_MMAP_TYPE_GTT:
1000 		vma->vm_page_prot =
1001 			pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
1002 		vma->vm_ops = &vm_ops_gtt;
1003 		break;
1004 	}
1005 	vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
1006 
1007 	return 0;
1008 }
1009 
1010 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
1011 #include "selftests/i915_gem_mman.c"
1012 #endif
1013