1*9a8e720fSJani Nikula /* SPDX-License-Identifier: MIT */ 2*9a8e720fSJani Nikula /* 3*9a8e720fSJani Nikula * Copyright © 2022 Intel Corporation 4*9a8e720fSJani Nikula */ 5*9a8e720fSJani Nikula 6*9a8e720fSJani Nikula #ifndef __I915_GEM_DOMAIN_H__ 7*9a8e720fSJani Nikula #define __I915_GEM_DOMAIN_H__ 8*9a8e720fSJani Nikula 9*9a8e720fSJani Nikula struct drm_i915_gem_object; 10*9a8e720fSJani Nikula enum i915_cache_level; 11*9a8e720fSJani Nikula 12*9a8e720fSJani Nikula int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj, 13*9a8e720fSJani Nikula enum i915_cache_level cache_level); 14*9a8e720fSJani Nikula 15*9a8e720fSJani Nikula #endif /* __I915_GEM_DOMAIN_H__ */ 16