1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #include <linux/pci.h>
7 #include <linux/vgaarb.h>
8 
9 #include <drm/i915_drm.h>
10 #include <video/vga.h>
11 
12 #include "i915_drv.h"
13 #include "i915_reg.h"
14 #include "intel_de.h"
15 #include "intel_vga.h"
16 
17 static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
18 {
19 	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
20 		return VLV_VGACNTRL;
21 	else if (DISPLAY_VER(i915) >= 5)
22 		return CPU_VGACNTRL;
23 	else
24 		return VGACNTRL;
25 }
26 
27 /* Disable the VGA plane that we never use */
28 void intel_vga_disable(struct drm_i915_private *dev_priv)
29 {
30 	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
31 	i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
32 	u8 sr1;
33 
34 	if (intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)
35 		return;
36 
37 	/* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
38 	vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
39 	outb(0x01, VGA_SEQ_I);
40 	sr1 = inb(VGA_SEQ_D);
41 	outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D);
42 	vga_put(pdev, VGA_RSRC_LEGACY_IO);
43 	udelay(300);
44 
45 	intel_de_write(dev_priv, vga_reg, VGA_DISP_DISABLE);
46 	intel_de_posting_read(dev_priv, vga_reg);
47 }
48 
49 void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
50 {
51 	i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
52 
53 	if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) {
54 		drm_dbg_kms(&dev_priv->drm,
55 			    "Something enabled VGA plane, disabling it\n");
56 		intel_vga_disable(dev_priv);
57 	}
58 }
59 
60 void intel_vga_redisable(struct drm_i915_private *i915)
61 {
62 	intel_wakeref_t wakeref;
63 
64 	/*
65 	 * This function can be called both from intel_modeset_setup_hw_state or
66 	 * at a very early point in our resume sequence, where the power well
67 	 * structures are not yet restored. Since this function is at a very
68 	 * paranoid "someone might have enabled VGA while we were not looking"
69 	 * level, just check if the power well is enabled instead of trying to
70 	 * follow the "don't touch the power well if we don't need it" policy
71 	 * the rest of the driver uses.
72 	 */
73 	wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
74 	if (!wakeref)
75 		return;
76 
77 	intel_vga_redisable_power_on(i915);
78 
79 	intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
80 }
81 
82 void intel_vga_reset_io_mem(struct drm_i915_private *i915)
83 {
84 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
85 
86 	/*
87 	 * After we re-enable the power well, if we touch VGA register 0x3d5
88 	 * we'll get unclaimed register interrupts. This stops after we write
89 	 * anything to the VGA MSR register. The vgacon module uses this
90 	 * register all the time, so if we unbind our driver and, as a
91 	 * consequence, bind vgacon, we'll get stuck in an infinite loop at
92 	 * console_unlock(). So make here we touch the VGA MSR register, making
93 	 * sure vgacon can keep working normally without triggering interrupts
94 	 * and error messages.
95 	 */
96 	vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
97 	outb(inb(VGA_MIS_R), VGA_MIS_W);
98 	vga_put(pdev, VGA_RSRC_LEGACY_IO);
99 }
100 
101 static int
102 intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
103 {
104 	unsigned int reg = DISPLAY_VER(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
105 	u16 gmch_ctrl;
106 
107 	if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
108 		drm_err(&i915->drm, "failed to read control word\n");
109 		return -EIO;
110 	}
111 
112 	if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
113 		return 0;
114 
115 	if (enable_decode)
116 		gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
117 	else
118 		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
119 
120 	if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
121 		drm_err(&i915->drm, "failed to write control word\n");
122 		return -EIO;
123 	}
124 
125 	return 0;
126 }
127 
128 static unsigned int
129 intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
130 {
131 	struct drm_i915_private *i915 = pdev_to_i915(pdev);
132 
133 	intel_vga_set_state(i915, enable_decode);
134 
135 	if (enable_decode)
136 		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
137 		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
138 	else
139 		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
140 }
141 
142 int intel_vga_register(struct drm_i915_private *i915)
143 {
144 
145 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
146 	int ret;
147 
148 	/*
149 	 * If we have > 1 VGA cards, then we need to arbitrate access to the
150 	 * common VGA resources.
151 	 *
152 	 * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
153 	 * then we do not take part in VGA arbitration and the
154 	 * vga_client_register() fails with -ENODEV.
155 	 */
156 	ret = vga_client_register(pdev, intel_vga_set_decode);
157 	if (ret && ret != -ENODEV)
158 		return ret;
159 
160 	return 0;
161 }
162 
163 void intel_vga_unregister(struct drm_i915_private *i915)
164 {
165 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
166 
167 	vga_client_unregister(pdev);
168 }
169