1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 29 #include <linux/delay.h> 30 #include <linux/export.h> 31 #include <linux/i2c.h> 32 #include <linux/slab.h> 33 34 #include <drm/drm_atomic_helper.h> 35 #include <drm/drm_crtc.h> 36 #include <drm/drm_edid.h> 37 38 #include "i915_drv.h" 39 #include "intel_atomic.h" 40 #include "intel_connector.h" 41 #include "intel_display_types.h" 42 #include "intel_fifo_underrun.h" 43 #include "intel_gmbus.h" 44 #include "intel_hdmi.h" 45 #include "intel_hotplug.h" 46 #include "intel_panel.h" 47 #include "intel_sdvo.h" 48 #include "intel_sdvo_regs.h" 49 50 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 51 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 52 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 53 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 54 55 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 56 SDVO_TV_MASK) 57 58 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 59 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 60 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 61 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 62 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 63 64 65 static const char * const tv_format_names[] = { 66 "NTSC_M" , "NTSC_J" , "NTSC_443", 67 "PAL_B" , "PAL_D" , "PAL_G" , 68 "PAL_H" , "PAL_I" , "PAL_M" , 69 "PAL_N" , "PAL_NC" , "PAL_60" , 70 "SECAM_B" , "SECAM_D" , "SECAM_G" , 71 "SECAM_K" , "SECAM_K1", "SECAM_L" , 72 "SECAM_60" 73 }; 74 75 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names) 76 77 struct intel_sdvo { 78 struct intel_encoder base; 79 80 struct i2c_adapter *i2c; 81 u8 slave_addr; 82 83 struct i2c_adapter ddc; 84 85 /* Register for the SDVO device: SDVOB or SDVOC */ 86 i915_reg_t sdvo_reg; 87 88 /* Active outputs controlled by this SDVO output */ 89 u16 controlled_output; 90 91 /* 92 * Capabilities of the SDVO device returned by 93 * intel_sdvo_get_capabilities() 94 */ 95 struct intel_sdvo_caps caps; 96 97 /* Pixel clock limitations reported by the SDVO device, in kHz */ 98 int pixel_clock_min, pixel_clock_max; 99 100 /* 101 * For multiple function SDVO device, 102 * this is for current attached outputs. 103 */ 104 u16 attached_output; 105 106 /* 107 * Hotplug activation bits for this device 108 */ 109 u16 hotplug_active; 110 111 enum port port; 112 113 bool has_hdmi_monitor; 114 bool has_hdmi_audio; 115 116 /* DDC bus used by this SDVO encoder */ 117 u8 ddc_bus; 118 119 /* 120 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 121 */ 122 u8 dtd_sdvo_flags; 123 }; 124 125 struct intel_sdvo_connector { 126 struct intel_connector base; 127 128 /* Mark the type of connector */ 129 u16 output_flag; 130 131 /* This contains all current supported TV format */ 132 u8 tv_format_supported[TV_FORMAT_NUM]; 133 int format_supported_num; 134 struct drm_property *tv_format; 135 136 /* add the property for the SDVO-TV */ 137 struct drm_property *left; 138 struct drm_property *right; 139 struct drm_property *top; 140 struct drm_property *bottom; 141 struct drm_property *hpos; 142 struct drm_property *vpos; 143 struct drm_property *contrast; 144 struct drm_property *saturation; 145 struct drm_property *hue; 146 struct drm_property *sharpness; 147 struct drm_property *flicker_filter; 148 struct drm_property *flicker_filter_adaptive; 149 struct drm_property *flicker_filter_2d; 150 struct drm_property *tv_chroma_filter; 151 struct drm_property *tv_luma_filter; 152 struct drm_property *dot_crawl; 153 154 /* add the property for the SDVO-TV/LVDS */ 155 struct drm_property *brightness; 156 157 /* this is to get the range of margin.*/ 158 u32 max_hscan, max_vscan; 159 160 /** 161 * This is set if we treat the device as HDMI, instead of DVI. 162 */ 163 bool is_hdmi; 164 }; 165 166 struct intel_sdvo_connector_state { 167 /* base.base: tv.saturation/contrast/hue/brightness */ 168 struct intel_digital_connector_state base; 169 170 struct { 171 unsigned overscan_h, overscan_v, hpos, vpos, sharpness; 172 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive; 173 unsigned chroma_filter, luma_filter, dot_crawl; 174 } tv; 175 }; 176 177 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder) 178 { 179 return container_of(encoder, struct intel_sdvo, base); 180 } 181 182 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector) 183 { 184 return to_sdvo(intel_attached_encoder(connector)); 185 } 186 187 static struct intel_sdvo_connector * 188 to_intel_sdvo_connector(struct drm_connector *connector) 189 { 190 return container_of(connector, struct intel_sdvo_connector, base.base); 191 } 192 193 #define to_intel_sdvo_connector_state(conn_state) \ 194 container_of((conn_state), struct intel_sdvo_connector_state, base.base) 195 196 static bool 197 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags); 198 static bool 199 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 200 struct intel_sdvo_connector *intel_sdvo_connector, 201 int type); 202 static bool 203 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 204 struct intel_sdvo_connector *intel_sdvo_connector); 205 206 /* 207 * Writes the SDVOB or SDVOC with the given value, but always writes both 208 * SDVOB and SDVOC to work around apparent hardware issues (according to 209 * comments in the BIOS). 210 */ 211 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 212 { 213 struct drm_device *dev = intel_sdvo->base.base.dev; 214 struct drm_i915_private *dev_priv = to_i915(dev); 215 u32 bval = val, cval = val; 216 int i; 217 218 if (HAS_PCH_SPLIT(dev_priv)) { 219 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val); 220 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg); 221 /* 222 * HW workaround, need to write this twice for issue 223 * that may result in first write getting masked. 224 */ 225 if (HAS_PCH_IBX(dev_priv)) { 226 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val); 227 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg); 228 } 229 return; 230 } 231 232 if (intel_sdvo->port == PORT_B) 233 cval = intel_de_read(dev_priv, GEN3_SDVOC); 234 else 235 bval = intel_de_read(dev_priv, GEN3_SDVOB); 236 237 /* 238 * Write the registers twice for luck. Sometimes, 239 * writing them only once doesn't appear to 'stick'. 240 * The BIOS does this too. Yay, magic 241 */ 242 for (i = 0; i < 2; i++) { 243 intel_de_write(dev_priv, GEN3_SDVOB, bval); 244 intel_de_posting_read(dev_priv, GEN3_SDVOB); 245 246 intel_de_write(dev_priv, GEN3_SDVOC, cval); 247 intel_de_posting_read(dev_priv, GEN3_SDVOC); 248 } 249 } 250 251 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 252 { 253 struct i2c_msg msgs[] = { 254 { 255 .addr = intel_sdvo->slave_addr, 256 .flags = 0, 257 .len = 1, 258 .buf = &addr, 259 }, 260 { 261 .addr = intel_sdvo->slave_addr, 262 .flags = I2C_M_RD, 263 .len = 1, 264 .buf = ch, 265 } 266 }; 267 int ret; 268 269 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) 270 return true; 271 272 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 273 return false; 274 } 275 276 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ } 277 278 /** Mapping of command numbers to names, for debug output */ 279 static const struct { 280 u8 cmd; 281 const char *name; 282 } __attribute__ ((packed)) sdvo_cmd_names[] = { 283 SDVO_CMD_NAME_ENTRY(RESET), 284 SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS), 285 SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV), 286 SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS), 287 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS), 288 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS), 289 SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP), 290 SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP), 291 SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS), 292 SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT), 293 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG), 294 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG), 295 SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE), 296 SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT), 297 SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT), 298 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1), 299 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2), 300 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1), 301 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2), 302 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1), 303 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2), 304 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1), 305 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2), 306 SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING), 307 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1), 308 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2), 309 SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE), 310 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE), 311 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS), 312 SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT), 313 SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT), 314 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS), 315 SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT), 316 SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT), 317 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES), 318 SDVO_CMD_NAME_ENTRY(GET_POWER_STATE), 319 SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE), 320 SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE), 321 SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH), 322 SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT), 323 SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT), 324 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS), 325 326 /* Add the op code for SDVO enhancements */ 327 SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS), 328 SDVO_CMD_NAME_ENTRY(GET_HPOS), 329 SDVO_CMD_NAME_ENTRY(SET_HPOS), 330 SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS), 331 SDVO_CMD_NAME_ENTRY(GET_VPOS), 332 SDVO_CMD_NAME_ENTRY(SET_VPOS), 333 SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION), 334 SDVO_CMD_NAME_ENTRY(GET_SATURATION), 335 SDVO_CMD_NAME_ENTRY(SET_SATURATION), 336 SDVO_CMD_NAME_ENTRY(GET_MAX_HUE), 337 SDVO_CMD_NAME_ENTRY(GET_HUE), 338 SDVO_CMD_NAME_ENTRY(SET_HUE), 339 SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST), 340 SDVO_CMD_NAME_ENTRY(GET_CONTRAST), 341 SDVO_CMD_NAME_ENTRY(SET_CONTRAST), 342 SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS), 343 SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS), 344 SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS), 345 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H), 346 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H), 347 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H), 348 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V), 349 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V), 350 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V), 351 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER), 352 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER), 353 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER), 354 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE), 355 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE), 356 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE), 357 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D), 358 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D), 359 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D), 360 SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS), 361 SDVO_CMD_NAME_ENTRY(GET_SHARPNESS), 362 SDVO_CMD_NAME_ENTRY(SET_SHARPNESS), 363 SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL), 364 SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL), 365 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER), 366 SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER), 367 SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER), 368 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER), 369 SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER), 370 SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER), 371 372 /* HDMI op code */ 373 SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE), 374 SDVO_CMD_NAME_ENTRY(GET_ENCODE), 375 SDVO_CMD_NAME_ENTRY(SET_ENCODE), 376 SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI), 377 SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI), 378 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP), 379 SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY), 380 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY), 381 SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER), 382 SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT), 383 SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT), 384 SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX), 385 SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX), 386 SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO), 387 SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT), 388 SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT), 389 SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE), 390 SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE), 391 SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA), 392 SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA), 393 }; 394 395 #undef SDVO_CMD_NAME_ENTRY 396 397 static const char *sdvo_cmd_name(u8 cmd) 398 { 399 int i; 400 401 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 402 if (cmd == sdvo_cmd_names[i].cmd) 403 return sdvo_cmd_names[i].name; 404 } 405 406 return NULL; 407 } 408 409 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC") 410 411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 412 const void *args, int args_len) 413 { 414 const char *cmd_name; 415 int i, pos = 0; 416 char buffer[64]; 417 418 #define BUF_PRINT(args...) \ 419 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args) 420 421 for (i = 0; i < args_len; i++) { 422 BUF_PRINT("%02X ", ((u8 *)args)[i]); 423 } 424 for (; i < 8; i++) { 425 BUF_PRINT(" "); 426 } 427 428 cmd_name = sdvo_cmd_name(cmd); 429 if (cmd_name) 430 BUF_PRINT("(%s)", cmd_name); 431 else 432 BUF_PRINT("(%02X)", cmd); 433 434 WARN_ON(pos >= sizeof(buffer) - 1); 435 #undef BUF_PRINT 436 437 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); 438 } 439 440 static const char * const cmd_status_names[] = { 441 [SDVO_CMD_STATUS_POWER_ON] = "Power on", 442 [SDVO_CMD_STATUS_SUCCESS] = "Success", 443 [SDVO_CMD_STATUS_NOTSUPP] = "Not supported", 444 [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg", 445 [SDVO_CMD_STATUS_PENDING] = "Pending", 446 [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified", 447 [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported", 448 }; 449 450 static const char *sdvo_cmd_status(u8 status) 451 { 452 if (status < ARRAY_SIZE(cmd_status_names)) 453 return cmd_status_names[status]; 454 else 455 return NULL; 456 } 457 458 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 459 const void *args, int args_len, 460 bool unlocked) 461 { 462 u8 *buf, status; 463 struct i2c_msg *msgs; 464 int i, ret = true; 465 466 /* Would be simpler to allocate both in one go ? */ 467 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); 468 if (!buf) 469 return false; 470 471 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); 472 if (!msgs) { 473 kfree(buf); 474 return false; 475 } 476 477 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 478 479 for (i = 0; i < args_len; i++) { 480 msgs[i].addr = intel_sdvo->slave_addr; 481 msgs[i].flags = 0; 482 msgs[i].len = 2; 483 msgs[i].buf = buf + 2 *i; 484 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 485 buf[2*i + 1] = ((u8*)args)[i]; 486 } 487 msgs[i].addr = intel_sdvo->slave_addr; 488 msgs[i].flags = 0; 489 msgs[i].len = 2; 490 msgs[i].buf = buf + 2*i; 491 buf[2*i + 0] = SDVO_I2C_OPCODE; 492 buf[2*i + 1] = cmd; 493 494 /* the following two are to read the response */ 495 status = SDVO_I2C_CMD_STATUS; 496 msgs[i+1].addr = intel_sdvo->slave_addr; 497 msgs[i+1].flags = 0; 498 msgs[i+1].len = 1; 499 msgs[i+1].buf = &status; 500 501 msgs[i+2].addr = intel_sdvo->slave_addr; 502 msgs[i+2].flags = I2C_M_RD; 503 msgs[i+2].len = 1; 504 msgs[i+2].buf = &status; 505 506 if (unlocked) 507 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); 508 else 509 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3); 510 if (ret < 0) { 511 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 512 ret = false; 513 goto out; 514 } 515 if (ret != i+3) { 516 /* failure in I2C transfer */ 517 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 518 ret = false; 519 } 520 521 out: 522 kfree(msgs); 523 kfree(buf); 524 return ret; 525 } 526 527 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 528 const void *args, int args_len) 529 { 530 return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true); 531 } 532 533 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, 534 void *response, int response_len) 535 { 536 const char *cmd_status; 537 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ 538 u8 status; 539 int i, pos = 0; 540 char buffer[64]; 541 542 buffer[0] = '\0'; 543 544 /* 545 * The documentation states that all commands will be 546 * processed within 15µs, and that we need only poll 547 * the status byte a maximum of 3 times in order for the 548 * command to be complete. 549 * 550 * Check 5 times in case the hardware failed to read the docs. 551 * 552 * Also beware that the first response by many devices is to 553 * reply PENDING and stall for time. TVs are notorious for 554 * requiring longer than specified to complete their replies. 555 * Originally (in the DDX long ago), the delay was only ever 15ms 556 * with an additional delay of 30ms applied for TVs added later after 557 * many experiments. To accommodate both sets of delays, we do a 558 * sequence of slow checks if the device is falling behind and fails 559 * to reply within 5*15µs. 560 */ 561 if (!intel_sdvo_read_byte(intel_sdvo, 562 SDVO_I2C_CMD_STATUS, 563 &status)) 564 goto log_fail; 565 566 while ((status == SDVO_CMD_STATUS_PENDING || 567 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) { 568 if (retry < 10) 569 msleep(15); 570 else 571 udelay(15); 572 573 if (!intel_sdvo_read_byte(intel_sdvo, 574 SDVO_I2C_CMD_STATUS, 575 &status)) 576 goto log_fail; 577 } 578 579 #define BUF_PRINT(args...) \ 580 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args) 581 582 cmd_status = sdvo_cmd_status(status); 583 if (cmd_status) 584 BUF_PRINT("(%s)", cmd_status); 585 else 586 BUF_PRINT("(??? %d)", status); 587 588 if (status != SDVO_CMD_STATUS_SUCCESS) 589 goto log_fail; 590 591 /* Read the command response */ 592 for (i = 0; i < response_len; i++) { 593 if (!intel_sdvo_read_byte(intel_sdvo, 594 SDVO_I2C_RETURN_0 + i, 595 &((u8 *)response)[i])) 596 goto log_fail; 597 BUF_PRINT(" %02X", ((u8 *)response)[i]); 598 } 599 600 WARN_ON(pos >= sizeof(buffer) - 1); 601 #undef BUF_PRINT 602 603 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer); 604 return true; 605 606 log_fail: 607 DRM_DEBUG_KMS("%s: R: ... failed %s\n", 608 SDVO_NAME(intel_sdvo), buffer); 609 return false; 610 } 611 612 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode) 613 { 614 if (adjusted_mode->crtc_clock >= 100000) 615 return 1; 616 else if (adjusted_mode->crtc_clock >= 50000) 617 return 2; 618 else 619 return 4; 620 } 621 622 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 623 u8 ddc_bus) 624 { 625 /* This must be the immediately preceding write before the i2c xfer */ 626 return __intel_sdvo_write_cmd(intel_sdvo, 627 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 628 &ddc_bus, 1, false); 629 } 630 631 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 632 { 633 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 634 return false; 635 636 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 637 } 638 639 static bool 640 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 641 { 642 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 643 return false; 644 645 return intel_sdvo_read_response(intel_sdvo, value, len); 646 } 647 648 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 649 { 650 struct intel_sdvo_set_target_input_args targets = {0}; 651 return intel_sdvo_set_value(intel_sdvo, 652 SDVO_CMD_SET_TARGET_INPUT, 653 &targets, sizeof(targets)); 654 } 655 656 /* 657 * Return whether each input is trained. 658 * 659 * This function is making an assumption about the layout of the response, 660 * which should be checked against the docs. 661 */ 662 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 663 { 664 struct intel_sdvo_get_trained_inputs_response response; 665 666 BUILD_BUG_ON(sizeof(response) != 1); 667 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 668 &response, sizeof(response))) 669 return false; 670 671 *input_1 = response.input0_trained; 672 *input_2 = response.input1_trained; 673 return true; 674 } 675 676 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 677 u16 outputs) 678 { 679 return intel_sdvo_set_value(intel_sdvo, 680 SDVO_CMD_SET_ACTIVE_OUTPUTS, 681 &outputs, sizeof(outputs)); 682 } 683 684 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, 685 u16 *outputs) 686 { 687 return intel_sdvo_get_value(intel_sdvo, 688 SDVO_CMD_GET_ACTIVE_OUTPUTS, 689 outputs, sizeof(*outputs)); 690 } 691 692 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 693 int mode) 694 { 695 u8 state = SDVO_ENCODER_STATE_ON; 696 697 switch (mode) { 698 case DRM_MODE_DPMS_ON: 699 state = SDVO_ENCODER_STATE_ON; 700 break; 701 case DRM_MODE_DPMS_STANDBY: 702 state = SDVO_ENCODER_STATE_STANDBY; 703 break; 704 case DRM_MODE_DPMS_SUSPEND: 705 state = SDVO_ENCODER_STATE_SUSPEND; 706 break; 707 case DRM_MODE_DPMS_OFF: 708 state = SDVO_ENCODER_STATE_OFF; 709 break; 710 } 711 712 return intel_sdvo_set_value(intel_sdvo, 713 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 714 } 715 716 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 717 int *clock_min, 718 int *clock_max) 719 { 720 struct intel_sdvo_pixel_clock_range clocks; 721 722 BUILD_BUG_ON(sizeof(clocks) != 4); 723 if (!intel_sdvo_get_value(intel_sdvo, 724 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 725 &clocks, sizeof(clocks))) 726 return false; 727 728 /* Convert the values from units of 10 kHz to kHz. */ 729 *clock_min = clocks.min * 10; 730 *clock_max = clocks.max * 10; 731 return true; 732 } 733 734 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 735 u16 outputs) 736 { 737 return intel_sdvo_set_value(intel_sdvo, 738 SDVO_CMD_SET_TARGET_OUTPUT, 739 &outputs, sizeof(outputs)); 740 } 741 742 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 743 struct intel_sdvo_dtd *dtd) 744 { 745 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 746 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 747 } 748 749 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 750 struct intel_sdvo_dtd *dtd) 751 { 752 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 753 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 754 } 755 756 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 757 struct intel_sdvo_dtd *dtd) 758 { 759 return intel_sdvo_set_timing(intel_sdvo, 760 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 761 } 762 763 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 764 struct intel_sdvo_dtd *dtd) 765 { 766 return intel_sdvo_set_timing(intel_sdvo, 767 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 768 } 769 770 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo, 771 struct intel_sdvo_dtd *dtd) 772 { 773 return intel_sdvo_get_timing(intel_sdvo, 774 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); 775 } 776 777 static bool 778 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 779 struct intel_sdvo_connector *intel_sdvo_connector, 780 u16 clock, 781 u16 width, 782 u16 height) 783 { 784 struct intel_sdvo_preferred_input_timing_args args; 785 786 memset(&args, 0, sizeof(args)); 787 args.clock = clock; 788 args.width = width; 789 args.height = height; 790 args.interlace = 0; 791 792 if (IS_LVDS(intel_sdvo_connector)) { 793 const struct drm_display_mode *fixed_mode = 794 intel_sdvo_connector->base.panel.fixed_mode; 795 796 if (fixed_mode->hdisplay != width || 797 fixed_mode->vdisplay != height) 798 args.scaled = 1; 799 } 800 801 return intel_sdvo_set_value(intel_sdvo, 802 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 803 &args, sizeof(args)); 804 } 805 806 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 807 struct intel_sdvo_dtd *dtd) 808 { 809 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 810 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 811 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 812 &dtd->part1, sizeof(dtd->part1)) && 813 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 814 &dtd->part2, sizeof(dtd->part2)); 815 } 816 817 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 818 { 819 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 820 } 821 822 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 823 const struct drm_display_mode *mode) 824 { 825 u16 width, height; 826 u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len; 827 u16 h_sync_offset, v_sync_offset; 828 int mode_clock; 829 830 memset(dtd, 0, sizeof(*dtd)); 831 832 width = mode->hdisplay; 833 height = mode->vdisplay; 834 835 /* do some mode translations */ 836 h_blank_len = mode->htotal - mode->hdisplay; 837 h_sync_len = mode->hsync_end - mode->hsync_start; 838 839 v_blank_len = mode->vtotal - mode->vdisplay; 840 v_sync_len = mode->vsync_end - mode->vsync_start; 841 842 h_sync_offset = mode->hsync_start - mode->hdisplay; 843 v_sync_offset = mode->vsync_start - mode->vdisplay; 844 845 mode_clock = mode->clock; 846 mode_clock /= 10; 847 dtd->part1.clock = mode_clock; 848 849 dtd->part1.h_active = width & 0xff; 850 dtd->part1.h_blank = h_blank_len & 0xff; 851 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 852 ((h_blank_len >> 8) & 0xf); 853 dtd->part1.v_active = height & 0xff; 854 dtd->part1.v_blank = v_blank_len & 0xff; 855 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 856 ((v_blank_len >> 8) & 0xf); 857 858 dtd->part2.h_sync_off = h_sync_offset & 0xff; 859 dtd->part2.h_sync_width = h_sync_len & 0xff; 860 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 861 (v_sync_len & 0xf); 862 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 863 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 864 ((v_sync_len & 0x30) >> 4); 865 866 dtd->part2.dtd_flags = 0x18; 867 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 868 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; 869 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 870 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; 871 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 872 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; 873 874 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 875 } 876 877 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, 878 const struct intel_sdvo_dtd *dtd) 879 { 880 struct drm_display_mode mode = {}; 881 882 mode.hdisplay = dtd->part1.h_active; 883 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 884 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; 885 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 886 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; 887 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 888 mode.htotal = mode.hdisplay + dtd->part1.h_blank; 889 mode.htotal += (dtd->part1.h_high & 0xf) << 8; 890 891 mode.vdisplay = dtd->part1.v_active; 892 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 893 mode.vsync_start = mode.vdisplay; 894 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 895 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 896 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; 897 mode.vsync_end = mode.vsync_start + 898 (dtd->part2.v_sync_off_width & 0xf); 899 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 900 mode.vtotal = mode.vdisplay + dtd->part1.v_blank; 901 mode.vtotal += (dtd->part1.v_high & 0xf) << 8; 902 903 mode.clock = dtd->part1.clock * 10; 904 905 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) 906 mode.flags |= DRM_MODE_FLAG_INTERLACE; 907 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 908 mode.flags |= DRM_MODE_FLAG_PHSYNC; 909 else 910 mode.flags |= DRM_MODE_FLAG_NHSYNC; 911 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 912 mode.flags |= DRM_MODE_FLAG_PVSYNC; 913 else 914 mode.flags |= DRM_MODE_FLAG_NVSYNC; 915 916 drm_mode_set_crtcinfo(&mode, 0); 917 918 drm_mode_copy(pmode, &mode); 919 } 920 921 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 922 { 923 struct intel_sdvo_encode encode; 924 925 BUILD_BUG_ON(sizeof(encode) != 2); 926 return intel_sdvo_get_value(intel_sdvo, 927 SDVO_CMD_GET_SUPP_ENCODE, 928 &encode, sizeof(encode)); 929 } 930 931 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 932 u8 mode) 933 { 934 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 935 } 936 937 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 938 u8 mode) 939 { 940 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 941 } 942 943 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo, 944 u8 audio_state) 945 { 946 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT, 947 &audio_state, 1); 948 } 949 950 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo, 951 u8 *hbuf_size) 952 { 953 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, 954 hbuf_size, 1)) 955 return false; 956 957 /* Buffer size is 0 based, hooray! However zero means zero. */ 958 if (*hbuf_size) 959 (*hbuf_size)++; 960 961 return true; 962 } 963 964 #if 0 965 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 966 { 967 int i, j; 968 u8 set_buf_index[2]; 969 u8 av_split; 970 u8 buf_size; 971 u8 buf[48]; 972 u8 *pos; 973 974 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 975 976 for (i = 0; i <= av_split; i++) { 977 set_buf_index[0] = i; set_buf_index[1] = 0; 978 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 979 set_buf_index, 2); 980 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 981 intel_sdvo_read_response(encoder, &buf_size, 1); 982 983 pos = buf; 984 for (j = 0; j <= buf_size; j += 8) { 985 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 986 NULL, 0); 987 intel_sdvo_read_response(encoder, pos, 8); 988 pos += 8; 989 } 990 } 991 } 992 #endif 993 994 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, 995 unsigned int if_index, u8 tx_rate, 996 const u8 *data, unsigned int length) 997 { 998 u8 set_buf_index[2] = { if_index, 0 }; 999 u8 hbuf_size, tmp[8]; 1000 int i; 1001 1002 if (!intel_sdvo_set_value(intel_sdvo, 1003 SDVO_CMD_SET_HBUF_INDEX, 1004 set_buf_index, 2)) 1005 return false; 1006 1007 if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size)) 1008 return false; 1009 1010 DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n", 1011 if_index, length, hbuf_size); 1012 1013 if (hbuf_size < length) 1014 return false; 1015 1016 for (i = 0; i < hbuf_size; i += 8) { 1017 memset(tmp, 0, 8); 1018 if (i < length) 1019 memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); 1020 1021 if (!intel_sdvo_set_value(intel_sdvo, 1022 SDVO_CMD_SET_HBUF_DATA, 1023 tmp, 8)) 1024 return false; 1025 } 1026 1027 return intel_sdvo_set_value(intel_sdvo, 1028 SDVO_CMD_SET_HBUF_TXRATE, 1029 &tx_rate, 1); 1030 } 1031 1032 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo, 1033 unsigned int if_index, 1034 u8 *data, unsigned int length) 1035 { 1036 u8 set_buf_index[2] = { if_index, 0 }; 1037 u8 hbuf_size, tx_rate, av_split; 1038 int i; 1039 1040 if (!intel_sdvo_get_value(intel_sdvo, 1041 SDVO_CMD_GET_HBUF_AV_SPLIT, 1042 &av_split, 1)) 1043 return -ENXIO; 1044 1045 if (av_split < if_index) 1046 return 0; 1047 1048 if (!intel_sdvo_set_value(intel_sdvo, 1049 SDVO_CMD_SET_HBUF_INDEX, 1050 set_buf_index, 2)) 1051 return -ENXIO; 1052 1053 if (!intel_sdvo_get_value(intel_sdvo, 1054 SDVO_CMD_GET_HBUF_TXRATE, 1055 &tx_rate, 1)) 1056 return -ENXIO; 1057 1058 if (tx_rate == SDVO_HBUF_TX_DISABLED) 1059 return 0; 1060 1061 if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size)) 1062 return false; 1063 1064 DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n", 1065 if_index, length, hbuf_size); 1066 1067 hbuf_size = min_t(unsigned int, length, hbuf_size); 1068 1069 for (i = 0; i < hbuf_size; i += 8) { 1070 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0)) 1071 return -ENXIO; 1072 if (!intel_sdvo_read_response(intel_sdvo, &data[i], 1073 min_t(unsigned int, 8, hbuf_size - i))) 1074 return -ENXIO; 1075 } 1076 1077 return hbuf_size; 1078 } 1079 1080 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo, 1081 struct intel_crtc_state *crtc_state, 1082 struct drm_connector_state *conn_state) 1083 { 1084 struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi; 1085 const struct drm_display_mode *adjusted_mode = 1086 &crtc_state->hw.adjusted_mode; 1087 int ret; 1088 1089 if (!crtc_state->has_hdmi_sink) 1090 return true; 1091 1092 crtc_state->infoframes.enable |= 1093 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); 1094 1095 ret = drm_hdmi_avi_infoframe_from_display_mode(frame, 1096 conn_state->connector, 1097 adjusted_mode); 1098 if (ret) 1099 return false; 1100 1101 drm_hdmi_avi_infoframe_quant_range(frame, 1102 conn_state->connector, 1103 adjusted_mode, 1104 crtc_state->limited_color_range ? 1105 HDMI_QUANTIZATION_RANGE_LIMITED : 1106 HDMI_QUANTIZATION_RANGE_FULL); 1107 1108 ret = hdmi_avi_infoframe_check(frame); 1109 if (WARN_ON(ret)) 1110 return false; 1111 1112 return true; 1113 } 1114 1115 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, 1116 const struct intel_crtc_state *crtc_state) 1117 { 1118 u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 1119 const union hdmi_infoframe *frame = &crtc_state->infoframes.avi; 1120 ssize_t len; 1121 1122 if ((crtc_state->infoframes.enable & 1123 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0) 1124 return true; 1125 1126 if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI)) 1127 return false; 1128 1129 len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data)); 1130 if (WARN_ON(len < 0)) 1131 return false; 1132 1133 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1134 SDVO_HBUF_TX_VSYNC, 1135 sdvo_data, len); 1136 } 1137 1138 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo, 1139 struct intel_crtc_state *crtc_state) 1140 { 1141 u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 1142 union hdmi_infoframe *frame = &crtc_state->infoframes.avi; 1143 ssize_t len; 1144 int ret; 1145 1146 if (!crtc_state->has_hdmi_sink) 1147 return; 1148 1149 len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1150 sdvo_data, sizeof(sdvo_data)); 1151 if (len < 0) { 1152 DRM_DEBUG_KMS("failed to read AVI infoframe\n"); 1153 return; 1154 } else if (len == 0) { 1155 return; 1156 } 1157 1158 crtc_state->infoframes.enable |= 1159 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); 1160 1161 ret = hdmi_infoframe_unpack(frame, sdvo_data, len); 1162 if (ret) { 1163 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n"); 1164 return; 1165 } 1166 1167 if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI) 1168 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n", 1169 frame->any.type, HDMI_INFOFRAME_TYPE_AVI); 1170 } 1171 1172 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo, 1173 const struct drm_connector_state *conn_state) 1174 { 1175 struct intel_sdvo_tv_format format; 1176 u32 format_map; 1177 1178 format_map = 1 << conn_state->tv.mode; 1179 memset(&format, 0, sizeof(format)); 1180 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 1181 1182 BUILD_BUG_ON(sizeof(format) != 6); 1183 return intel_sdvo_set_value(intel_sdvo, 1184 SDVO_CMD_SET_TV_FORMAT, 1185 &format, sizeof(format)); 1186 } 1187 1188 static bool 1189 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 1190 const struct drm_display_mode *mode) 1191 { 1192 struct intel_sdvo_dtd output_dtd; 1193 1194 if (!intel_sdvo_set_target_output(intel_sdvo, 1195 intel_sdvo->attached_output)) 1196 return false; 1197 1198 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1199 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1200 return false; 1201 1202 return true; 1203 } 1204 1205 /* 1206 * Asks the sdvo controller for the preferred input mode given the output mode. 1207 * Unfortunately we have to set up the full output mode to do that. 1208 */ 1209 static bool 1210 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, 1211 struct intel_sdvo_connector *intel_sdvo_connector, 1212 const struct drm_display_mode *mode, 1213 struct drm_display_mode *adjusted_mode) 1214 { 1215 struct intel_sdvo_dtd input_dtd; 1216 1217 /* Reset the input timing to the screen. Assume always input 0. */ 1218 if (!intel_sdvo_set_target_input(intel_sdvo)) 1219 return false; 1220 1221 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 1222 intel_sdvo_connector, 1223 mode->clock / 10, 1224 mode->hdisplay, 1225 mode->vdisplay)) 1226 return false; 1227 1228 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 1229 &input_dtd)) 1230 return false; 1231 1232 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1233 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; 1234 1235 return true; 1236 } 1237 1238 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) 1239 { 1240 unsigned dotclock = pipe_config->port_clock; 1241 struct dpll *clock = &pipe_config->dpll; 1242 1243 /* 1244 * SDVO TV has fixed PLL values depend on its clock range, 1245 * this mirrors vbios setting. 1246 */ 1247 if (dotclock >= 100000 && dotclock < 140500) { 1248 clock->p1 = 2; 1249 clock->p2 = 10; 1250 clock->n = 3; 1251 clock->m1 = 16; 1252 clock->m2 = 8; 1253 } else if (dotclock >= 140500 && dotclock <= 200000) { 1254 clock->p1 = 1; 1255 clock->p2 = 10; 1256 clock->n = 6; 1257 clock->m1 = 12; 1258 clock->m2 = 8; 1259 } else { 1260 WARN(1, "SDVO TV clock out of range: %i\n", dotclock); 1261 } 1262 1263 pipe_config->clock_set = true; 1264 } 1265 1266 static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo, 1267 const struct drm_connector_state *conn_state) 1268 { 1269 return sdvo->has_hdmi_monitor && 1270 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI; 1271 } 1272 1273 static int intel_sdvo_compute_config(struct intel_encoder *encoder, 1274 struct intel_crtc_state *pipe_config, 1275 struct drm_connector_state *conn_state) 1276 { 1277 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1278 struct intel_sdvo_connector_state *intel_sdvo_state = 1279 to_intel_sdvo_connector_state(conn_state); 1280 struct intel_sdvo_connector *intel_sdvo_connector = 1281 to_intel_sdvo_connector(conn_state->connector); 1282 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 1283 struct drm_display_mode *mode = &pipe_config->hw.mode; 1284 1285 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); 1286 pipe_config->pipe_bpp = 8*3; 1287 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 1288 1289 if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) 1290 pipe_config->has_pch_encoder = true; 1291 1292 /* 1293 * We need to construct preferred input timings based on our 1294 * output timings. To do that, we have to set the output 1295 * timings, even though this isn't really the right place in 1296 * the sequence to do it. Oh well. 1297 */ 1298 if (IS_TV(intel_sdvo_connector)) { 1299 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 1300 return -EINVAL; 1301 1302 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1303 intel_sdvo_connector, 1304 mode, 1305 adjusted_mode); 1306 pipe_config->sdvo_tv_clock = true; 1307 } else if (IS_LVDS(intel_sdvo_connector)) { 1308 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 1309 intel_sdvo_connector->base.panel.fixed_mode)) 1310 return -EINVAL; 1311 1312 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1313 intel_sdvo_connector, 1314 mode, 1315 adjusted_mode); 1316 } 1317 1318 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 1319 return -EINVAL; 1320 1321 /* 1322 * Make the CRTC code factor in the SDVO pixel multiplier. The 1323 * SDVO device will factor out the multiplier during mode_set. 1324 */ 1325 pipe_config->pixel_multiplier = 1326 intel_sdvo_get_pixel_multiplier(adjusted_mode); 1327 1328 pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state); 1329 1330 if (pipe_config->has_hdmi_sink) { 1331 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO) 1332 pipe_config->has_audio = intel_sdvo->has_hdmi_audio; 1333 else 1334 pipe_config->has_audio = 1335 intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON; 1336 } 1337 1338 if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) { 1339 /* 1340 * See CEA-861-E - 5.1 Default Encoding Parameters 1341 * 1342 * FIXME: This bit is only valid when using TMDS encoding and 8 1343 * bit per color mode. 1344 */ 1345 if (pipe_config->has_hdmi_sink && 1346 drm_match_cea_mode(adjusted_mode) > 1) 1347 pipe_config->limited_color_range = true; 1348 } else { 1349 if (pipe_config->has_hdmi_sink && 1350 intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED) 1351 pipe_config->limited_color_range = true; 1352 } 1353 1354 /* Clock computation needs to happen after pixel multiplier. */ 1355 if (IS_TV(intel_sdvo_connector)) 1356 i9xx_adjust_sdvo_tv_clock(pipe_config); 1357 1358 if (conn_state->picture_aspect_ratio) 1359 adjusted_mode->picture_aspect_ratio = 1360 conn_state->picture_aspect_ratio; 1361 1362 if (!intel_sdvo_compute_avi_infoframe(intel_sdvo, 1363 pipe_config, conn_state)) { 1364 DRM_DEBUG_KMS("bad AVI infoframe\n"); 1365 return -EINVAL; 1366 } 1367 1368 return 0; 1369 } 1370 1371 #define UPDATE_PROPERTY(input, NAME) \ 1372 do { \ 1373 val = input; \ 1374 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \ 1375 } while (0) 1376 1377 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo, 1378 const struct intel_sdvo_connector_state *sdvo_state) 1379 { 1380 const struct drm_connector_state *conn_state = &sdvo_state->base.base; 1381 struct intel_sdvo_connector *intel_sdvo_conn = 1382 to_intel_sdvo_connector(conn_state->connector); 1383 u16 val; 1384 1385 if (intel_sdvo_conn->left) 1386 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H); 1387 1388 if (intel_sdvo_conn->top) 1389 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V); 1390 1391 if (intel_sdvo_conn->hpos) 1392 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS); 1393 1394 if (intel_sdvo_conn->vpos) 1395 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS); 1396 1397 if (intel_sdvo_conn->saturation) 1398 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION); 1399 1400 if (intel_sdvo_conn->contrast) 1401 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST); 1402 1403 if (intel_sdvo_conn->hue) 1404 UPDATE_PROPERTY(conn_state->tv.hue, HUE); 1405 1406 if (intel_sdvo_conn->brightness) 1407 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS); 1408 1409 if (intel_sdvo_conn->sharpness) 1410 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS); 1411 1412 if (intel_sdvo_conn->flicker_filter) 1413 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER); 1414 1415 if (intel_sdvo_conn->flicker_filter_2d) 1416 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D); 1417 1418 if (intel_sdvo_conn->flicker_filter_adaptive) 1419 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 1420 1421 if (intel_sdvo_conn->tv_chroma_filter) 1422 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER); 1423 1424 if (intel_sdvo_conn->tv_luma_filter) 1425 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER); 1426 1427 if (intel_sdvo_conn->dot_crawl) 1428 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL); 1429 1430 #undef UPDATE_PROPERTY 1431 } 1432 1433 static void intel_sdvo_pre_enable(struct intel_atomic_state *state, 1434 struct intel_encoder *intel_encoder, 1435 const struct intel_crtc_state *crtc_state, 1436 const struct drm_connector_state *conn_state) 1437 { 1438 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); 1439 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 1440 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 1441 const struct intel_sdvo_connector_state *sdvo_state = 1442 to_intel_sdvo_connector_state(conn_state); 1443 const struct intel_sdvo_connector *intel_sdvo_connector = 1444 to_intel_sdvo_connector(conn_state->connector); 1445 const struct drm_display_mode *mode = &crtc_state->hw.mode; 1446 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); 1447 u32 sdvox; 1448 struct intel_sdvo_in_out_map in_out; 1449 struct intel_sdvo_dtd input_dtd, output_dtd; 1450 int rate; 1451 1452 intel_sdvo_update_props(intel_sdvo, sdvo_state); 1453 1454 /* 1455 * First, set the input mapping for the first input to our controlled 1456 * output. This is only correct if we're a single-input device, in 1457 * which case the first input is the output from the appropriate SDVO 1458 * channel on the motherboard. In a two-input device, the first input 1459 * will be SDVOB and the second SDVOC. 1460 */ 1461 in_out.in0 = intel_sdvo->attached_output; 1462 in_out.in1 = 0; 1463 1464 intel_sdvo_set_value(intel_sdvo, 1465 SDVO_CMD_SET_IN_OUT_MAP, 1466 &in_out, sizeof(in_out)); 1467 1468 /* Set the output timings to the screen */ 1469 if (!intel_sdvo_set_target_output(intel_sdvo, 1470 intel_sdvo->attached_output)) 1471 return; 1472 1473 /* lvds has a special fixed output timing. */ 1474 if (IS_LVDS(intel_sdvo_connector)) 1475 intel_sdvo_get_dtd_from_mode(&output_dtd, 1476 intel_sdvo_connector->base.panel.fixed_mode); 1477 else 1478 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1479 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1480 drm_info(&dev_priv->drm, 1481 "Setting output timings on %s failed\n", 1482 SDVO_NAME(intel_sdvo)); 1483 1484 /* Set the input timing to the screen. Assume always input 0. */ 1485 if (!intel_sdvo_set_target_input(intel_sdvo)) 1486 return; 1487 1488 if (crtc_state->has_hdmi_sink) { 1489 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1490 intel_sdvo_set_colorimetry(intel_sdvo, 1491 SDVO_COLORIMETRY_RGB256); 1492 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state); 1493 } else 1494 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1495 1496 if (IS_TV(intel_sdvo_connector) && 1497 !intel_sdvo_set_tv_format(intel_sdvo, conn_state)) 1498 return; 1499 1500 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1501 1502 if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector)) 1503 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; 1504 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) 1505 drm_info(&dev_priv->drm, 1506 "Setting input timings on %s failed\n", 1507 SDVO_NAME(intel_sdvo)); 1508 1509 switch (crtc_state->pixel_multiplier) { 1510 default: 1511 drm_WARN(&dev_priv->drm, 1, 1512 "unknown pixel multiplier specified\n"); 1513 /* fall through */ 1514 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1515 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1516 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1517 } 1518 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1519 return; 1520 1521 /* Set the SDVO control regs. */ 1522 if (INTEL_GEN(dev_priv) >= 4) { 1523 /* The real mode polarity is set by the SDVO commands, using 1524 * struct intel_sdvo_dtd. */ 1525 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1526 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range) 1527 sdvox |= HDMI_COLOR_RANGE_16_235; 1528 if (INTEL_GEN(dev_priv) < 5) 1529 sdvox |= SDVO_BORDER_ENABLE; 1530 } else { 1531 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1532 if (intel_sdvo->port == PORT_B) 1533 sdvox &= SDVOB_PRESERVE_MASK; 1534 else 1535 sdvox &= SDVOC_PRESERVE_MASK; 1536 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1537 } 1538 1539 if (HAS_PCH_CPT(dev_priv)) 1540 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); 1541 else 1542 sdvox |= SDVO_PIPE_SEL(crtc->pipe); 1543 1544 if (INTEL_GEN(dev_priv) >= 4) { 1545 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1546 } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) || 1547 IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) { 1548 /* done in crtc_mode_set as it lives inside the dpll register */ 1549 } else { 1550 sdvox |= (crtc_state->pixel_multiplier - 1) 1551 << SDVO_PORT_MULTIPLY_SHIFT; 1552 } 1553 1554 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1555 INTEL_GEN(dev_priv) < 5) 1556 sdvox |= SDVO_STALL_SELECT; 1557 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1558 } 1559 1560 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) 1561 { 1562 struct intel_sdvo_connector *intel_sdvo_connector = 1563 to_intel_sdvo_connector(&connector->base); 1564 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1565 u16 active_outputs = 0; 1566 1567 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1568 1569 return active_outputs & intel_sdvo_connector->output_flag; 1570 } 1571 1572 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv, 1573 i915_reg_t sdvo_reg, enum pipe *pipe) 1574 { 1575 u32 val; 1576 1577 val = intel_de_read(dev_priv, sdvo_reg); 1578 1579 /* asserts want to know the pipe even if the port is disabled */ 1580 if (HAS_PCH_CPT(dev_priv)) 1581 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT; 1582 else if (IS_CHERRYVIEW(dev_priv)) 1583 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV; 1584 else 1585 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT; 1586 1587 return val & SDVO_ENABLE; 1588 } 1589 1590 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, 1591 enum pipe *pipe) 1592 { 1593 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1594 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1595 u16 active_outputs = 0; 1596 bool ret; 1597 1598 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1599 1600 ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe); 1601 1602 return ret || active_outputs; 1603 } 1604 1605 static void intel_sdvo_get_config(struct intel_encoder *encoder, 1606 struct intel_crtc_state *pipe_config) 1607 { 1608 struct drm_device *dev = encoder->base.dev; 1609 struct drm_i915_private *dev_priv = to_i915(dev); 1610 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1611 struct intel_sdvo_dtd dtd; 1612 int encoder_pixel_multiplier = 0; 1613 int dotclock; 1614 u32 flags = 0, sdvox; 1615 u8 val; 1616 bool ret; 1617 1618 pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO); 1619 1620 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1621 1622 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); 1623 if (!ret) { 1624 /* 1625 * Some sdvo encoders are not spec compliant and don't 1626 * implement the mandatory get_timings function. 1627 */ 1628 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n"); 1629 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; 1630 } else { 1631 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 1632 flags |= DRM_MODE_FLAG_PHSYNC; 1633 else 1634 flags |= DRM_MODE_FLAG_NHSYNC; 1635 1636 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 1637 flags |= DRM_MODE_FLAG_PVSYNC; 1638 else 1639 flags |= DRM_MODE_FLAG_NVSYNC; 1640 } 1641 1642 pipe_config->hw.adjusted_mode.flags |= flags; 1643 1644 /* 1645 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in 1646 * the sdvo port register, on all other platforms it is part of the dpll 1647 * state. Since the general pipe state readout happens before the 1648 * encoder->get_config we so already have a valid pixel multplier on all 1649 * other platfroms. 1650 */ 1651 if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) { 1652 pipe_config->pixel_multiplier = 1653 ((sdvox & SDVO_PORT_MULTIPLY_MASK) 1654 >> SDVO_PORT_MULTIPLY_SHIFT) + 1; 1655 } 1656 1657 dotclock = pipe_config->port_clock; 1658 1659 if (pipe_config->pixel_multiplier) 1660 dotclock /= pipe_config->pixel_multiplier; 1661 1662 pipe_config->hw.adjusted_mode.crtc_clock = dotclock; 1663 1664 /* Cross check the port pixel multiplier with the sdvo encoder state. */ 1665 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, 1666 &val, 1)) { 1667 switch (val) { 1668 case SDVO_CLOCK_RATE_MULT_1X: 1669 encoder_pixel_multiplier = 1; 1670 break; 1671 case SDVO_CLOCK_RATE_MULT_2X: 1672 encoder_pixel_multiplier = 2; 1673 break; 1674 case SDVO_CLOCK_RATE_MULT_4X: 1675 encoder_pixel_multiplier = 4; 1676 break; 1677 } 1678 } 1679 1680 drm_WARN(dev, 1681 encoder_pixel_multiplier != pipe_config->pixel_multiplier, 1682 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", 1683 pipe_config->pixel_multiplier, encoder_pixel_multiplier); 1684 1685 if (sdvox & HDMI_COLOR_RANGE_16_235) 1686 pipe_config->limited_color_range = true; 1687 1688 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT, 1689 &val, 1)) { 1690 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT; 1691 1692 if ((val & mask) == mask) 1693 pipe_config->has_audio = true; 1694 } 1695 1696 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, 1697 &val, 1)) { 1698 if (val == SDVO_ENCODE_HDMI) 1699 pipe_config->has_hdmi_sink = true; 1700 } 1701 1702 intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config); 1703 } 1704 1705 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo) 1706 { 1707 intel_sdvo_set_audio_state(intel_sdvo, 0); 1708 } 1709 1710 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo, 1711 const struct intel_crtc_state *crtc_state, 1712 const struct drm_connector_state *conn_state) 1713 { 1714 const struct drm_display_mode *adjusted_mode = 1715 &crtc_state->hw.adjusted_mode; 1716 struct drm_connector *connector = conn_state->connector; 1717 u8 *eld = connector->eld; 1718 1719 eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2; 1720 1721 intel_sdvo_set_audio_state(intel_sdvo, 0); 1722 1723 intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD, 1724 SDVO_HBUF_TX_DISABLED, 1725 eld, drm_eld_size(eld)); 1726 1727 intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID | 1728 SDVO_AUDIO_PRESENCE_DETECT); 1729 } 1730 1731 static void intel_disable_sdvo(struct intel_atomic_state *state, 1732 struct intel_encoder *encoder, 1733 const struct intel_crtc_state *old_crtc_state, 1734 const struct drm_connector_state *conn_state) 1735 { 1736 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1737 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1738 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 1739 u32 temp; 1740 1741 if (old_crtc_state->has_audio) 1742 intel_sdvo_disable_audio(intel_sdvo); 1743 1744 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1745 if (0) 1746 intel_sdvo_set_encoder_power_state(intel_sdvo, 1747 DRM_MODE_DPMS_OFF); 1748 1749 temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1750 1751 temp &= ~SDVO_ENABLE; 1752 intel_sdvo_write_sdvox(intel_sdvo, temp); 1753 1754 /* 1755 * HW workaround for IBX, we need to move the port 1756 * to transcoder A after disabling it to allow the 1757 * matching DP port to be enabled on transcoder A. 1758 */ 1759 if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { 1760 /* 1761 * We get CPU/PCH FIFO underruns on the other pipe when 1762 * doing the workaround. Sweep them under the rug. 1763 */ 1764 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1765 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1766 1767 temp &= ~SDVO_PIPE_SEL_MASK; 1768 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A); 1769 intel_sdvo_write_sdvox(intel_sdvo, temp); 1770 1771 temp &= ~SDVO_ENABLE; 1772 intel_sdvo_write_sdvox(intel_sdvo, temp); 1773 1774 intel_wait_for_vblank_if_active(dev_priv, PIPE_A); 1775 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1776 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1777 } 1778 } 1779 1780 static void pch_disable_sdvo(struct intel_atomic_state *state, 1781 struct intel_encoder *encoder, 1782 const struct intel_crtc_state *old_crtc_state, 1783 const struct drm_connector_state *old_conn_state) 1784 { 1785 } 1786 1787 static void pch_post_disable_sdvo(struct intel_atomic_state *state, 1788 struct intel_encoder *encoder, 1789 const struct intel_crtc_state *old_crtc_state, 1790 const struct drm_connector_state *old_conn_state) 1791 { 1792 intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state); 1793 } 1794 1795 static void intel_enable_sdvo(struct intel_atomic_state *state, 1796 struct intel_encoder *encoder, 1797 const struct intel_crtc_state *pipe_config, 1798 const struct drm_connector_state *conn_state) 1799 { 1800 struct drm_device *dev = encoder->base.dev; 1801 struct drm_i915_private *dev_priv = to_i915(dev); 1802 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1803 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); 1804 u32 temp; 1805 bool input1, input2; 1806 int i; 1807 bool success; 1808 1809 temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1810 temp |= SDVO_ENABLE; 1811 intel_sdvo_write_sdvox(intel_sdvo, temp); 1812 1813 for (i = 0; i < 2; i++) 1814 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); 1815 1816 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1817 /* 1818 * Warn if the device reported failure to sync. 1819 * 1820 * A lot of SDVO devices fail to notify of sync, but it's 1821 * a given it the status is a success, we succeeded. 1822 */ 1823 if (success && !input1) { 1824 drm_dbg_kms(&dev_priv->drm, 1825 "First %s output reported failure to " 1826 "sync\n", SDVO_NAME(intel_sdvo)); 1827 } 1828 1829 if (0) 1830 intel_sdvo_set_encoder_power_state(intel_sdvo, 1831 DRM_MODE_DPMS_ON); 1832 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1833 1834 if (pipe_config->has_audio) 1835 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state); 1836 } 1837 1838 static enum drm_mode_status 1839 intel_sdvo_mode_valid(struct drm_connector *connector, 1840 struct drm_display_mode *mode) 1841 { 1842 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1843 struct intel_sdvo_connector *intel_sdvo_connector = 1844 to_intel_sdvo_connector(connector); 1845 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 1846 1847 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1848 return MODE_NO_DBLESCAN; 1849 1850 if (intel_sdvo->pixel_clock_min > mode->clock) 1851 return MODE_CLOCK_LOW; 1852 1853 if (intel_sdvo->pixel_clock_max < mode->clock) 1854 return MODE_CLOCK_HIGH; 1855 1856 if (mode->clock > max_dotclk) 1857 return MODE_CLOCK_HIGH; 1858 1859 if (IS_LVDS(intel_sdvo_connector)) { 1860 const struct drm_display_mode *fixed_mode = 1861 intel_sdvo_connector->base.panel.fixed_mode; 1862 1863 if (mode->hdisplay > fixed_mode->hdisplay) 1864 return MODE_PANEL; 1865 1866 if (mode->vdisplay > fixed_mode->vdisplay) 1867 return MODE_PANEL; 1868 } 1869 1870 return MODE_OK; 1871 } 1872 1873 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1874 { 1875 BUILD_BUG_ON(sizeof(*caps) != 8); 1876 if (!intel_sdvo_get_value(intel_sdvo, 1877 SDVO_CMD_GET_DEVICE_CAPS, 1878 caps, sizeof(*caps))) 1879 return false; 1880 1881 DRM_DEBUG_KMS("SDVO capabilities:\n" 1882 " vendor_id: %d\n" 1883 " device_id: %d\n" 1884 " device_rev_id: %d\n" 1885 " sdvo_version_major: %d\n" 1886 " sdvo_version_minor: %d\n" 1887 " sdvo_inputs_mask: %d\n" 1888 " smooth_scaling: %d\n" 1889 " sharp_scaling: %d\n" 1890 " up_scaling: %d\n" 1891 " down_scaling: %d\n" 1892 " stall_support: %d\n" 1893 " output_flags: %d\n", 1894 caps->vendor_id, 1895 caps->device_id, 1896 caps->device_rev_id, 1897 caps->sdvo_version_major, 1898 caps->sdvo_version_minor, 1899 caps->sdvo_inputs_mask, 1900 caps->smooth_scaling, 1901 caps->sharp_scaling, 1902 caps->up_scaling, 1903 caps->down_scaling, 1904 caps->stall_support, 1905 caps->output_flags); 1906 1907 return true; 1908 } 1909 1910 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) 1911 { 1912 struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev); 1913 u16 hotplug; 1914 1915 if (!I915_HAS_HOTPLUG(dev_priv)) 1916 return 0; 1917 1918 /* 1919 * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1920 * on the line. 1921 */ 1922 if (IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 1923 return 0; 1924 1925 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1926 &hotplug, sizeof(hotplug))) 1927 return 0; 1928 1929 return hotplug; 1930 } 1931 1932 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1933 { 1934 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1935 1936 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1937 &intel_sdvo->hotplug_active, 2); 1938 } 1939 1940 static enum intel_hotplug_state 1941 intel_sdvo_hotplug(struct intel_encoder *encoder, 1942 struct intel_connector *connector) 1943 { 1944 intel_sdvo_enable_hotplug(encoder); 1945 1946 return intel_encoder_hotplug(encoder, connector); 1947 } 1948 1949 static bool 1950 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1951 { 1952 /* Is there more than one type of output? */ 1953 return hweight16(intel_sdvo->caps.output_flags) > 1; 1954 } 1955 1956 static struct edid * 1957 intel_sdvo_get_edid(struct drm_connector *connector) 1958 { 1959 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1960 return drm_get_edid(connector, &sdvo->ddc); 1961 } 1962 1963 /* Mac mini hack -- use the same DDC as the analog connector */ 1964 static struct edid * 1965 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1966 { 1967 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1968 1969 return drm_get_edid(connector, 1970 intel_gmbus_get_adapter(dev_priv, 1971 dev_priv->vbt.crt_ddc_pin)); 1972 } 1973 1974 static enum drm_connector_status 1975 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1976 { 1977 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1978 struct intel_sdvo_connector *intel_sdvo_connector = 1979 to_intel_sdvo_connector(connector); 1980 enum drm_connector_status status; 1981 struct edid *edid; 1982 1983 edid = intel_sdvo_get_edid(connector); 1984 1985 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1986 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1987 1988 /* 1989 * Don't use the 1 as the argument of DDC bus switch to get 1990 * the EDID. It is used for SDVO SPD ROM. 1991 */ 1992 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1993 intel_sdvo->ddc_bus = ddc; 1994 edid = intel_sdvo_get_edid(connector); 1995 if (edid) 1996 break; 1997 } 1998 /* 1999 * If we found the EDID on the other bus, 2000 * assume that is the correct DDC bus. 2001 */ 2002 if (edid == NULL) 2003 intel_sdvo->ddc_bus = saved_ddc; 2004 } 2005 2006 /* 2007 * When there is no edid and no monitor is connected with VGA 2008 * port, try to use the CRT ddc to read the EDID for DVI-connector. 2009 */ 2010 if (edid == NULL) 2011 edid = intel_sdvo_get_analog_edid(connector); 2012 2013 status = connector_status_unknown; 2014 if (edid != NULL) { 2015 /* DDC bus is shared, match EDID to connector type */ 2016 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 2017 status = connector_status_connected; 2018 if (intel_sdvo_connector->is_hdmi) { 2019 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 2020 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 2021 } 2022 } else 2023 status = connector_status_disconnected; 2024 kfree(edid); 2025 } 2026 2027 return status; 2028 } 2029 2030 static bool 2031 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 2032 struct edid *edid) 2033 { 2034 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 2035 bool connector_is_digital = !!IS_DIGITAL(sdvo); 2036 2037 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 2038 connector_is_digital, monitor_is_digital); 2039 return connector_is_digital == monitor_is_digital; 2040 } 2041 2042 static enum drm_connector_status 2043 intel_sdvo_detect(struct drm_connector *connector, bool force) 2044 { 2045 u16 response; 2046 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2047 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2048 enum drm_connector_status ret; 2049 2050 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2051 connector->base.id, connector->name); 2052 2053 if (!intel_sdvo_get_value(intel_sdvo, 2054 SDVO_CMD_GET_ATTACHED_DISPLAYS, 2055 &response, 2)) 2056 return connector_status_unknown; 2057 2058 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 2059 response & 0xff, response >> 8, 2060 intel_sdvo_connector->output_flag); 2061 2062 if (response == 0) 2063 return connector_status_disconnected; 2064 2065 intel_sdvo->attached_output = response; 2066 2067 intel_sdvo->has_hdmi_monitor = false; 2068 intel_sdvo->has_hdmi_audio = false; 2069 2070 if ((intel_sdvo_connector->output_flag & response) == 0) 2071 ret = connector_status_disconnected; 2072 else if (IS_TMDS(intel_sdvo_connector)) 2073 ret = intel_sdvo_tmds_sink_detect(connector); 2074 else { 2075 struct edid *edid; 2076 2077 /* if we have an edid check it matches the connection */ 2078 edid = intel_sdvo_get_edid(connector); 2079 if (edid == NULL) 2080 edid = intel_sdvo_get_analog_edid(connector); 2081 if (edid != NULL) { 2082 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 2083 edid)) 2084 ret = connector_status_connected; 2085 else 2086 ret = connector_status_disconnected; 2087 2088 kfree(edid); 2089 } else 2090 ret = connector_status_connected; 2091 } 2092 2093 return ret; 2094 } 2095 2096 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 2097 { 2098 struct edid *edid; 2099 2100 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2101 connector->base.id, connector->name); 2102 2103 /* set the bus switch and get the modes */ 2104 edid = intel_sdvo_get_edid(connector); 2105 2106 /* 2107 * Mac mini hack. On this device, the DVI-I connector shares one DDC 2108 * link between analog and digital outputs. So, if the regular SDVO 2109 * DDC fails, check to see if the analog output is disconnected, in 2110 * which case we'll look there for the digital DDC data. 2111 */ 2112 if (edid == NULL) 2113 edid = intel_sdvo_get_analog_edid(connector); 2114 2115 if (edid != NULL) { 2116 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 2117 edid)) { 2118 drm_connector_update_edid_property(connector, edid); 2119 drm_add_edid_modes(connector, edid); 2120 } 2121 2122 kfree(edid); 2123 } 2124 } 2125 2126 /* 2127 * Set of SDVO TV modes. 2128 * Note! This is in reply order (see loop in get_tv_modes). 2129 * XXX: all 60Hz refresh? 2130 */ 2131 static const struct drm_display_mode sdvo_tv_modes[] = { 2132 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 2133 416, 0, 200, 201, 232, 233, 0, 2134 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2135 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 2136 416, 0, 240, 241, 272, 273, 0, 2137 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2138 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 2139 496, 0, 300, 301, 332, 333, 0, 2140 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2141 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 2142 736, 0, 350, 351, 382, 383, 0, 2143 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2144 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 2145 736, 0, 400, 401, 432, 433, 0, 2146 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2147 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 2148 736, 0, 480, 481, 512, 513, 0, 2149 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2150 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 2151 800, 0, 480, 481, 512, 513, 0, 2152 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2153 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 2154 800, 0, 576, 577, 608, 609, 0, 2155 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2156 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 2157 816, 0, 350, 351, 382, 383, 0, 2158 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2159 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 2160 816, 0, 400, 401, 432, 433, 0, 2161 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2162 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 2163 816, 0, 480, 481, 512, 513, 0, 2164 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2165 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 2166 816, 0, 540, 541, 572, 573, 0, 2167 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2168 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 2169 816, 0, 576, 577, 608, 609, 0, 2170 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2171 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 2172 864, 0, 576, 577, 608, 609, 0, 2173 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2174 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 2175 896, 0, 600, 601, 632, 633, 0, 2176 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2177 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 2178 928, 0, 624, 625, 656, 657, 0, 2179 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2180 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 2181 1016, 0, 766, 767, 798, 799, 0, 2182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2183 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 2184 1120, 0, 768, 769, 800, 801, 0, 2185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2186 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 2187 1376, 0, 1024, 1025, 1056, 1057, 0, 2188 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2189 }; 2190 2191 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 2192 { 2193 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2194 const struct drm_connector_state *conn_state = connector->state; 2195 struct intel_sdvo_sdtv_resolution_request tv_res; 2196 u32 reply = 0, format_map = 0; 2197 int i; 2198 2199 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2200 connector->base.id, connector->name); 2201 2202 /* 2203 * Read the list of supported input resolutions for the selected TV 2204 * format. 2205 */ 2206 format_map = 1 << conn_state->tv.mode; 2207 memcpy(&tv_res, &format_map, 2208 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 2209 2210 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 2211 return; 2212 2213 BUILD_BUG_ON(sizeof(tv_res) != 3); 2214 if (!intel_sdvo_write_cmd(intel_sdvo, 2215 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 2216 &tv_res, sizeof(tv_res))) 2217 return; 2218 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 2219 return; 2220 2221 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 2222 if (reply & (1 << i)) { 2223 struct drm_display_mode *nmode; 2224 nmode = drm_mode_duplicate(connector->dev, 2225 &sdvo_tv_modes[i]); 2226 if (nmode) 2227 drm_mode_probed_add(connector, nmode); 2228 } 2229 } 2230 2231 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 2232 { 2233 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2234 struct drm_i915_private *dev_priv = to_i915(connector->dev); 2235 struct drm_display_mode *newmode; 2236 2237 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n", 2238 connector->base.id, connector->name); 2239 2240 /* 2241 * Fetch modes from VBT. For SDVO prefer the VBT mode since some 2242 * SDVO->LVDS transcoders can't cope with the EDID mode. 2243 */ 2244 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) { 2245 newmode = drm_mode_duplicate(connector->dev, 2246 dev_priv->vbt.sdvo_lvds_vbt_mode); 2247 if (newmode != NULL) { 2248 /* Guarantee the mode is preferred */ 2249 newmode->type = (DRM_MODE_TYPE_PREFERRED | 2250 DRM_MODE_TYPE_DRIVER); 2251 drm_mode_probed_add(connector, newmode); 2252 } 2253 } 2254 2255 /* 2256 * Attempt to get the mode list from DDC. 2257 * Assume that the preferred modes are 2258 * arranged in priority order. 2259 */ 2260 intel_ddc_get_modes(connector, &intel_sdvo->ddc); 2261 } 2262 2263 static int intel_sdvo_get_modes(struct drm_connector *connector) 2264 { 2265 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2266 2267 if (IS_TV(intel_sdvo_connector)) 2268 intel_sdvo_get_tv_modes(connector); 2269 else if (IS_LVDS(intel_sdvo_connector)) 2270 intel_sdvo_get_lvds_modes(connector); 2271 else 2272 intel_sdvo_get_ddc_modes(connector); 2273 2274 return !list_empty(&connector->probed_modes); 2275 } 2276 2277 static int 2278 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector, 2279 const struct drm_connector_state *state, 2280 struct drm_property *property, 2281 u64 *val) 2282 { 2283 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2284 const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state); 2285 2286 if (property == intel_sdvo_connector->tv_format) { 2287 int i; 2288 2289 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2290 if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) { 2291 *val = i; 2292 2293 return 0; 2294 } 2295 2296 WARN_ON(1); 2297 *val = 0; 2298 } else if (property == intel_sdvo_connector->top || 2299 property == intel_sdvo_connector->bottom) 2300 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v; 2301 else if (property == intel_sdvo_connector->left || 2302 property == intel_sdvo_connector->right) 2303 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h; 2304 else if (property == intel_sdvo_connector->hpos) 2305 *val = sdvo_state->tv.hpos; 2306 else if (property == intel_sdvo_connector->vpos) 2307 *val = sdvo_state->tv.vpos; 2308 else if (property == intel_sdvo_connector->saturation) 2309 *val = state->tv.saturation; 2310 else if (property == intel_sdvo_connector->contrast) 2311 *val = state->tv.contrast; 2312 else if (property == intel_sdvo_connector->hue) 2313 *val = state->tv.hue; 2314 else if (property == intel_sdvo_connector->brightness) 2315 *val = state->tv.brightness; 2316 else if (property == intel_sdvo_connector->sharpness) 2317 *val = sdvo_state->tv.sharpness; 2318 else if (property == intel_sdvo_connector->flicker_filter) 2319 *val = sdvo_state->tv.flicker_filter; 2320 else if (property == intel_sdvo_connector->flicker_filter_2d) 2321 *val = sdvo_state->tv.flicker_filter_2d; 2322 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2323 *val = sdvo_state->tv.flicker_filter_adaptive; 2324 else if (property == intel_sdvo_connector->tv_chroma_filter) 2325 *val = sdvo_state->tv.chroma_filter; 2326 else if (property == intel_sdvo_connector->tv_luma_filter) 2327 *val = sdvo_state->tv.luma_filter; 2328 else if (property == intel_sdvo_connector->dot_crawl) 2329 *val = sdvo_state->tv.dot_crawl; 2330 else 2331 return intel_digital_connector_atomic_get_property(connector, state, property, val); 2332 2333 return 0; 2334 } 2335 2336 static int 2337 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector, 2338 struct drm_connector_state *state, 2339 struct drm_property *property, 2340 u64 val) 2341 { 2342 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2343 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state); 2344 2345 if (property == intel_sdvo_connector->tv_format) { 2346 state->tv.mode = intel_sdvo_connector->tv_format_supported[val]; 2347 2348 if (state->crtc) { 2349 struct drm_crtc_state *crtc_state = 2350 drm_atomic_get_new_crtc_state(state->state, state->crtc); 2351 2352 crtc_state->connectors_changed = true; 2353 } 2354 } else if (property == intel_sdvo_connector->top || 2355 property == intel_sdvo_connector->bottom) 2356 /* Cannot set these independent from each other */ 2357 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val; 2358 else if (property == intel_sdvo_connector->left || 2359 property == intel_sdvo_connector->right) 2360 /* Cannot set these independent from each other */ 2361 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val; 2362 else if (property == intel_sdvo_connector->hpos) 2363 sdvo_state->tv.hpos = val; 2364 else if (property == intel_sdvo_connector->vpos) 2365 sdvo_state->tv.vpos = val; 2366 else if (property == intel_sdvo_connector->saturation) 2367 state->tv.saturation = val; 2368 else if (property == intel_sdvo_connector->contrast) 2369 state->tv.contrast = val; 2370 else if (property == intel_sdvo_connector->hue) 2371 state->tv.hue = val; 2372 else if (property == intel_sdvo_connector->brightness) 2373 state->tv.brightness = val; 2374 else if (property == intel_sdvo_connector->sharpness) 2375 sdvo_state->tv.sharpness = val; 2376 else if (property == intel_sdvo_connector->flicker_filter) 2377 sdvo_state->tv.flicker_filter = val; 2378 else if (property == intel_sdvo_connector->flicker_filter_2d) 2379 sdvo_state->tv.flicker_filter_2d = val; 2380 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2381 sdvo_state->tv.flicker_filter_adaptive = val; 2382 else if (property == intel_sdvo_connector->tv_chroma_filter) 2383 sdvo_state->tv.chroma_filter = val; 2384 else if (property == intel_sdvo_connector->tv_luma_filter) 2385 sdvo_state->tv.luma_filter = val; 2386 else if (property == intel_sdvo_connector->dot_crawl) 2387 sdvo_state->tv.dot_crawl = val; 2388 else 2389 return intel_digital_connector_atomic_set_property(connector, state, property, val); 2390 2391 return 0; 2392 } 2393 2394 static int 2395 intel_sdvo_connector_register(struct drm_connector *connector) 2396 { 2397 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2398 int ret; 2399 2400 ret = intel_connector_register(connector); 2401 if (ret) 2402 return ret; 2403 2404 return sysfs_create_link(&connector->kdev->kobj, 2405 &sdvo->ddc.dev.kobj, 2406 sdvo->ddc.dev.kobj.name); 2407 } 2408 2409 static void 2410 intel_sdvo_connector_unregister(struct drm_connector *connector) 2411 { 2412 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2413 2414 sysfs_remove_link(&connector->kdev->kobj, 2415 sdvo->ddc.dev.kobj.name); 2416 intel_connector_unregister(connector); 2417 } 2418 2419 static struct drm_connector_state * 2420 intel_sdvo_connector_duplicate_state(struct drm_connector *connector) 2421 { 2422 struct intel_sdvo_connector_state *state; 2423 2424 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL); 2425 if (!state) 2426 return NULL; 2427 2428 __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base); 2429 return &state->base.base; 2430 } 2431 2432 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 2433 .detect = intel_sdvo_detect, 2434 .fill_modes = drm_helper_probe_single_connector_modes, 2435 .atomic_get_property = intel_sdvo_connector_atomic_get_property, 2436 .atomic_set_property = intel_sdvo_connector_atomic_set_property, 2437 .late_register = intel_sdvo_connector_register, 2438 .early_unregister = intel_sdvo_connector_unregister, 2439 .destroy = intel_connector_destroy, 2440 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 2441 .atomic_duplicate_state = intel_sdvo_connector_duplicate_state, 2442 }; 2443 2444 static int intel_sdvo_atomic_check(struct drm_connector *conn, 2445 struct drm_atomic_state *state) 2446 { 2447 struct drm_connector_state *new_conn_state = 2448 drm_atomic_get_new_connector_state(state, conn); 2449 struct drm_connector_state *old_conn_state = 2450 drm_atomic_get_old_connector_state(state, conn); 2451 struct intel_sdvo_connector_state *old_state = 2452 to_intel_sdvo_connector_state(old_conn_state); 2453 struct intel_sdvo_connector_state *new_state = 2454 to_intel_sdvo_connector_state(new_conn_state); 2455 2456 if (new_conn_state->crtc && 2457 (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) || 2458 memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) { 2459 struct drm_crtc_state *crtc_state = 2460 drm_atomic_get_new_crtc_state(state, 2461 new_conn_state->crtc); 2462 2463 crtc_state->connectors_changed = true; 2464 } 2465 2466 return intel_digital_connector_atomic_check(conn, state); 2467 } 2468 2469 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 2470 .get_modes = intel_sdvo_get_modes, 2471 .mode_valid = intel_sdvo_mode_valid, 2472 .atomic_check = intel_sdvo_atomic_check, 2473 }; 2474 2475 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2476 { 2477 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder)); 2478 2479 i2c_del_adapter(&intel_sdvo->ddc); 2480 intel_encoder_destroy(encoder); 2481 } 2482 2483 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2484 .destroy = intel_sdvo_enc_destroy, 2485 }; 2486 2487 static void 2488 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 2489 { 2490 u16 mask = 0; 2491 unsigned int num_bits; 2492 2493 /* 2494 * Make a mask of outputs less than or equal to our own priority in the 2495 * list. 2496 */ 2497 switch (sdvo->controlled_output) { 2498 case SDVO_OUTPUT_LVDS1: 2499 mask |= SDVO_OUTPUT_LVDS1; 2500 /* fall through */ 2501 case SDVO_OUTPUT_LVDS0: 2502 mask |= SDVO_OUTPUT_LVDS0; 2503 /* fall through */ 2504 case SDVO_OUTPUT_TMDS1: 2505 mask |= SDVO_OUTPUT_TMDS1; 2506 /* fall through */ 2507 case SDVO_OUTPUT_TMDS0: 2508 mask |= SDVO_OUTPUT_TMDS0; 2509 /* fall through */ 2510 case SDVO_OUTPUT_RGB1: 2511 mask |= SDVO_OUTPUT_RGB1; 2512 /* fall through */ 2513 case SDVO_OUTPUT_RGB0: 2514 mask |= SDVO_OUTPUT_RGB0; 2515 break; 2516 } 2517 2518 /* Count bits to find what number we are in the priority list. */ 2519 mask &= sdvo->caps.output_flags; 2520 num_bits = hweight16(mask); 2521 /* If more than 3 outputs, default to DDC bus 3 for now. */ 2522 if (num_bits > 3) 2523 num_bits = 3; 2524 2525 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 2526 sdvo->ddc_bus = 1 << num_bits; 2527 } 2528 2529 /* 2530 * Choose the appropriate DDC bus for control bus switch command for this 2531 * SDVO output based on the controlled output. 2532 * 2533 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 2534 * outputs, then LVDS outputs. 2535 */ 2536 static void 2537 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2538 struct intel_sdvo *sdvo) 2539 { 2540 struct sdvo_device_mapping *mapping; 2541 2542 if (sdvo->port == PORT_B) 2543 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2544 else 2545 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2546 2547 if (mapping->initialized) 2548 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 2549 else 2550 intel_sdvo_guess_ddc_bus(sdvo); 2551 } 2552 2553 static void 2554 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 2555 struct intel_sdvo *sdvo) 2556 { 2557 struct sdvo_device_mapping *mapping; 2558 u8 pin; 2559 2560 if (sdvo->port == PORT_B) 2561 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2562 else 2563 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2564 2565 if (mapping->initialized && 2566 intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin)) 2567 pin = mapping->i2c_pin; 2568 else 2569 pin = GMBUS_PIN_DPB; 2570 2571 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 2572 2573 /* 2574 * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 2575 * our code totally fails once we start using gmbus. Hence fall back to 2576 * bit banging for now. 2577 */ 2578 intel_gmbus_force_bit(sdvo->i2c, true); 2579 } 2580 2581 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 2582 static void 2583 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) 2584 { 2585 intel_gmbus_force_bit(sdvo->i2c, false); 2586 } 2587 2588 static bool 2589 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 2590 { 2591 return intel_sdvo_check_supp_encode(intel_sdvo); 2592 } 2593 2594 static u8 2595 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv, 2596 struct intel_sdvo *sdvo) 2597 { 2598 struct sdvo_device_mapping *my_mapping, *other_mapping; 2599 2600 if (sdvo->port == PORT_B) { 2601 my_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2602 other_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2603 } else { 2604 my_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2605 other_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2606 } 2607 2608 /* If the BIOS described our SDVO device, take advantage of it. */ 2609 if (my_mapping->slave_addr) 2610 return my_mapping->slave_addr; 2611 2612 /* 2613 * If the BIOS only described a different SDVO device, use the 2614 * address that it isn't using. 2615 */ 2616 if (other_mapping->slave_addr) { 2617 if (other_mapping->slave_addr == 0x70) 2618 return 0x72; 2619 else 2620 return 0x70; 2621 } 2622 2623 /* 2624 * No SDVO device info is found for another DVO port, 2625 * so use mapping assumption we had before BIOS parsing. 2626 */ 2627 if (sdvo->port == PORT_B) 2628 return 0x70; 2629 else 2630 return 0x72; 2631 } 2632 2633 static int 2634 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2635 struct intel_sdvo *encoder) 2636 { 2637 struct drm_connector *drm_connector; 2638 int ret; 2639 2640 drm_connector = &connector->base.base; 2641 ret = drm_connector_init(encoder->base.base.dev, 2642 drm_connector, 2643 &intel_sdvo_connector_funcs, 2644 connector->base.base.connector_type); 2645 if (ret < 0) 2646 return ret; 2647 2648 drm_connector_helper_add(drm_connector, 2649 &intel_sdvo_connector_helper_funcs); 2650 2651 connector->base.base.interlace_allowed = 1; 2652 connector->base.base.doublescan_allowed = 0; 2653 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2654 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; 2655 2656 intel_connector_attach_encoder(&connector->base, &encoder->base); 2657 2658 return 0; 2659 } 2660 2661 static void 2662 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, 2663 struct intel_sdvo_connector *connector) 2664 { 2665 struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev); 2666 2667 intel_attach_force_audio_property(&connector->base.base); 2668 if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) { 2669 intel_attach_broadcast_rgb_property(&connector->base.base); 2670 } 2671 intel_attach_aspect_ratio_property(&connector->base.base); 2672 } 2673 2674 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void) 2675 { 2676 struct intel_sdvo_connector *sdvo_connector; 2677 struct intel_sdvo_connector_state *conn_state; 2678 2679 sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL); 2680 if (!sdvo_connector) 2681 return NULL; 2682 2683 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL); 2684 if (!conn_state) { 2685 kfree(sdvo_connector); 2686 return NULL; 2687 } 2688 2689 __drm_atomic_helper_connector_reset(&sdvo_connector->base.base, 2690 &conn_state->base.base); 2691 2692 return sdvo_connector; 2693 } 2694 2695 static bool 2696 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2697 { 2698 struct drm_encoder *encoder = &intel_sdvo->base.base; 2699 struct drm_connector *connector; 2700 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2701 struct intel_connector *intel_connector; 2702 struct intel_sdvo_connector *intel_sdvo_connector; 2703 2704 DRM_DEBUG_KMS("initialising DVI device %d\n", device); 2705 2706 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2707 if (!intel_sdvo_connector) 2708 return false; 2709 2710 if (device == 0) { 2711 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2712 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2713 } else if (device == 1) { 2714 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2715 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2716 } 2717 2718 intel_connector = &intel_sdvo_connector->base; 2719 connector = &intel_connector->base; 2720 if (intel_sdvo_get_hotplug_support(intel_sdvo) & 2721 intel_sdvo_connector->output_flag) { 2722 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; 2723 /* 2724 * Some SDVO devices have one-shot hotplug interrupts. 2725 * Ensure that they get re-enabled when an interrupt happens. 2726 */ 2727 intel_connector->polled = DRM_CONNECTOR_POLL_HPD; 2728 intel_encoder->hotplug = intel_sdvo_hotplug; 2729 intel_sdvo_enable_hotplug(intel_encoder); 2730 } else { 2731 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2732 } 2733 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2734 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2735 2736 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2737 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2738 intel_sdvo_connector->is_hdmi = true; 2739 } 2740 2741 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2742 kfree(intel_sdvo_connector); 2743 return false; 2744 } 2745 2746 if (intel_sdvo_connector->is_hdmi) 2747 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); 2748 2749 return true; 2750 } 2751 2752 static bool 2753 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2754 { 2755 struct drm_encoder *encoder = &intel_sdvo->base.base; 2756 struct drm_connector *connector; 2757 struct intel_connector *intel_connector; 2758 struct intel_sdvo_connector *intel_sdvo_connector; 2759 2760 DRM_DEBUG_KMS("initialising TV type %d\n", type); 2761 2762 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2763 if (!intel_sdvo_connector) 2764 return false; 2765 2766 intel_connector = &intel_sdvo_connector->base; 2767 connector = &intel_connector->base; 2768 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2769 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2770 2771 intel_sdvo->controlled_output |= type; 2772 intel_sdvo_connector->output_flag = type; 2773 2774 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2775 kfree(intel_sdvo_connector); 2776 return false; 2777 } 2778 2779 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2780 goto err; 2781 2782 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2783 goto err; 2784 2785 return true; 2786 2787 err: 2788 intel_connector_destroy(connector); 2789 return false; 2790 } 2791 2792 static bool 2793 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2794 { 2795 struct drm_encoder *encoder = &intel_sdvo->base.base; 2796 struct drm_connector *connector; 2797 struct intel_connector *intel_connector; 2798 struct intel_sdvo_connector *intel_sdvo_connector; 2799 2800 DRM_DEBUG_KMS("initialising analog device %d\n", device); 2801 2802 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2803 if (!intel_sdvo_connector) 2804 return false; 2805 2806 intel_connector = &intel_sdvo_connector->base; 2807 connector = &intel_connector->base; 2808 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2809 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2810 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2811 2812 if (device == 0) { 2813 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2814 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2815 } else if (device == 1) { 2816 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2817 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2818 } 2819 2820 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2821 kfree(intel_sdvo_connector); 2822 return false; 2823 } 2824 2825 return true; 2826 } 2827 2828 static bool 2829 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2830 { 2831 struct drm_encoder *encoder = &intel_sdvo->base.base; 2832 struct drm_connector *connector; 2833 struct intel_connector *intel_connector; 2834 struct intel_sdvo_connector *intel_sdvo_connector; 2835 struct drm_display_mode *mode; 2836 2837 DRM_DEBUG_KMS("initialising LVDS device %d\n", device); 2838 2839 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2840 if (!intel_sdvo_connector) 2841 return false; 2842 2843 intel_connector = &intel_sdvo_connector->base; 2844 connector = &intel_connector->base; 2845 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2846 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2847 2848 if (device == 0) { 2849 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2850 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2851 } else if (device == 1) { 2852 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2853 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2854 } 2855 2856 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2857 kfree(intel_sdvo_connector); 2858 return false; 2859 } 2860 2861 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2862 goto err; 2863 2864 intel_sdvo_get_lvds_modes(connector); 2865 2866 list_for_each_entry(mode, &connector->probed_modes, head) { 2867 if (mode->type & DRM_MODE_TYPE_PREFERRED) { 2868 struct drm_display_mode *fixed_mode = 2869 drm_mode_duplicate(connector->dev, mode); 2870 2871 intel_panel_init(&intel_connector->panel, 2872 fixed_mode, NULL); 2873 break; 2874 } 2875 } 2876 2877 if (!intel_connector->panel.fixed_mode) 2878 goto err; 2879 2880 return true; 2881 2882 err: 2883 intel_connector_destroy(connector); 2884 return false; 2885 } 2886 2887 static bool 2888 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags) 2889 { 2890 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2891 2892 if (flags & SDVO_OUTPUT_TMDS0) 2893 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2894 return false; 2895 2896 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2897 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2898 return false; 2899 2900 /* TV has no XXX1 function block */ 2901 if (flags & SDVO_OUTPUT_SVID0) 2902 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2903 return false; 2904 2905 if (flags & SDVO_OUTPUT_CVBS0) 2906 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2907 return false; 2908 2909 if (flags & SDVO_OUTPUT_YPRPB0) 2910 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2911 return false; 2912 2913 if (flags & SDVO_OUTPUT_RGB0) 2914 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2915 return false; 2916 2917 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2918 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2919 return false; 2920 2921 if (flags & SDVO_OUTPUT_LVDS0) 2922 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2923 return false; 2924 2925 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2926 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2927 return false; 2928 2929 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2930 unsigned char bytes[2]; 2931 2932 intel_sdvo->controlled_output = 0; 2933 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2934 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2935 SDVO_NAME(intel_sdvo), 2936 bytes[0], bytes[1]); 2937 return false; 2938 } 2939 intel_sdvo->base.pipe_mask = ~0; 2940 2941 return true; 2942 } 2943 2944 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) 2945 { 2946 struct drm_device *dev = intel_sdvo->base.base.dev; 2947 struct drm_connector *connector, *tmp; 2948 2949 list_for_each_entry_safe(connector, tmp, 2950 &dev->mode_config.connector_list, head) { 2951 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) { 2952 drm_connector_unregister(connector); 2953 intel_connector_destroy(connector); 2954 } 2955 } 2956 } 2957 2958 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2959 struct intel_sdvo_connector *intel_sdvo_connector, 2960 int type) 2961 { 2962 struct drm_device *dev = intel_sdvo->base.base.dev; 2963 struct intel_sdvo_tv_format format; 2964 u32 format_map, i; 2965 2966 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2967 return false; 2968 2969 BUILD_BUG_ON(sizeof(format) != 6); 2970 if (!intel_sdvo_get_value(intel_sdvo, 2971 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2972 &format, sizeof(format))) 2973 return false; 2974 2975 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2976 2977 if (format_map == 0) 2978 return false; 2979 2980 intel_sdvo_connector->format_supported_num = 0; 2981 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2982 if (format_map & (1 << i)) 2983 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2984 2985 2986 intel_sdvo_connector->tv_format = 2987 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2988 "mode", intel_sdvo_connector->format_supported_num); 2989 if (!intel_sdvo_connector->tv_format) 2990 return false; 2991 2992 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2993 drm_property_add_enum(intel_sdvo_connector->tv_format, i, 2994 tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2995 2996 intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0]; 2997 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2998 intel_sdvo_connector->tv_format, 0); 2999 return true; 3000 3001 } 3002 3003 #define _ENHANCEMENT(state_assignment, name, NAME) do { \ 3004 if (enhancements.name) { \ 3005 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 3006 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 3007 return false; \ 3008 intel_sdvo_connector->name = \ 3009 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 3010 if (!intel_sdvo_connector->name) return false; \ 3011 state_assignment = response; \ 3012 drm_object_attach_property(&connector->base, \ 3013 intel_sdvo_connector->name, 0); \ 3014 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 3015 data_value[0], data_value[1], response); \ 3016 } \ 3017 } while (0) 3018 3019 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME) 3020 3021 static bool 3022 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 3023 struct intel_sdvo_connector *intel_sdvo_connector, 3024 struct intel_sdvo_enhancements_reply enhancements) 3025 { 3026 struct drm_device *dev = intel_sdvo->base.base.dev; 3027 struct drm_connector *connector = &intel_sdvo_connector->base.base; 3028 struct drm_connector_state *conn_state = connector->state; 3029 struct intel_sdvo_connector_state *sdvo_state = 3030 to_intel_sdvo_connector_state(conn_state); 3031 u16 response, data_value[2]; 3032 3033 /* when horizontal overscan is supported, Add the left/right property */ 3034 if (enhancements.overscan_h) { 3035 if (!intel_sdvo_get_value(intel_sdvo, 3036 SDVO_CMD_GET_MAX_OVERSCAN_H, 3037 &data_value, 4)) 3038 return false; 3039 3040 if (!intel_sdvo_get_value(intel_sdvo, 3041 SDVO_CMD_GET_OVERSCAN_H, 3042 &response, 2)) 3043 return false; 3044 3045 sdvo_state->tv.overscan_h = response; 3046 3047 intel_sdvo_connector->max_hscan = data_value[0]; 3048 intel_sdvo_connector->left = 3049 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 3050 if (!intel_sdvo_connector->left) 3051 return false; 3052 3053 drm_object_attach_property(&connector->base, 3054 intel_sdvo_connector->left, 0); 3055 3056 intel_sdvo_connector->right = 3057 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 3058 if (!intel_sdvo_connector->right) 3059 return false; 3060 3061 drm_object_attach_property(&connector->base, 3062 intel_sdvo_connector->right, 0); 3063 DRM_DEBUG_KMS("h_overscan: max %d, " 3064 "default %d, current %d\n", 3065 data_value[0], data_value[1], response); 3066 } 3067 3068 if (enhancements.overscan_v) { 3069 if (!intel_sdvo_get_value(intel_sdvo, 3070 SDVO_CMD_GET_MAX_OVERSCAN_V, 3071 &data_value, 4)) 3072 return false; 3073 3074 if (!intel_sdvo_get_value(intel_sdvo, 3075 SDVO_CMD_GET_OVERSCAN_V, 3076 &response, 2)) 3077 return false; 3078 3079 sdvo_state->tv.overscan_v = response; 3080 3081 intel_sdvo_connector->max_vscan = data_value[0]; 3082 intel_sdvo_connector->top = 3083 drm_property_create_range(dev, 0, 3084 "top_margin", 0, data_value[0]); 3085 if (!intel_sdvo_connector->top) 3086 return false; 3087 3088 drm_object_attach_property(&connector->base, 3089 intel_sdvo_connector->top, 0); 3090 3091 intel_sdvo_connector->bottom = 3092 drm_property_create_range(dev, 0, 3093 "bottom_margin", 0, data_value[0]); 3094 if (!intel_sdvo_connector->bottom) 3095 return false; 3096 3097 drm_object_attach_property(&connector->base, 3098 intel_sdvo_connector->bottom, 0); 3099 DRM_DEBUG_KMS("v_overscan: max %d, " 3100 "default %d, current %d\n", 3101 data_value[0], data_value[1], response); 3102 } 3103 3104 ENHANCEMENT(&sdvo_state->tv, hpos, HPOS); 3105 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS); 3106 ENHANCEMENT(&conn_state->tv, saturation, SATURATION); 3107 ENHANCEMENT(&conn_state->tv, contrast, CONTRAST); 3108 ENHANCEMENT(&conn_state->tv, hue, HUE); 3109 ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS); 3110 ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS); 3111 ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER); 3112 ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 3113 ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D); 3114 _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER); 3115 _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER); 3116 3117 if (enhancements.dot_crawl) { 3118 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 3119 return false; 3120 3121 sdvo_state->tv.dot_crawl = response & 0x1; 3122 intel_sdvo_connector->dot_crawl = 3123 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 3124 if (!intel_sdvo_connector->dot_crawl) 3125 return false; 3126 3127 drm_object_attach_property(&connector->base, 3128 intel_sdvo_connector->dot_crawl, 0); 3129 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 3130 } 3131 3132 return true; 3133 } 3134 3135 static bool 3136 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 3137 struct intel_sdvo_connector *intel_sdvo_connector, 3138 struct intel_sdvo_enhancements_reply enhancements) 3139 { 3140 struct drm_device *dev = intel_sdvo->base.base.dev; 3141 struct drm_connector *connector = &intel_sdvo_connector->base.base; 3142 u16 response, data_value[2]; 3143 3144 ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS); 3145 3146 return true; 3147 } 3148 #undef ENHANCEMENT 3149 #undef _ENHANCEMENT 3150 3151 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 3152 struct intel_sdvo_connector *intel_sdvo_connector) 3153 { 3154 union { 3155 struct intel_sdvo_enhancements_reply reply; 3156 u16 response; 3157 } enhancements; 3158 3159 BUILD_BUG_ON(sizeof(enhancements) != 2); 3160 3161 if (!intel_sdvo_get_value(intel_sdvo, 3162 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 3163 &enhancements, sizeof(enhancements)) || 3164 enhancements.response == 0) { 3165 DRM_DEBUG_KMS("No enhancement is supported\n"); 3166 return true; 3167 } 3168 3169 if (IS_TV(intel_sdvo_connector)) 3170 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 3171 else if (IS_LVDS(intel_sdvo_connector)) 3172 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 3173 else 3174 return true; 3175 } 3176 3177 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 3178 struct i2c_msg *msgs, 3179 int num) 3180 { 3181 struct intel_sdvo *sdvo = adapter->algo_data; 3182 3183 if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 3184 return -EIO; 3185 3186 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 3187 } 3188 3189 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 3190 { 3191 struct intel_sdvo *sdvo = adapter->algo_data; 3192 return sdvo->i2c->algo->functionality(sdvo->i2c); 3193 } 3194 3195 static const struct i2c_algorithm intel_sdvo_ddc_proxy = { 3196 .master_xfer = intel_sdvo_ddc_proxy_xfer, 3197 .functionality = intel_sdvo_ddc_proxy_func 3198 }; 3199 3200 static void proxy_lock_bus(struct i2c_adapter *adapter, 3201 unsigned int flags) 3202 { 3203 struct intel_sdvo *sdvo = adapter->algo_data; 3204 sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags); 3205 } 3206 3207 static int proxy_trylock_bus(struct i2c_adapter *adapter, 3208 unsigned int flags) 3209 { 3210 struct intel_sdvo *sdvo = adapter->algo_data; 3211 return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags); 3212 } 3213 3214 static void proxy_unlock_bus(struct i2c_adapter *adapter, 3215 unsigned int flags) 3216 { 3217 struct intel_sdvo *sdvo = adapter->algo_data; 3218 sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags); 3219 } 3220 3221 static const struct i2c_lock_operations proxy_lock_ops = { 3222 .lock_bus = proxy_lock_bus, 3223 .trylock_bus = proxy_trylock_bus, 3224 .unlock_bus = proxy_unlock_bus, 3225 }; 3226 3227 static bool 3228 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, 3229 struct drm_i915_private *dev_priv) 3230 { 3231 struct pci_dev *pdev = dev_priv->drm.pdev; 3232 3233 sdvo->ddc.owner = THIS_MODULE; 3234 sdvo->ddc.class = I2C_CLASS_DDC; 3235 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 3236 sdvo->ddc.dev.parent = &pdev->dev; 3237 sdvo->ddc.algo_data = sdvo; 3238 sdvo->ddc.algo = &intel_sdvo_ddc_proxy; 3239 sdvo->ddc.lock_ops = &proxy_lock_ops; 3240 3241 return i2c_add_adapter(&sdvo->ddc) == 0; 3242 } 3243 3244 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv, 3245 enum port port) 3246 { 3247 if (HAS_PCH_SPLIT(dev_priv)) 3248 drm_WARN_ON(&dev_priv->drm, port != PORT_B); 3249 else 3250 drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C); 3251 } 3252 3253 bool intel_sdvo_init(struct drm_i915_private *dev_priv, 3254 i915_reg_t sdvo_reg, enum port port) 3255 { 3256 struct intel_encoder *intel_encoder; 3257 struct intel_sdvo *intel_sdvo; 3258 int i; 3259 3260 assert_sdvo_port_valid(dev_priv, port); 3261 3262 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); 3263 if (!intel_sdvo) 3264 return false; 3265 3266 intel_sdvo->sdvo_reg = sdvo_reg; 3267 intel_sdvo->port = port; 3268 intel_sdvo->slave_addr = 3269 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1; 3270 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo); 3271 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv)) 3272 goto err_i2c_bus; 3273 3274 /* encoder type will be decided later */ 3275 intel_encoder = &intel_sdvo->base; 3276 intel_encoder->type = INTEL_OUTPUT_SDVO; 3277 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 3278 intel_encoder->port = port; 3279 drm_encoder_init(&dev_priv->drm, &intel_encoder->base, 3280 &intel_sdvo_enc_funcs, 0, 3281 "SDVO %c", port_name(port)); 3282 3283 /* Read the regs to test if we can talk to the device */ 3284 for (i = 0; i < 0x40; i++) { 3285 u8 byte; 3286 3287 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 3288 drm_dbg_kms(&dev_priv->drm, 3289 "No SDVO device found on %s\n", 3290 SDVO_NAME(intel_sdvo)); 3291 goto err; 3292 } 3293 } 3294 3295 intel_encoder->compute_config = intel_sdvo_compute_config; 3296 if (HAS_PCH_SPLIT(dev_priv)) { 3297 intel_encoder->disable = pch_disable_sdvo; 3298 intel_encoder->post_disable = pch_post_disable_sdvo; 3299 } else { 3300 intel_encoder->disable = intel_disable_sdvo; 3301 } 3302 intel_encoder->pre_enable = intel_sdvo_pre_enable; 3303 intel_encoder->enable = intel_enable_sdvo; 3304 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 3305 intel_encoder->get_config = intel_sdvo_get_config; 3306 3307 /* In default case sdvo lvds is false */ 3308 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 3309 goto err; 3310 3311 if (intel_sdvo_output_setup(intel_sdvo, 3312 intel_sdvo->caps.output_flags) != true) { 3313 drm_dbg_kms(&dev_priv->drm, 3314 "SDVO output failed to setup on %s\n", 3315 SDVO_NAME(intel_sdvo)); 3316 /* Output_setup can leave behind connectors! */ 3317 goto err_output; 3318 } 3319 3320 /* 3321 * Only enable the hotplug irq if we need it, to work around noisy 3322 * hotplug lines. 3323 */ 3324 if (intel_sdvo->hotplug_active) { 3325 if (intel_sdvo->port == PORT_B) 3326 intel_encoder->hpd_pin = HPD_SDVO_B; 3327 else 3328 intel_encoder->hpd_pin = HPD_SDVO_C; 3329 } 3330 3331 /* 3332 * Cloning SDVO with anything is often impossible, since the SDVO 3333 * encoder can request a special input timing mode. And even if that's 3334 * not the case we have evidence that cloning a plain unscaled mode with 3335 * VGA doesn't really work. Furthermore the cloning flags are way too 3336 * simplistic anyway to express such constraints, so just give up on 3337 * cloning for SDVO encoders. 3338 */ 3339 intel_sdvo->base.cloneable = 0; 3340 3341 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo); 3342 3343 /* Set the input timing to the screen. Assume always input 0. */ 3344 if (!intel_sdvo_set_target_input(intel_sdvo)) 3345 goto err_output; 3346 3347 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 3348 &intel_sdvo->pixel_clock_min, 3349 &intel_sdvo->pixel_clock_max)) 3350 goto err_output; 3351 3352 drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, " 3353 "clock range %dMHz - %dMHz, " 3354 "input 1: %c, input 2: %c, " 3355 "output 1: %c, output 2: %c\n", 3356 SDVO_NAME(intel_sdvo), 3357 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 3358 intel_sdvo->caps.device_rev_id, 3359 intel_sdvo->pixel_clock_min / 1000, 3360 intel_sdvo->pixel_clock_max / 1000, 3361 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 3362 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 3363 /* check currently supported outputs */ 3364 intel_sdvo->caps.output_flags & 3365 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 3366 intel_sdvo->caps.output_flags & 3367 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 3368 return true; 3369 3370 err_output: 3371 intel_sdvo_output_cleanup(intel_sdvo); 3372 3373 err: 3374 drm_encoder_cleanup(&intel_encoder->base); 3375 i2c_del_adapter(&intel_sdvo->ddc); 3376 err_i2c_bus: 3377 intel_sdvo_unselect_i2c_bus(intel_sdvo); 3378 kfree(intel_sdvo); 3379 3380 return false; 3381 } 3382