1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 29 #include <linux/delay.h> 30 #include <linux/export.h> 31 #include <linux/i2c.h> 32 #include <linux/slab.h> 33 34 #include <drm/drm_atomic_helper.h> 35 #include <drm/drm_crtc.h> 36 #include <drm/drm_edid.h> 37 #include <drm/i915_drm.h> 38 39 #include "i915_drv.h" 40 #include "intel_atomic.h" 41 #include "intel_connector.h" 42 #include "intel_display_types.h" 43 #include "intel_fifo_underrun.h" 44 #include "intel_gmbus.h" 45 #include "intel_hdmi.h" 46 #include "intel_hotplug.h" 47 #include "intel_panel.h" 48 #include "intel_sdvo.h" 49 #include "intel_sdvo_regs.h" 50 51 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 52 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 53 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 54 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 55 56 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 57 SDVO_TV_MASK) 58 59 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 60 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 61 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 62 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 63 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 64 65 66 static const char * const tv_format_names[] = { 67 "NTSC_M" , "NTSC_J" , "NTSC_443", 68 "PAL_B" , "PAL_D" , "PAL_G" , 69 "PAL_H" , "PAL_I" , "PAL_M" , 70 "PAL_N" , "PAL_NC" , "PAL_60" , 71 "SECAM_B" , "SECAM_D" , "SECAM_G" , 72 "SECAM_K" , "SECAM_K1", "SECAM_L" , 73 "SECAM_60" 74 }; 75 76 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names) 77 78 struct intel_sdvo { 79 struct intel_encoder base; 80 81 struct i2c_adapter *i2c; 82 u8 slave_addr; 83 84 struct i2c_adapter ddc; 85 86 /* Register for the SDVO device: SDVOB or SDVOC */ 87 i915_reg_t sdvo_reg; 88 89 /* Active outputs controlled by this SDVO output */ 90 u16 controlled_output; 91 92 /* 93 * Capabilities of the SDVO device returned by 94 * intel_sdvo_get_capabilities() 95 */ 96 struct intel_sdvo_caps caps; 97 98 /* Pixel clock limitations reported by the SDVO device, in kHz */ 99 int pixel_clock_min, pixel_clock_max; 100 101 /* 102 * For multiple function SDVO device, 103 * this is for current attached outputs. 104 */ 105 u16 attached_output; 106 107 /* 108 * Hotplug activation bits for this device 109 */ 110 u16 hotplug_active; 111 112 enum port port; 113 114 bool has_hdmi_monitor; 115 bool has_hdmi_audio; 116 117 /* DDC bus used by this SDVO encoder */ 118 u8 ddc_bus; 119 120 /* 121 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd 122 */ 123 u8 dtd_sdvo_flags; 124 }; 125 126 struct intel_sdvo_connector { 127 struct intel_connector base; 128 129 /* Mark the type of connector */ 130 u16 output_flag; 131 132 /* This contains all current supported TV format */ 133 u8 tv_format_supported[TV_FORMAT_NUM]; 134 int format_supported_num; 135 struct drm_property *tv_format; 136 137 /* add the property for the SDVO-TV */ 138 struct drm_property *left; 139 struct drm_property *right; 140 struct drm_property *top; 141 struct drm_property *bottom; 142 struct drm_property *hpos; 143 struct drm_property *vpos; 144 struct drm_property *contrast; 145 struct drm_property *saturation; 146 struct drm_property *hue; 147 struct drm_property *sharpness; 148 struct drm_property *flicker_filter; 149 struct drm_property *flicker_filter_adaptive; 150 struct drm_property *flicker_filter_2d; 151 struct drm_property *tv_chroma_filter; 152 struct drm_property *tv_luma_filter; 153 struct drm_property *dot_crawl; 154 155 /* add the property for the SDVO-TV/LVDS */ 156 struct drm_property *brightness; 157 158 /* this is to get the range of margin.*/ 159 u32 max_hscan, max_vscan; 160 161 /** 162 * This is set if we treat the device as HDMI, instead of DVI. 163 */ 164 bool is_hdmi; 165 }; 166 167 struct intel_sdvo_connector_state { 168 /* base.base: tv.saturation/contrast/hue/brightness */ 169 struct intel_digital_connector_state base; 170 171 struct { 172 unsigned overscan_h, overscan_v, hpos, vpos, sharpness; 173 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive; 174 unsigned chroma_filter, luma_filter, dot_crawl; 175 } tv; 176 }; 177 178 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder) 179 { 180 return container_of(encoder, struct intel_sdvo, base); 181 } 182 183 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector) 184 { 185 return to_sdvo(intel_attached_encoder(connector)); 186 } 187 188 static struct intel_sdvo_connector * 189 to_intel_sdvo_connector(struct drm_connector *connector) 190 { 191 return container_of(connector, struct intel_sdvo_connector, base.base); 192 } 193 194 #define to_intel_sdvo_connector_state(conn_state) \ 195 container_of((conn_state), struct intel_sdvo_connector_state, base.base) 196 197 static bool 198 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags); 199 static bool 200 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 201 struct intel_sdvo_connector *intel_sdvo_connector, 202 int type); 203 static bool 204 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 205 struct intel_sdvo_connector *intel_sdvo_connector); 206 207 /* 208 * Writes the SDVOB or SDVOC with the given value, but always writes both 209 * SDVOB and SDVOC to work around apparent hardware issues (according to 210 * comments in the BIOS). 211 */ 212 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 213 { 214 struct drm_device *dev = intel_sdvo->base.base.dev; 215 struct drm_i915_private *dev_priv = to_i915(dev); 216 u32 bval = val, cval = val; 217 int i; 218 219 if (HAS_PCH_SPLIT(dev_priv)) { 220 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val); 221 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg); 222 /* 223 * HW workaround, need to write this twice for issue 224 * that may result in first write getting masked. 225 */ 226 if (HAS_PCH_IBX(dev_priv)) { 227 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val); 228 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg); 229 } 230 return; 231 } 232 233 if (intel_sdvo->port == PORT_B) 234 cval = intel_de_read(dev_priv, GEN3_SDVOC); 235 else 236 bval = intel_de_read(dev_priv, GEN3_SDVOB); 237 238 /* 239 * Write the registers twice for luck. Sometimes, 240 * writing them only once doesn't appear to 'stick'. 241 * The BIOS does this too. Yay, magic 242 */ 243 for (i = 0; i < 2; i++) { 244 intel_de_write(dev_priv, GEN3_SDVOB, bval); 245 intel_de_posting_read(dev_priv, GEN3_SDVOB); 246 247 intel_de_write(dev_priv, GEN3_SDVOC, cval); 248 intel_de_posting_read(dev_priv, GEN3_SDVOC); 249 } 250 } 251 252 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 253 { 254 struct i2c_msg msgs[] = { 255 { 256 .addr = intel_sdvo->slave_addr, 257 .flags = 0, 258 .len = 1, 259 .buf = &addr, 260 }, 261 { 262 .addr = intel_sdvo->slave_addr, 263 .flags = I2C_M_RD, 264 .len = 1, 265 .buf = ch, 266 } 267 }; 268 int ret; 269 270 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2) 271 return true; 272 273 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 274 return false; 275 } 276 277 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ } 278 279 /** Mapping of command numbers to names, for debug output */ 280 static const struct { 281 u8 cmd; 282 const char *name; 283 } __attribute__ ((packed)) sdvo_cmd_names[] = { 284 SDVO_CMD_NAME_ENTRY(RESET), 285 SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS), 286 SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV), 287 SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS), 288 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS), 289 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS), 290 SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP), 291 SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP), 292 SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS), 293 SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT), 294 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG), 295 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG), 296 SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE), 297 SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT), 298 SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT), 299 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1), 300 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2), 301 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1), 302 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2), 303 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1), 304 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2), 305 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1), 306 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2), 307 SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING), 308 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1), 309 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2), 310 SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE), 311 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE), 312 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS), 313 SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT), 314 SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT), 315 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS), 316 SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT), 317 SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT), 318 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES), 319 SDVO_CMD_NAME_ENTRY(GET_POWER_STATE), 320 SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE), 321 SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE), 322 SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH), 323 SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT), 324 SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT), 325 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS), 326 327 /* Add the op code for SDVO enhancements */ 328 SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS), 329 SDVO_CMD_NAME_ENTRY(GET_HPOS), 330 SDVO_CMD_NAME_ENTRY(SET_HPOS), 331 SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS), 332 SDVO_CMD_NAME_ENTRY(GET_VPOS), 333 SDVO_CMD_NAME_ENTRY(SET_VPOS), 334 SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION), 335 SDVO_CMD_NAME_ENTRY(GET_SATURATION), 336 SDVO_CMD_NAME_ENTRY(SET_SATURATION), 337 SDVO_CMD_NAME_ENTRY(GET_MAX_HUE), 338 SDVO_CMD_NAME_ENTRY(GET_HUE), 339 SDVO_CMD_NAME_ENTRY(SET_HUE), 340 SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST), 341 SDVO_CMD_NAME_ENTRY(GET_CONTRAST), 342 SDVO_CMD_NAME_ENTRY(SET_CONTRAST), 343 SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS), 344 SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS), 345 SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS), 346 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H), 347 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H), 348 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H), 349 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V), 350 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V), 351 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V), 352 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER), 353 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER), 354 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER), 355 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE), 356 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE), 357 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE), 358 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D), 359 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D), 360 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D), 361 SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS), 362 SDVO_CMD_NAME_ENTRY(GET_SHARPNESS), 363 SDVO_CMD_NAME_ENTRY(SET_SHARPNESS), 364 SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL), 365 SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL), 366 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER), 367 SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER), 368 SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER), 369 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER), 370 SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER), 371 SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER), 372 373 /* HDMI op code */ 374 SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE), 375 SDVO_CMD_NAME_ENTRY(GET_ENCODE), 376 SDVO_CMD_NAME_ENTRY(SET_ENCODE), 377 SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI), 378 SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI), 379 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP), 380 SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY), 381 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY), 382 SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER), 383 SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT), 384 SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT), 385 SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX), 386 SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX), 387 SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO), 388 SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT), 389 SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT), 390 SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE), 391 SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE), 392 SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA), 393 SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA), 394 }; 395 396 #undef SDVO_CMD_NAME_ENTRY 397 398 static const char *sdvo_cmd_name(u8 cmd) 399 { 400 int i; 401 402 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 403 if (cmd == sdvo_cmd_names[i].cmd) 404 return sdvo_cmd_names[i].name; 405 } 406 407 return NULL; 408 } 409 410 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC") 411 412 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 413 const void *args, int args_len) 414 { 415 const char *cmd_name; 416 int i, pos = 0; 417 char buffer[64]; 418 419 #define BUF_PRINT(args...) \ 420 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args) 421 422 for (i = 0; i < args_len; i++) { 423 BUF_PRINT("%02X ", ((u8 *)args)[i]); 424 } 425 for (; i < 8; i++) { 426 BUF_PRINT(" "); 427 } 428 429 cmd_name = sdvo_cmd_name(cmd); 430 if (cmd_name) 431 BUF_PRINT("(%s)", cmd_name); 432 else 433 BUF_PRINT("(%02X)", cmd); 434 435 WARN_ON(pos >= sizeof(buffer) - 1); 436 #undef BUF_PRINT 437 438 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer); 439 } 440 441 static const char * const cmd_status_names[] = { 442 [SDVO_CMD_STATUS_POWER_ON] = "Power on", 443 [SDVO_CMD_STATUS_SUCCESS] = "Success", 444 [SDVO_CMD_STATUS_NOTSUPP] = "Not supported", 445 [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg", 446 [SDVO_CMD_STATUS_PENDING] = "Pending", 447 [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified", 448 [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported", 449 }; 450 451 static const char *sdvo_cmd_status(u8 status) 452 { 453 if (status < ARRAY_SIZE(cmd_status_names)) 454 return cmd_status_names[status]; 455 else 456 return NULL; 457 } 458 459 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 460 const void *args, int args_len, 461 bool unlocked) 462 { 463 u8 *buf, status; 464 struct i2c_msg *msgs; 465 int i, ret = true; 466 467 /* Would be simpler to allocate both in one go ? */ 468 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL); 469 if (!buf) 470 return false; 471 472 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL); 473 if (!msgs) { 474 kfree(buf); 475 return false; 476 } 477 478 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 479 480 for (i = 0; i < args_len; i++) { 481 msgs[i].addr = intel_sdvo->slave_addr; 482 msgs[i].flags = 0; 483 msgs[i].len = 2; 484 msgs[i].buf = buf + 2 *i; 485 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 486 buf[2*i + 1] = ((u8*)args)[i]; 487 } 488 msgs[i].addr = intel_sdvo->slave_addr; 489 msgs[i].flags = 0; 490 msgs[i].len = 2; 491 msgs[i].buf = buf + 2*i; 492 buf[2*i + 0] = SDVO_I2C_OPCODE; 493 buf[2*i + 1] = cmd; 494 495 /* the following two are to read the response */ 496 status = SDVO_I2C_CMD_STATUS; 497 msgs[i+1].addr = intel_sdvo->slave_addr; 498 msgs[i+1].flags = 0; 499 msgs[i+1].len = 1; 500 msgs[i+1].buf = &status; 501 502 msgs[i+2].addr = intel_sdvo->slave_addr; 503 msgs[i+2].flags = I2C_M_RD; 504 msgs[i+2].len = 1; 505 msgs[i+2].buf = &status; 506 507 if (unlocked) 508 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3); 509 else 510 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3); 511 if (ret < 0) { 512 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 513 ret = false; 514 goto out; 515 } 516 if (ret != i+3) { 517 /* failure in I2C transfer */ 518 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 519 ret = false; 520 } 521 522 out: 523 kfree(msgs); 524 kfree(buf); 525 return ret; 526 } 527 528 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, 529 const void *args, int args_len) 530 { 531 return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true); 532 } 533 534 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, 535 void *response, int response_len) 536 { 537 const char *cmd_status; 538 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */ 539 u8 status; 540 int i, pos = 0; 541 char buffer[64]; 542 543 buffer[0] = '\0'; 544 545 /* 546 * The documentation states that all commands will be 547 * processed within 15µs, and that we need only poll 548 * the status byte a maximum of 3 times in order for the 549 * command to be complete. 550 * 551 * Check 5 times in case the hardware failed to read the docs. 552 * 553 * Also beware that the first response by many devices is to 554 * reply PENDING and stall for time. TVs are notorious for 555 * requiring longer than specified to complete their replies. 556 * Originally (in the DDX long ago), the delay was only ever 15ms 557 * with an additional delay of 30ms applied for TVs added later after 558 * many experiments. To accommodate both sets of delays, we do a 559 * sequence of slow checks if the device is falling behind and fails 560 * to reply within 5*15µs. 561 */ 562 if (!intel_sdvo_read_byte(intel_sdvo, 563 SDVO_I2C_CMD_STATUS, 564 &status)) 565 goto log_fail; 566 567 while ((status == SDVO_CMD_STATUS_PENDING || 568 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) { 569 if (retry < 10) 570 msleep(15); 571 else 572 udelay(15); 573 574 if (!intel_sdvo_read_byte(intel_sdvo, 575 SDVO_I2C_CMD_STATUS, 576 &status)) 577 goto log_fail; 578 } 579 580 #define BUF_PRINT(args...) \ 581 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args) 582 583 cmd_status = sdvo_cmd_status(status); 584 if (cmd_status) 585 BUF_PRINT("(%s)", cmd_status); 586 else 587 BUF_PRINT("(??? %d)", status); 588 589 if (status != SDVO_CMD_STATUS_SUCCESS) 590 goto log_fail; 591 592 /* Read the command response */ 593 for (i = 0; i < response_len; i++) { 594 if (!intel_sdvo_read_byte(intel_sdvo, 595 SDVO_I2C_RETURN_0 + i, 596 &((u8 *)response)[i])) 597 goto log_fail; 598 BUF_PRINT(" %02X", ((u8 *)response)[i]); 599 } 600 601 WARN_ON(pos >= sizeof(buffer) - 1); 602 #undef BUF_PRINT 603 604 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer); 605 return true; 606 607 log_fail: 608 DRM_DEBUG_KMS("%s: R: ... failed %s\n", 609 SDVO_NAME(intel_sdvo), buffer); 610 return false; 611 } 612 613 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode) 614 { 615 if (adjusted_mode->crtc_clock >= 100000) 616 return 1; 617 else if (adjusted_mode->crtc_clock >= 50000) 618 return 2; 619 else 620 return 4; 621 } 622 623 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 624 u8 ddc_bus) 625 { 626 /* This must be the immediately preceding write before the i2c xfer */ 627 return __intel_sdvo_write_cmd(intel_sdvo, 628 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 629 &ddc_bus, 1, false); 630 } 631 632 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 633 { 634 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 635 return false; 636 637 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 638 } 639 640 static bool 641 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 642 { 643 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 644 return false; 645 646 return intel_sdvo_read_response(intel_sdvo, value, len); 647 } 648 649 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 650 { 651 struct intel_sdvo_set_target_input_args targets = {0}; 652 return intel_sdvo_set_value(intel_sdvo, 653 SDVO_CMD_SET_TARGET_INPUT, 654 &targets, sizeof(targets)); 655 } 656 657 /* 658 * Return whether each input is trained. 659 * 660 * This function is making an assumption about the layout of the response, 661 * which should be checked against the docs. 662 */ 663 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 664 { 665 struct intel_sdvo_get_trained_inputs_response response; 666 667 BUILD_BUG_ON(sizeof(response) != 1); 668 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 669 &response, sizeof(response))) 670 return false; 671 672 *input_1 = response.input0_trained; 673 *input_2 = response.input1_trained; 674 return true; 675 } 676 677 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 678 u16 outputs) 679 { 680 return intel_sdvo_set_value(intel_sdvo, 681 SDVO_CMD_SET_ACTIVE_OUTPUTS, 682 &outputs, sizeof(outputs)); 683 } 684 685 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, 686 u16 *outputs) 687 { 688 return intel_sdvo_get_value(intel_sdvo, 689 SDVO_CMD_GET_ACTIVE_OUTPUTS, 690 outputs, sizeof(*outputs)); 691 } 692 693 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 694 int mode) 695 { 696 u8 state = SDVO_ENCODER_STATE_ON; 697 698 switch (mode) { 699 case DRM_MODE_DPMS_ON: 700 state = SDVO_ENCODER_STATE_ON; 701 break; 702 case DRM_MODE_DPMS_STANDBY: 703 state = SDVO_ENCODER_STATE_STANDBY; 704 break; 705 case DRM_MODE_DPMS_SUSPEND: 706 state = SDVO_ENCODER_STATE_SUSPEND; 707 break; 708 case DRM_MODE_DPMS_OFF: 709 state = SDVO_ENCODER_STATE_OFF; 710 break; 711 } 712 713 return intel_sdvo_set_value(intel_sdvo, 714 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 715 } 716 717 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 718 int *clock_min, 719 int *clock_max) 720 { 721 struct intel_sdvo_pixel_clock_range clocks; 722 723 BUILD_BUG_ON(sizeof(clocks) != 4); 724 if (!intel_sdvo_get_value(intel_sdvo, 725 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 726 &clocks, sizeof(clocks))) 727 return false; 728 729 /* Convert the values from units of 10 kHz to kHz. */ 730 *clock_min = clocks.min * 10; 731 *clock_max = clocks.max * 10; 732 return true; 733 } 734 735 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 736 u16 outputs) 737 { 738 return intel_sdvo_set_value(intel_sdvo, 739 SDVO_CMD_SET_TARGET_OUTPUT, 740 &outputs, sizeof(outputs)); 741 } 742 743 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 744 struct intel_sdvo_dtd *dtd) 745 { 746 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 747 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 748 } 749 750 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 751 struct intel_sdvo_dtd *dtd) 752 { 753 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 754 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 755 } 756 757 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 758 struct intel_sdvo_dtd *dtd) 759 { 760 return intel_sdvo_set_timing(intel_sdvo, 761 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 762 } 763 764 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 765 struct intel_sdvo_dtd *dtd) 766 { 767 return intel_sdvo_set_timing(intel_sdvo, 768 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 769 } 770 771 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo, 772 struct intel_sdvo_dtd *dtd) 773 { 774 return intel_sdvo_get_timing(intel_sdvo, 775 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); 776 } 777 778 static bool 779 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 780 struct intel_sdvo_connector *intel_sdvo_connector, 781 u16 clock, 782 u16 width, 783 u16 height) 784 { 785 struct intel_sdvo_preferred_input_timing_args args; 786 787 memset(&args, 0, sizeof(args)); 788 args.clock = clock; 789 args.width = width; 790 args.height = height; 791 args.interlace = 0; 792 793 if (IS_LVDS(intel_sdvo_connector)) { 794 const struct drm_display_mode *fixed_mode = 795 intel_sdvo_connector->base.panel.fixed_mode; 796 797 if (fixed_mode->hdisplay != width || 798 fixed_mode->vdisplay != height) 799 args.scaled = 1; 800 } 801 802 return intel_sdvo_set_value(intel_sdvo, 803 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 804 &args, sizeof(args)); 805 } 806 807 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 808 struct intel_sdvo_dtd *dtd) 809 { 810 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 811 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 812 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 813 &dtd->part1, sizeof(dtd->part1)) && 814 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 815 &dtd->part2, sizeof(dtd->part2)); 816 } 817 818 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 819 { 820 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 821 } 822 823 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 824 const struct drm_display_mode *mode) 825 { 826 u16 width, height; 827 u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len; 828 u16 h_sync_offset, v_sync_offset; 829 int mode_clock; 830 831 memset(dtd, 0, sizeof(*dtd)); 832 833 width = mode->hdisplay; 834 height = mode->vdisplay; 835 836 /* do some mode translations */ 837 h_blank_len = mode->htotal - mode->hdisplay; 838 h_sync_len = mode->hsync_end - mode->hsync_start; 839 840 v_blank_len = mode->vtotal - mode->vdisplay; 841 v_sync_len = mode->vsync_end - mode->vsync_start; 842 843 h_sync_offset = mode->hsync_start - mode->hdisplay; 844 v_sync_offset = mode->vsync_start - mode->vdisplay; 845 846 mode_clock = mode->clock; 847 mode_clock /= 10; 848 dtd->part1.clock = mode_clock; 849 850 dtd->part1.h_active = width & 0xff; 851 dtd->part1.h_blank = h_blank_len & 0xff; 852 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 853 ((h_blank_len >> 8) & 0xf); 854 dtd->part1.v_active = height & 0xff; 855 dtd->part1.v_blank = v_blank_len & 0xff; 856 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 857 ((v_blank_len >> 8) & 0xf); 858 859 dtd->part2.h_sync_off = h_sync_offset & 0xff; 860 dtd->part2.h_sync_width = h_sync_len & 0xff; 861 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 862 (v_sync_len & 0xf); 863 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 864 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 865 ((v_sync_len & 0x30) >> 4); 866 867 dtd->part2.dtd_flags = 0x18; 868 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 869 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE; 870 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 871 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE; 872 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 873 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE; 874 875 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 876 } 877 878 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode, 879 const struct intel_sdvo_dtd *dtd) 880 { 881 struct drm_display_mode mode = {}; 882 883 mode.hdisplay = dtd->part1.h_active; 884 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 885 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; 886 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 887 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; 888 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 889 mode.htotal = mode.hdisplay + dtd->part1.h_blank; 890 mode.htotal += (dtd->part1.h_high & 0xf) << 8; 891 892 mode.vdisplay = dtd->part1.v_active; 893 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 894 mode.vsync_start = mode.vdisplay; 895 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 896 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 897 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; 898 mode.vsync_end = mode.vsync_start + 899 (dtd->part2.v_sync_off_width & 0xf); 900 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 901 mode.vtotal = mode.vdisplay + dtd->part1.v_blank; 902 mode.vtotal += (dtd->part1.v_high & 0xf) << 8; 903 904 mode.clock = dtd->part1.clock * 10; 905 906 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE) 907 mode.flags |= DRM_MODE_FLAG_INTERLACE; 908 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 909 mode.flags |= DRM_MODE_FLAG_PHSYNC; 910 else 911 mode.flags |= DRM_MODE_FLAG_NHSYNC; 912 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 913 mode.flags |= DRM_MODE_FLAG_PVSYNC; 914 else 915 mode.flags |= DRM_MODE_FLAG_NVSYNC; 916 917 drm_mode_set_crtcinfo(&mode, 0); 918 919 drm_mode_copy(pmode, &mode); 920 } 921 922 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 923 { 924 struct intel_sdvo_encode encode; 925 926 BUILD_BUG_ON(sizeof(encode) != 2); 927 return intel_sdvo_get_value(intel_sdvo, 928 SDVO_CMD_GET_SUPP_ENCODE, 929 &encode, sizeof(encode)); 930 } 931 932 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 933 u8 mode) 934 { 935 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 936 } 937 938 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 939 u8 mode) 940 { 941 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 942 } 943 944 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo, 945 u8 audio_state) 946 { 947 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT, 948 &audio_state, 1); 949 } 950 951 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo, 952 u8 *hbuf_size) 953 { 954 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, 955 hbuf_size, 1)) 956 return false; 957 958 /* Buffer size is 0 based, hooray! However zero means zero. */ 959 if (*hbuf_size) 960 (*hbuf_size)++; 961 962 return true; 963 } 964 965 #if 0 966 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 967 { 968 int i, j; 969 u8 set_buf_index[2]; 970 u8 av_split; 971 u8 buf_size; 972 u8 buf[48]; 973 u8 *pos; 974 975 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 976 977 for (i = 0; i <= av_split; i++) { 978 set_buf_index[0] = i; set_buf_index[1] = 0; 979 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 980 set_buf_index, 2); 981 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 982 intel_sdvo_read_response(encoder, &buf_size, 1); 983 984 pos = buf; 985 for (j = 0; j <= buf_size; j += 8) { 986 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 987 NULL, 0); 988 intel_sdvo_read_response(encoder, pos, 8); 989 pos += 8; 990 } 991 } 992 } 993 #endif 994 995 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, 996 unsigned int if_index, u8 tx_rate, 997 const u8 *data, unsigned int length) 998 { 999 u8 set_buf_index[2] = { if_index, 0 }; 1000 u8 hbuf_size, tmp[8]; 1001 int i; 1002 1003 if (!intel_sdvo_set_value(intel_sdvo, 1004 SDVO_CMD_SET_HBUF_INDEX, 1005 set_buf_index, 2)) 1006 return false; 1007 1008 if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size)) 1009 return false; 1010 1011 DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n", 1012 if_index, length, hbuf_size); 1013 1014 if (hbuf_size < length) 1015 return false; 1016 1017 for (i = 0; i < hbuf_size; i += 8) { 1018 memset(tmp, 0, 8); 1019 if (i < length) 1020 memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); 1021 1022 if (!intel_sdvo_set_value(intel_sdvo, 1023 SDVO_CMD_SET_HBUF_DATA, 1024 tmp, 8)) 1025 return false; 1026 } 1027 1028 return intel_sdvo_set_value(intel_sdvo, 1029 SDVO_CMD_SET_HBUF_TXRATE, 1030 &tx_rate, 1); 1031 } 1032 1033 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo, 1034 unsigned int if_index, 1035 u8 *data, unsigned int length) 1036 { 1037 u8 set_buf_index[2] = { if_index, 0 }; 1038 u8 hbuf_size, tx_rate, av_split; 1039 int i; 1040 1041 if (!intel_sdvo_get_value(intel_sdvo, 1042 SDVO_CMD_GET_HBUF_AV_SPLIT, 1043 &av_split, 1)) 1044 return -ENXIO; 1045 1046 if (av_split < if_index) 1047 return 0; 1048 1049 if (!intel_sdvo_set_value(intel_sdvo, 1050 SDVO_CMD_SET_HBUF_INDEX, 1051 set_buf_index, 2)) 1052 return -ENXIO; 1053 1054 if (!intel_sdvo_get_value(intel_sdvo, 1055 SDVO_CMD_GET_HBUF_TXRATE, 1056 &tx_rate, 1)) 1057 return -ENXIO; 1058 1059 if (tx_rate == SDVO_HBUF_TX_DISABLED) 1060 return 0; 1061 1062 if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size)) 1063 return false; 1064 1065 DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n", 1066 if_index, length, hbuf_size); 1067 1068 hbuf_size = min_t(unsigned int, length, hbuf_size); 1069 1070 for (i = 0; i < hbuf_size; i += 8) { 1071 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0)) 1072 return -ENXIO; 1073 if (!intel_sdvo_read_response(intel_sdvo, &data[i], 1074 min_t(unsigned int, 8, hbuf_size - i))) 1075 return -ENXIO; 1076 } 1077 1078 return hbuf_size; 1079 } 1080 1081 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo, 1082 struct intel_crtc_state *crtc_state, 1083 struct drm_connector_state *conn_state) 1084 { 1085 struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi; 1086 const struct drm_display_mode *adjusted_mode = 1087 &crtc_state->hw.adjusted_mode; 1088 int ret; 1089 1090 if (!crtc_state->has_hdmi_sink) 1091 return true; 1092 1093 crtc_state->infoframes.enable |= 1094 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); 1095 1096 ret = drm_hdmi_avi_infoframe_from_display_mode(frame, 1097 conn_state->connector, 1098 adjusted_mode); 1099 if (ret) 1100 return false; 1101 1102 drm_hdmi_avi_infoframe_quant_range(frame, 1103 conn_state->connector, 1104 adjusted_mode, 1105 crtc_state->limited_color_range ? 1106 HDMI_QUANTIZATION_RANGE_LIMITED : 1107 HDMI_QUANTIZATION_RANGE_FULL); 1108 1109 ret = hdmi_avi_infoframe_check(frame); 1110 if (WARN_ON(ret)) 1111 return false; 1112 1113 return true; 1114 } 1115 1116 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, 1117 const struct intel_crtc_state *crtc_state) 1118 { 1119 u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 1120 const union hdmi_infoframe *frame = &crtc_state->infoframes.avi; 1121 ssize_t len; 1122 1123 if ((crtc_state->infoframes.enable & 1124 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0) 1125 return true; 1126 1127 if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI)) 1128 return false; 1129 1130 len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data)); 1131 if (WARN_ON(len < 0)) 1132 return false; 1133 1134 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1135 SDVO_HBUF_TX_VSYNC, 1136 sdvo_data, len); 1137 } 1138 1139 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo, 1140 struct intel_crtc_state *crtc_state) 1141 { 1142 u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)]; 1143 union hdmi_infoframe *frame = &crtc_state->infoframes.avi; 1144 ssize_t len; 1145 int ret; 1146 1147 if (!crtc_state->has_hdmi_sink) 1148 return; 1149 1150 len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, 1151 sdvo_data, sizeof(sdvo_data)); 1152 if (len < 0) { 1153 DRM_DEBUG_KMS("failed to read AVI infoframe\n"); 1154 return; 1155 } else if (len == 0) { 1156 return; 1157 } 1158 1159 crtc_state->infoframes.enable |= 1160 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); 1161 1162 ret = hdmi_infoframe_unpack(frame, sdvo_data, len); 1163 if (ret) { 1164 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n"); 1165 return; 1166 } 1167 1168 if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI) 1169 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n", 1170 frame->any.type, HDMI_INFOFRAME_TYPE_AVI); 1171 } 1172 1173 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo, 1174 const struct drm_connector_state *conn_state) 1175 { 1176 struct intel_sdvo_tv_format format; 1177 u32 format_map; 1178 1179 format_map = 1 << conn_state->tv.mode; 1180 memset(&format, 0, sizeof(format)); 1181 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 1182 1183 BUILD_BUG_ON(sizeof(format) != 6); 1184 return intel_sdvo_set_value(intel_sdvo, 1185 SDVO_CMD_SET_TV_FORMAT, 1186 &format, sizeof(format)); 1187 } 1188 1189 static bool 1190 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 1191 const struct drm_display_mode *mode) 1192 { 1193 struct intel_sdvo_dtd output_dtd; 1194 1195 if (!intel_sdvo_set_target_output(intel_sdvo, 1196 intel_sdvo->attached_output)) 1197 return false; 1198 1199 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1200 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1201 return false; 1202 1203 return true; 1204 } 1205 1206 /* 1207 * Asks the sdvo controller for the preferred input mode given the output mode. 1208 * Unfortunately we have to set up the full output mode to do that. 1209 */ 1210 static bool 1211 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo, 1212 struct intel_sdvo_connector *intel_sdvo_connector, 1213 const struct drm_display_mode *mode, 1214 struct drm_display_mode *adjusted_mode) 1215 { 1216 struct intel_sdvo_dtd input_dtd; 1217 1218 /* Reset the input timing to the screen. Assume always input 0. */ 1219 if (!intel_sdvo_set_target_input(intel_sdvo)) 1220 return false; 1221 1222 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 1223 intel_sdvo_connector, 1224 mode->clock / 10, 1225 mode->hdisplay, 1226 mode->vdisplay)) 1227 return false; 1228 1229 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 1230 &input_dtd)) 1231 return false; 1232 1233 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1234 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags; 1235 1236 return true; 1237 } 1238 1239 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) 1240 { 1241 unsigned dotclock = pipe_config->port_clock; 1242 struct dpll *clock = &pipe_config->dpll; 1243 1244 /* 1245 * SDVO TV has fixed PLL values depend on its clock range, 1246 * this mirrors vbios setting. 1247 */ 1248 if (dotclock >= 100000 && dotclock < 140500) { 1249 clock->p1 = 2; 1250 clock->p2 = 10; 1251 clock->n = 3; 1252 clock->m1 = 16; 1253 clock->m2 = 8; 1254 } else if (dotclock >= 140500 && dotclock <= 200000) { 1255 clock->p1 = 1; 1256 clock->p2 = 10; 1257 clock->n = 6; 1258 clock->m1 = 12; 1259 clock->m2 = 8; 1260 } else { 1261 WARN(1, "SDVO TV clock out of range: %i\n", dotclock); 1262 } 1263 1264 pipe_config->clock_set = true; 1265 } 1266 1267 static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo, 1268 const struct drm_connector_state *conn_state) 1269 { 1270 return sdvo->has_hdmi_monitor && 1271 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI; 1272 } 1273 1274 static int intel_sdvo_compute_config(struct intel_encoder *encoder, 1275 struct intel_crtc_state *pipe_config, 1276 struct drm_connector_state *conn_state) 1277 { 1278 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1279 struct intel_sdvo_connector_state *intel_sdvo_state = 1280 to_intel_sdvo_connector_state(conn_state); 1281 struct intel_sdvo_connector *intel_sdvo_connector = 1282 to_intel_sdvo_connector(conn_state->connector); 1283 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 1284 struct drm_display_mode *mode = &pipe_config->hw.mode; 1285 1286 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n"); 1287 pipe_config->pipe_bpp = 8*3; 1288 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 1289 1290 if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) 1291 pipe_config->has_pch_encoder = true; 1292 1293 /* 1294 * We need to construct preferred input timings based on our 1295 * output timings. To do that, we have to set the output 1296 * timings, even though this isn't really the right place in 1297 * the sequence to do it. Oh well. 1298 */ 1299 if (IS_TV(intel_sdvo_connector)) { 1300 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 1301 return -EINVAL; 1302 1303 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1304 intel_sdvo_connector, 1305 mode, 1306 adjusted_mode); 1307 pipe_config->sdvo_tv_clock = true; 1308 } else if (IS_LVDS(intel_sdvo_connector)) { 1309 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 1310 intel_sdvo_connector->base.panel.fixed_mode)) 1311 return -EINVAL; 1312 1313 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo, 1314 intel_sdvo_connector, 1315 mode, 1316 adjusted_mode); 1317 } 1318 1319 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) 1320 return -EINVAL; 1321 1322 /* 1323 * Make the CRTC code factor in the SDVO pixel multiplier. The 1324 * SDVO device will factor out the multiplier during mode_set. 1325 */ 1326 pipe_config->pixel_multiplier = 1327 intel_sdvo_get_pixel_multiplier(adjusted_mode); 1328 1329 pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state); 1330 1331 if (pipe_config->has_hdmi_sink) { 1332 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO) 1333 pipe_config->has_audio = intel_sdvo->has_hdmi_audio; 1334 else 1335 pipe_config->has_audio = 1336 intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON; 1337 } 1338 1339 if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) { 1340 /* 1341 * See CEA-861-E - 5.1 Default Encoding Parameters 1342 * 1343 * FIXME: This bit is only valid when using TMDS encoding and 8 1344 * bit per color mode. 1345 */ 1346 if (pipe_config->has_hdmi_sink && 1347 drm_match_cea_mode(adjusted_mode) > 1) 1348 pipe_config->limited_color_range = true; 1349 } else { 1350 if (pipe_config->has_hdmi_sink && 1351 intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED) 1352 pipe_config->limited_color_range = true; 1353 } 1354 1355 /* Clock computation needs to happen after pixel multiplier. */ 1356 if (IS_TV(intel_sdvo_connector)) 1357 i9xx_adjust_sdvo_tv_clock(pipe_config); 1358 1359 if (conn_state->picture_aspect_ratio) 1360 adjusted_mode->picture_aspect_ratio = 1361 conn_state->picture_aspect_ratio; 1362 1363 if (!intel_sdvo_compute_avi_infoframe(intel_sdvo, 1364 pipe_config, conn_state)) { 1365 DRM_DEBUG_KMS("bad AVI infoframe\n"); 1366 return -EINVAL; 1367 } 1368 1369 return 0; 1370 } 1371 1372 #define UPDATE_PROPERTY(input, NAME) \ 1373 do { \ 1374 val = input; \ 1375 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \ 1376 } while (0) 1377 1378 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo, 1379 const struct intel_sdvo_connector_state *sdvo_state) 1380 { 1381 const struct drm_connector_state *conn_state = &sdvo_state->base.base; 1382 struct intel_sdvo_connector *intel_sdvo_conn = 1383 to_intel_sdvo_connector(conn_state->connector); 1384 u16 val; 1385 1386 if (intel_sdvo_conn->left) 1387 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H); 1388 1389 if (intel_sdvo_conn->top) 1390 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V); 1391 1392 if (intel_sdvo_conn->hpos) 1393 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS); 1394 1395 if (intel_sdvo_conn->vpos) 1396 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS); 1397 1398 if (intel_sdvo_conn->saturation) 1399 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION); 1400 1401 if (intel_sdvo_conn->contrast) 1402 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST); 1403 1404 if (intel_sdvo_conn->hue) 1405 UPDATE_PROPERTY(conn_state->tv.hue, HUE); 1406 1407 if (intel_sdvo_conn->brightness) 1408 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS); 1409 1410 if (intel_sdvo_conn->sharpness) 1411 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS); 1412 1413 if (intel_sdvo_conn->flicker_filter) 1414 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER); 1415 1416 if (intel_sdvo_conn->flicker_filter_2d) 1417 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D); 1418 1419 if (intel_sdvo_conn->flicker_filter_adaptive) 1420 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 1421 1422 if (intel_sdvo_conn->tv_chroma_filter) 1423 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER); 1424 1425 if (intel_sdvo_conn->tv_luma_filter) 1426 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER); 1427 1428 if (intel_sdvo_conn->dot_crawl) 1429 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL); 1430 1431 #undef UPDATE_PROPERTY 1432 } 1433 1434 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, 1435 const struct intel_crtc_state *crtc_state, 1436 const struct drm_connector_state *conn_state) 1437 { 1438 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); 1439 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 1440 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 1441 const struct intel_sdvo_connector_state *sdvo_state = 1442 to_intel_sdvo_connector_state(conn_state); 1443 const struct intel_sdvo_connector *intel_sdvo_connector = 1444 to_intel_sdvo_connector(conn_state->connector); 1445 const struct drm_display_mode *mode = &crtc_state->hw.mode; 1446 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder); 1447 u32 sdvox; 1448 struct intel_sdvo_in_out_map in_out; 1449 struct intel_sdvo_dtd input_dtd, output_dtd; 1450 int rate; 1451 1452 intel_sdvo_update_props(intel_sdvo, sdvo_state); 1453 1454 /* 1455 * First, set the input mapping for the first input to our controlled 1456 * output. This is only correct if we're a single-input device, in 1457 * which case the first input is the output from the appropriate SDVO 1458 * channel on the motherboard. In a two-input device, the first input 1459 * will be SDVOB and the second SDVOC. 1460 */ 1461 in_out.in0 = intel_sdvo->attached_output; 1462 in_out.in1 = 0; 1463 1464 intel_sdvo_set_value(intel_sdvo, 1465 SDVO_CMD_SET_IN_OUT_MAP, 1466 &in_out, sizeof(in_out)); 1467 1468 /* Set the output timings to the screen */ 1469 if (!intel_sdvo_set_target_output(intel_sdvo, 1470 intel_sdvo->attached_output)) 1471 return; 1472 1473 /* lvds has a special fixed output timing. */ 1474 if (IS_LVDS(intel_sdvo_connector)) 1475 intel_sdvo_get_dtd_from_mode(&output_dtd, 1476 intel_sdvo_connector->base.panel.fixed_mode); 1477 else 1478 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1479 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 1480 drm_info(&dev_priv->drm, 1481 "Setting output timings on %s failed\n", 1482 SDVO_NAME(intel_sdvo)); 1483 1484 /* Set the input timing to the screen. Assume always input 0. */ 1485 if (!intel_sdvo_set_target_input(intel_sdvo)) 1486 return; 1487 1488 if (crtc_state->has_hdmi_sink) { 1489 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1490 intel_sdvo_set_colorimetry(intel_sdvo, 1491 SDVO_COLORIMETRY_RGB256); 1492 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state); 1493 } else 1494 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1495 1496 if (IS_TV(intel_sdvo_connector) && 1497 !intel_sdvo_set_tv_format(intel_sdvo, conn_state)) 1498 return; 1499 1500 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1501 1502 if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector)) 1503 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags; 1504 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd)) 1505 drm_info(&dev_priv->drm, 1506 "Setting input timings on %s failed\n", 1507 SDVO_NAME(intel_sdvo)); 1508 1509 switch (crtc_state->pixel_multiplier) { 1510 default: 1511 drm_WARN(&dev_priv->drm, 1, 1512 "unknown pixel multiplier specified\n"); 1513 /* fall through */ 1514 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1515 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1516 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1517 } 1518 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1519 return; 1520 1521 /* Set the SDVO control regs. */ 1522 if (INTEL_GEN(dev_priv) >= 4) { 1523 /* The real mode polarity is set by the SDVO commands, using 1524 * struct intel_sdvo_dtd. */ 1525 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1526 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range) 1527 sdvox |= HDMI_COLOR_RANGE_16_235; 1528 if (INTEL_GEN(dev_priv) < 5) 1529 sdvox |= SDVO_BORDER_ENABLE; 1530 } else { 1531 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1532 if (intel_sdvo->port == PORT_B) 1533 sdvox &= SDVOB_PRESERVE_MASK; 1534 else 1535 sdvox &= SDVOC_PRESERVE_MASK; 1536 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1537 } 1538 1539 if (HAS_PCH_CPT(dev_priv)) 1540 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe); 1541 else 1542 sdvox |= SDVO_PIPE_SEL(crtc->pipe); 1543 1544 if (INTEL_GEN(dev_priv) >= 4) { 1545 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1546 } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) || 1547 IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) { 1548 /* done in crtc_mode_set as it lives inside the dpll register */ 1549 } else { 1550 sdvox |= (crtc_state->pixel_multiplier - 1) 1551 << SDVO_PORT_MULTIPLY_SHIFT; 1552 } 1553 1554 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1555 INTEL_GEN(dev_priv) < 5) 1556 sdvox |= SDVO_STALL_SELECT; 1557 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1558 } 1559 1560 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector) 1561 { 1562 struct intel_sdvo_connector *intel_sdvo_connector = 1563 to_intel_sdvo_connector(&connector->base); 1564 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1565 u16 active_outputs = 0; 1566 1567 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1568 1569 return active_outputs & intel_sdvo_connector->output_flag; 1570 } 1571 1572 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv, 1573 i915_reg_t sdvo_reg, enum pipe *pipe) 1574 { 1575 u32 val; 1576 1577 val = intel_de_read(dev_priv, sdvo_reg); 1578 1579 /* asserts want to know the pipe even if the port is disabled */ 1580 if (HAS_PCH_CPT(dev_priv)) 1581 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT; 1582 else if (IS_CHERRYVIEW(dev_priv)) 1583 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV; 1584 else 1585 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT; 1586 1587 return val & SDVO_ENABLE; 1588 } 1589 1590 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder, 1591 enum pipe *pipe) 1592 { 1593 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1594 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1595 u16 active_outputs = 0; 1596 bool ret; 1597 1598 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs); 1599 1600 ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe); 1601 1602 return ret || active_outputs; 1603 } 1604 1605 static void intel_sdvo_get_config(struct intel_encoder *encoder, 1606 struct intel_crtc_state *pipe_config) 1607 { 1608 struct drm_device *dev = encoder->base.dev; 1609 struct drm_i915_private *dev_priv = to_i915(dev); 1610 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1611 struct intel_sdvo_dtd dtd; 1612 int encoder_pixel_multiplier = 0; 1613 int dotclock; 1614 u32 flags = 0, sdvox; 1615 u8 val; 1616 bool ret; 1617 1618 pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO); 1619 1620 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1621 1622 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); 1623 if (!ret) { 1624 /* 1625 * Some sdvo encoders are not spec compliant and don't 1626 * implement the mandatory get_timings function. 1627 */ 1628 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n"); 1629 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; 1630 } else { 1631 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) 1632 flags |= DRM_MODE_FLAG_PHSYNC; 1633 else 1634 flags |= DRM_MODE_FLAG_NHSYNC; 1635 1636 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) 1637 flags |= DRM_MODE_FLAG_PVSYNC; 1638 else 1639 flags |= DRM_MODE_FLAG_NVSYNC; 1640 } 1641 1642 pipe_config->hw.adjusted_mode.flags |= flags; 1643 1644 /* 1645 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in 1646 * the sdvo port register, on all other platforms it is part of the dpll 1647 * state. Since the general pipe state readout happens before the 1648 * encoder->get_config we so already have a valid pixel multplier on all 1649 * other platfroms. 1650 */ 1651 if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) { 1652 pipe_config->pixel_multiplier = 1653 ((sdvox & SDVO_PORT_MULTIPLY_MASK) 1654 >> SDVO_PORT_MULTIPLY_SHIFT) + 1; 1655 } 1656 1657 dotclock = pipe_config->port_clock; 1658 1659 if (pipe_config->pixel_multiplier) 1660 dotclock /= pipe_config->pixel_multiplier; 1661 1662 pipe_config->hw.adjusted_mode.crtc_clock = dotclock; 1663 1664 /* Cross check the port pixel multiplier with the sdvo encoder state. */ 1665 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, 1666 &val, 1)) { 1667 switch (val) { 1668 case SDVO_CLOCK_RATE_MULT_1X: 1669 encoder_pixel_multiplier = 1; 1670 break; 1671 case SDVO_CLOCK_RATE_MULT_2X: 1672 encoder_pixel_multiplier = 2; 1673 break; 1674 case SDVO_CLOCK_RATE_MULT_4X: 1675 encoder_pixel_multiplier = 4; 1676 break; 1677 } 1678 } 1679 1680 drm_WARN(dev, 1681 encoder_pixel_multiplier != pipe_config->pixel_multiplier, 1682 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", 1683 pipe_config->pixel_multiplier, encoder_pixel_multiplier); 1684 1685 if (sdvox & HDMI_COLOR_RANGE_16_235) 1686 pipe_config->limited_color_range = true; 1687 1688 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT, 1689 &val, 1)) { 1690 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT; 1691 1692 if ((val & mask) == mask) 1693 pipe_config->has_audio = true; 1694 } 1695 1696 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, 1697 &val, 1)) { 1698 if (val == SDVO_ENCODE_HDMI) 1699 pipe_config->has_hdmi_sink = true; 1700 } 1701 1702 intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config); 1703 } 1704 1705 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo) 1706 { 1707 intel_sdvo_set_audio_state(intel_sdvo, 0); 1708 } 1709 1710 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo, 1711 const struct intel_crtc_state *crtc_state, 1712 const struct drm_connector_state *conn_state) 1713 { 1714 const struct drm_display_mode *adjusted_mode = 1715 &crtc_state->hw.adjusted_mode; 1716 struct drm_connector *connector = conn_state->connector; 1717 u8 *eld = connector->eld; 1718 1719 eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2; 1720 1721 intel_sdvo_set_audio_state(intel_sdvo, 0); 1722 1723 intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD, 1724 SDVO_HBUF_TX_DISABLED, 1725 eld, drm_eld_size(eld)); 1726 1727 intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID | 1728 SDVO_AUDIO_PRESENCE_DETECT); 1729 } 1730 1731 static void intel_disable_sdvo(struct intel_encoder *encoder, 1732 const struct intel_crtc_state *old_crtc_state, 1733 const struct drm_connector_state *conn_state) 1734 { 1735 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1736 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1737 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 1738 u32 temp; 1739 1740 if (old_crtc_state->has_audio) 1741 intel_sdvo_disable_audio(intel_sdvo); 1742 1743 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1744 if (0) 1745 intel_sdvo_set_encoder_power_state(intel_sdvo, 1746 DRM_MODE_DPMS_OFF); 1747 1748 temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1749 1750 temp &= ~SDVO_ENABLE; 1751 intel_sdvo_write_sdvox(intel_sdvo, temp); 1752 1753 /* 1754 * HW workaround for IBX, we need to move the port 1755 * to transcoder A after disabling it to allow the 1756 * matching DP port to be enabled on transcoder A. 1757 */ 1758 if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) { 1759 /* 1760 * We get CPU/PCH FIFO underruns on the other pipe when 1761 * doing the workaround. Sweep them under the rug. 1762 */ 1763 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1764 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false); 1765 1766 temp &= ~SDVO_PIPE_SEL_MASK; 1767 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A); 1768 intel_sdvo_write_sdvox(intel_sdvo, temp); 1769 1770 temp &= ~SDVO_ENABLE; 1771 intel_sdvo_write_sdvox(intel_sdvo, temp); 1772 1773 intel_wait_for_vblank_if_active(dev_priv, PIPE_A); 1774 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1775 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); 1776 } 1777 } 1778 1779 static void pch_disable_sdvo(struct intel_encoder *encoder, 1780 const struct intel_crtc_state *old_crtc_state, 1781 const struct drm_connector_state *old_conn_state) 1782 { 1783 } 1784 1785 static void pch_post_disable_sdvo(struct intel_encoder *encoder, 1786 const struct intel_crtc_state *old_crtc_state, 1787 const struct drm_connector_state *old_conn_state) 1788 { 1789 intel_disable_sdvo(encoder, old_crtc_state, old_conn_state); 1790 } 1791 1792 static void intel_enable_sdvo(struct intel_encoder *encoder, 1793 const struct intel_crtc_state *pipe_config, 1794 const struct drm_connector_state *conn_state) 1795 { 1796 struct drm_device *dev = encoder->base.dev; 1797 struct drm_i915_private *dev_priv = to_i915(dev); 1798 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1799 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); 1800 u32 temp; 1801 bool input1, input2; 1802 int i; 1803 bool success; 1804 1805 temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); 1806 temp |= SDVO_ENABLE; 1807 intel_sdvo_write_sdvox(intel_sdvo, temp); 1808 1809 for (i = 0; i < 2; i++) 1810 intel_wait_for_vblank(dev_priv, intel_crtc->pipe); 1811 1812 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1813 /* 1814 * Warn if the device reported failure to sync. 1815 * 1816 * A lot of SDVO devices fail to notify of sync, but it's 1817 * a given it the status is a success, we succeeded. 1818 */ 1819 if (success && !input1) { 1820 drm_dbg_kms(&dev_priv->drm, 1821 "First %s output reported failure to " 1822 "sync\n", SDVO_NAME(intel_sdvo)); 1823 } 1824 1825 if (0) 1826 intel_sdvo_set_encoder_power_state(intel_sdvo, 1827 DRM_MODE_DPMS_ON); 1828 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1829 1830 if (pipe_config->has_audio) 1831 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state); 1832 } 1833 1834 static enum drm_mode_status 1835 intel_sdvo_mode_valid(struct drm_connector *connector, 1836 struct drm_display_mode *mode) 1837 { 1838 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1839 struct intel_sdvo_connector *intel_sdvo_connector = 1840 to_intel_sdvo_connector(connector); 1841 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; 1842 1843 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1844 return MODE_NO_DBLESCAN; 1845 1846 if (intel_sdvo->pixel_clock_min > mode->clock) 1847 return MODE_CLOCK_LOW; 1848 1849 if (intel_sdvo->pixel_clock_max < mode->clock) 1850 return MODE_CLOCK_HIGH; 1851 1852 if (mode->clock > max_dotclk) 1853 return MODE_CLOCK_HIGH; 1854 1855 if (IS_LVDS(intel_sdvo_connector)) { 1856 const struct drm_display_mode *fixed_mode = 1857 intel_sdvo_connector->base.panel.fixed_mode; 1858 1859 if (mode->hdisplay > fixed_mode->hdisplay) 1860 return MODE_PANEL; 1861 1862 if (mode->vdisplay > fixed_mode->vdisplay) 1863 return MODE_PANEL; 1864 } 1865 1866 return MODE_OK; 1867 } 1868 1869 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1870 { 1871 BUILD_BUG_ON(sizeof(*caps) != 8); 1872 if (!intel_sdvo_get_value(intel_sdvo, 1873 SDVO_CMD_GET_DEVICE_CAPS, 1874 caps, sizeof(*caps))) 1875 return false; 1876 1877 DRM_DEBUG_KMS("SDVO capabilities:\n" 1878 " vendor_id: %d\n" 1879 " device_id: %d\n" 1880 " device_rev_id: %d\n" 1881 " sdvo_version_major: %d\n" 1882 " sdvo_version_minor: %d\n" 1883 " sdvo_inputs_mask: %d\n" 1884 " smooth_scaling: %d\n" 1885 " sharp_scaling: %d\n" 1886 " up_scaling: %d\n" 1887 " down_scaling: %d\n" 1888 " stall_support: %d\n" 1889 " output_flags: %d\n", 1890 caps->vendor_id, 1891 caps->device_id, 1892 caps->device_rev_id, 1893 caps->sdvo_version_major, 1894 caps->sdvo_version_minor, 1895 caps->sdvo_inputs_mask, 1896 caps->smooth_scaling, 1897 caps->sharp_scaling, 1898 caps->up_scaling, 1899 caps->down_scaling, 1900 caps->stall_support, 1901 caps->output_flags); 1902 1903 return true; 1904 } 1905 1906 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) 1907 { 1908 struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev); 1909 u16 hotplug; 1910 1911 if (!I915_HAS_HOTPLUG(dev_priv)) 1912 return 0; 1913 1914 /* 1915 * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1916 * on the line. 1917 */ 1918 if (IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 1919 return 0; 1920 1921 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1922 &hotplug, sizeof(hotplug))) 1923 return 0; 1924 1925 return hotplug; 1926 } 1927 1928 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1929 { 1930 struct intel_sdvo *intel_sdvo = to_sdvo(encoder); 1931 1932 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1933 &intel_sdvo->hotplug_active, 2); 1934 } 1935 1936 static enum intel_hotplug_state 1937 intel_sdvo_hotplug(struct intel_encoder *encoder, 1938 struct intel_connector *connector, 1939 bool irq_received) 1940 { 1941 intel_sdvo_enable_hotplug(encoder); 1942 1943 return intel_encoder_hotplug(encoder, connector, irq_received); 1944 } 1945 1946 static bool 1947 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1948 { 1949 /* Is there more than one type of output? */ 1950 return hweight16(intel_sdvo->caps.output_flags) > 1; 1951 } 1952 1953 static struct edid * 1954 intel_sdvo_get_edid(struct drm_connector *connector) 1955 { 1956 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1957 return drm_get_edid(connector, &sdvo->ddc); 1958 } 1959 1960 /* Mac mini hack -- use the same DDC as the analog connector */ 1961 static struct edid * 1962 intel_sdvo_get_analog_edid(struct drm_connector *connector) 1963 { 1964 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1965 1966 return drm_get_edid(connector, 1967 intel_gmbus_get_adapter(dev_priv, 1968 dev_priv->vbt.crt_ddc_pin)); 1969 } 1970 1971 static enum drm_connector_status 1972 intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1973 { 1974 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 1975 struct intel_sdvo_connector *intel_sdvo_connector = 1976 to_intel_sdvo_connector(connector); 1977 enum drm_connector_status status; 1978 struct edid *edid; 1979 1980 edid = intel_sdvo_get_edid(connector); 1981 1982 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1983 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1984 1985 /* 1986 * Don't use the 1 as the argument of DDC bus switch to get 1987 * the EDID. It is used for SDVO SPD ROM. 1988 */ 1989 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1990 intel_sdvo->ddc_bus = ddc; 1991 edid = intel_sdvo_get_edid(connector); 1992 if (edid) 1993 break; 1994 } 1995 /* 1996 * If we found the EDID on the other bus, 1997 * assume that is the correct DDC bus. 1998 */ 1999 if (edid == NULL) 2000 intel_sdvo->ddc_bus = saved_ddc; 2001 } 2002 2003 /* 2004 * When there is no edid and no monitor is connected with VGA 2005 * port, try to use the CRT ddc to read the EDID for DVI-connector. 2006 */ 2007 if (edid == NULL) 2008 edid = intel_sdvo_get_analog_edid(connector); 2009 2010 status = connector_status_unknown; 2011 if (edid != NULL) { 2012 /* DDC bus is shared, match EDID to connector type */ 2013 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 2014 status = connector_status_connected; 2015 if (intel_sdvo_connector->is_hdmi) { 2016 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 2017 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 2018 } 2019 } else 2020 status = connector_status_disconnected; 2021 kfree(edid); 2022 } 2023 2024 return status; 2025 } 2026 2027 static bool 2028 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 2029 struct edid *edid) 2030 { 2031 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 2032 bool connector_is_digital = !!IS_DIGITAL(sdvo); 2033 2034 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 2035 connector_is_digital, monitor_is_digital); 2036 return connector_is_digital == monitor_is_digital; 2037 } 2038 2039 static enum drm_connector_status 2040 intel_sdvo_detect(struct drm_connector *connector, bool force) 2041 { 2042 u16 response; 2043 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2044 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2045 enum drm_connector_status ret; 2046 2047 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2048 connector->base.id, connector->name); 2049 2050 if (!intel_sdvo_get_value(intel_sdvo, 2051 SDVO_CMD_GET_ATTACHED_DISPLAYS, 2052 &response, 2)) 2053 return connector_status_unknown; 2054 2055 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 2056 response & 0xff, response >> 8, 2057 intel_sdvo_connector->output_flag); 2058 2059 if (response == 0) 2060 return connector_status_disconnected; 2061 2062 intel_sdvo->attached_output = response; 2063 2064 intel_sdvo->has_hdmi_monitor = false; 2065 intel_sdvo->has_hdmi_audio = false; 2066 2067 if ((intel_sdvo_connector->output_flag & response) == 0) 2068 ret = connector_status_disconnected; 2069 else if (IS_TMDS(intel_sdvo_connector)) 2070 ret = intel_sdvo_tmds_sink_detect(connector); 2071 else { 2072 struct edid *edid; 2073 2074 /* if we have an edid check it matches the connection */ 2075 edid = intel_sdvo_get_edid(connector); 2076 if (edid == NULL) 2077 edid = intel_sdvo_get_analog_edid(connector); 2078 if (edid != NULL) { 2079 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 2080 edid)) 2081 ret = connector_status_connected; 2082 else 2083 ret = connector_status_disconnected; 2084 2085 kfree(edid); 2086 } else 2087 ret = connector_status_connected; 2088 } 2089 2090 return ret; 2091 } 2092 2093 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 2094 { 2095 struct edid *edid; 2096 2097 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2098 connector->base.id, connector->name); 2099 2100 /* set the bus switch and get the modes */ 2101 edid = intel_sdvo_get_edid(connector); 2102 2103 /* 2104 * Mac mini hack. On this device, the DVI-I connector shares one DDC 2105 * link between analog and digital outputs. So, if the regular SDVO 2106 * DDC fails, check to see if the analog output is disconnected, in 2107 * which case we'll look there for the digital DDC data. 2108 */ 2109 if (edid == NULL) 2110 edid = intel_sdvo_get_analog_edid(connector); 2111 2112 if (edid != NULL) { 2113 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 2114 edid)) { 2115 drm_connector_update_edid_property(connector, edid); 2116 drm_add_edid_modes(connector, edid); 2117 } 2118 2119 kfree(edid); 2120 } 2121 } 2122 2123 /* 2124 * Set of SDVO TV modes. 2125 * Note! This is in reply order (see loop in get_tv_modes). 2126 * XXX: all 60Hz refresh? 2127 */ 2128 static const struct drm_display_mode sdvo_tv_modes[] = { 2129 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 2130 416, 0, 200, 201, 232, 233, 0, 2131 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2132 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 2133 416, 0, 240, 241, 272, 273, 0, 2134 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2135 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 2136 496, 0, 300, 301, 332, 333, 0, 2137 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2138 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 2139 736, 0, 350, 351, 382, 383, 0, 2140 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2141 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 2142 736, 0, 400, 401, 432, 433, 0, 2143 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2144 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 2145 736, 0, 480, 481, 512, 513, 0, 2146 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2147 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 2148 800, 0, 480, 481, 512, 513, 0, 2149 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2150 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 2151 800, 0, 576, 577, 608, 609, 0, 2152 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2153 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 2154 816, 0, 350, 351, 382, 383, 0, 2155 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2156 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 2157 816, 0, 400, 401, 432, 433, 0, 2158 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2159 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 2160 816, 0, 480, 481, 512, 513, 0, 2161 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2162 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 2163 816, 0, 540, 541, 572, 573, 0, 2164 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2165 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 2166 816, 0, 576, 577, 608, 609, 0, 2167 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2168 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 2169 864, 0, 576, 577, 608, 609, 0, 2170 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2171 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 2172 896, 0, 600, 601, 632, 633, 0, 2173 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2174 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 2175 928, 0, 624, 625, 656, 657, 0, 2176 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2177 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 2178 1016, 0, 766, 767, 798, 799, 0, 2179 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2180 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 2181 1120, 0, 768, 769, 800, 801, 0, 2182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2183 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 2184 1376, 0, 1024, 1025, 1056, 1057, 0, 2185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 2186 }; 2187 2188 static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 2189 { 2190 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2191 const struct drm_connector_state *conn_state = connector->state; 2192 struct intel_sdvo_sdtv_resolution_request tv_res; 2193 u32 reply = 0, format_map = 0; 2194 int i; 2195 2196 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 2197 connector->base.id, connector->name); 2198 2199 /* 2200 * Read the list of supported input resolutions for the selected TV 2201 * format. 2202 */ 2203 format_map = 1 << conn_state->tv.mode; 2204 memcpy(&tv_res, &format_map, 2205 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 2206 2207 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 2208 return; 2209 2210 BUILD_BUG_ON(sizeof(tv_res) != 3); 2211 if (!intel_sdvo_write_cmd(intel_sdvo, 2212 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 2213 &tv_res, sizeof(tv_res))) 2214 return; 2215 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 2216 return; 2217 2218 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 2219 if (reply & (1 << i)) { 2220 struct drm_display_mode *nmode; 2221 nmode = drm_mode_duplicate(connector->dev, 2222 &sdvo_tv_modes[i]); 2223 if (nmode) 2224 drm_mode_probed_add(connector, nmode); 2225 } 2226 } 2227 2228 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 2229 { 2230 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2231 struct drm_i915_private *dev_priv = to_i915(connector->dev); 2232 struct drm_display_mode *newmode; 2233 2234 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n", 2235 connector->base.id, connector->name); 2236 2237 /* 2238 * Fetch modes from VBT. For SDVO prefer the VBT mode since some 2239 * SDVO->LVDS transcoders can't cope with the EDID mode. 2240 */ 2241 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) { 2242 newmode = drm_mode_duplicate(connector->dev, 2243 dev_priv->vbt.sdvo_lvds_vbt_mode); 2244 if (newmode != NULL) { 2245 /* Guarantee the mode is preferred */ 2246 newmode->type = (DRM_MODE_TYPE_PREFERRED | 2247 DRM_MODE_TYPE_DRIVER); 2248 drm_mode_probed_add(connector, newmode); 2249 } 2250 } 2251 2252 /* 2253 * Attempt to get the mode list from DDC. 2254 * Assume that the preferred modes are 2255 * arranged in priority order. 2256 */ 2257 intel_ddc_get_modes(connector, &intel_sdvo->ddc); 2258 } 2259 2260 static int intel_sdvo_get_modes(struct drm_connector *connector) 2261 { 2262 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2263 2264 if (IS_TV(intel_sdvo_connector)) 2265 intel_sdvo_get_tv_modes(connector); 2266 else if (IS_LVDS(intel_sdvo_connector)) 2267 intel_sdvo_get_lvds_modes(connector); 2268 else 2269 intel_sdvo_get_ddc_modes(connector); 2270 2271 return !list_empty(&connector->probed_modes); 2272 } 2273 2274 static int 2275 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector, 2276 const struct drm_connector_state *state, 2277 struct drm_property *property, 2278 u64 *val) 2279 { 2280 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2281 const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state); 2282 2283 if (property == intel_sdvo_connector->tv_format) { 2284 int i; 2285 2286 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2287 if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) { 2288 *val = i; 2289 2290 return 0; 2291 } 2292 2293 WARN_ON(1); 2294 *val = 0; 2295 } else if (property == intel_sdvo_connector->top || 2296 property == intel_sdvo_connector->bottom) 2297 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v; 2298 else if (property == intel_sdvo_connector->left || 2299 property == intel_sdvo_connector->right) 2300 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h; 2301 else if (property == intel_sdvo_connector->hpos) 2302 *val = sdvo_state->tv.hpos; 2303 else if (property == intel_sdvo_connector->vpos) 2304 *val = sdvo_state->tv.vpos; 2305 else if (property == intel_sdvo_connector->saturation) 2306 *val = state->tv.saturation; 2307 else if (property == intel_sdvo_connector->contrast) 2308 *val = state->tv.contrast; 2309 else if (property == intel_sdvo_connector->hue) 2310 *val = state->tv.hue; 2311 else if (property == intel_sdvo_connector->brightness) 2312 *val = state->tv.brightness; 2313 else if (property == intel_sdvo_connector->sharpness) 2314 *val = sdvo_state->tv.sharpness; 2315 else if (property == intel_sdvo_connector->flicker_filter) 2316 *val = sdvo_state->tv.flicker_filter; 2317 else if (property == intel_sdvo_connector->flicker_filter_2d) 2318 *val = sdvo_state->tv.flicker_filter_2d; 2319 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2320 *val = sdvo_state->tv.flicker_filter_adaptive; 2321 else if (property == intel_sdvo_connector->tv_chroma_filter) 2322 *val = sdvo_state->tv.chroma_filter; 2323 else if (property == intel_sdvo_connector->tv_luma_filter) 2324 *val = sdvo_state->tv.luma_filter; 2325 else if (property == intel_sdvo_connector->dot_crawl) 2326 *val = sdvo_state->tv.dot_crawl; 2327 else 2328 return intel_digital_connector_atomic_get_property(connector, state, property, val); 2329 2330 return 0; 2331 } 2332 2333 static int 2334 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector, 2335 struct drm_connector_state *state, 2336 struct drm_property *property, 2337 u64 val) 2338 { 2339 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 2340 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state); 2341 2342 if (property == intel_sdvo_connector->tv_format) { 2343 state->tv.mode = intel_sdvo_connector->tv_format_supported[val]; 2344 2345 if (state->crtc) { 2346 struct drm_crtc_state *crtc_state = 2347 drm_atomic_get_new_crtc_state(state->state, state->crtc); 2348 2349 crtc_state->connectors_changed = true; 2350 } 2351 } else if (property == intel_sdvo_connector->top || 2352 property == intel_sdvo_connector->bottom) 2353 /* Cannot set these independent from each other */ 2354 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val; 2355 else if (property == intel_sdvo_connector->left || 2356 property == intel_sdvo_connector->right) 2357 /* Cannot set these independent from each other */ 2358 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val; 2359 else if (property == intel_sdvo_connector->hpos) 2360 sdvo_state->tv.hpos = val; 2361 else if (property == intel_sdvo_connector->vpos) 2362 sdvo_state->tv.vpos = val; 2363 else if (property == intel_sdvo_connector->saturation) 2364 state->tv.saturation = val; 2365 else if (property == intel_sdvo_connector->contrast) 2366 state->tv.contrast = val; 2367 else if (property == intel_sdvo_connector->hue) 2368 state->tv.hue = val; 2369 else if (property == intel_sdvo_connector->brightness) 2370 state->tv.brightness = val; 2371 else if (property == intel_sdvo_connector->sharpness) 2372 sdvo_state->tv.sharpness = val; 2373 else if (property == intel_sdvo_connector->flicker_filter) 2374 sdvo_state->tv.flicker_filter = val; 2375 else if (property == intel_sdvo_connector->flicker_filter_2d) 2376 sdvo_state->tv.flicker_filter_2d = val; 2377 else if (property == intel_sdvo_connector->flicker_filter_adaptive) 2378 sdvo_state->tv.flicker_filter_adaptive = val; 2379 else if (property == intel_sdvo_connector->tv_chroma_filter) 2380 sdvo_state->tv.chroma_filter = val; 2381 else if (property == intel_sdvo_connector->tv_luma_filter) 2382 sdvo_state->tv.luma_filter = val; 2383 else if (property == intel_sdvo_connector->dot_crawl) 2384 sdvo_state->tv.dot_crawl = val; 2385 else 2386 return intel_digital_connector_atomic_set_property(connector, state, property, val); 2387 2388 return 0; 2389 } 2390 2391 static int 2392 intel_sdvo_connector_register(struct drm_connector *connector) 2393 { 2394 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2395 int ret; 2396 2397 ret = intel_connector_register(connector); 2398 if (ret) 2399 return ret; 2400 2401 return sysfs_create_link(&connector->kdev->kobj, 2402 &sdvo->ddc.dev.kobj, 2403 sdvo->ddc.dev.kobj.name); 2404 } 2405 2406 static void 2407 intel_sdvo_connector_unregister(struct drm_connector *connector) 2408 { 2409 struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector)); 2410 2411 sysfs_remove_link(&connector->kdev->kobj, 2412 sdvo->ddc.dev.kobj.name); 2413 intel_connector_unregister(connector); 2414 } 2415 2416 static struct drm_connector_state * 2417 intel_sdvo_connector_duplicate_state(struct drm_connector *connector) 2418 { 2419 struct intel_sdvo_connector_state *state; 2420 2421 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL); 2422 if (!state) 2423 return NULL; 2424 2425 __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base); 2426 return &state->base.base; 2427 } 2428 2429 static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 2430 .detect = intel_sdvo_detect, 2431 .fill_modes = drm_helper_probe_single_connector_modes, 2432 .atomic_get_property = intel_sdvo_connector_atomic_get_property, 2433 .atomic_set_property = intel_sdvo_connector_atomic_set_property, 2434 .late_register = intel_sdvo_connector_register, 2435 .early_unregister = intel_sdvo_connector_unregister, 2436 .destroy = intel_connector_destroy, 2437 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 2438 .atomic_duplicate_state = intel_sdvo_connector_duplicate_state, 2439 }; 2440 2441 static int intel_sdvo_atomic_check(struct drm_connector *conn, 2442 struct drm_atomic_state *state) 2443 { 2444 struct drm_connector_state *new_conn_state = 2445 drm_atomic_get_new_connector_state(state, conn); 2446 struct drm_connector_state *old_conn_state = 2447 drm_atomic_get_old_connector_state(state, conn); 2448 struct intel_sdvo_connector_state *old_state = 2449 to_intel_sdvo_connector_state(old_conn_state); 2450 struct intel_sdvo_connector_state *new_state = 2451 to_intel_sdvo_connector_state(new_conn_state); 2452 2453 if (new_conn_state->crtc && 2454 (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) || 2455 memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) { 2456 struct drm_crtc_state *crtc_state = 2457 drm_atomic_get_new_crtc_state(state, 2458 new_conn_state->crtc); 2459 2460 crtc_state->connectors_changed = true; 2461 } 2462 2463 return intel_digital_connector_atomic_check(conn, state); 2464 } 2465 2466 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 2467 .get_modes = intel_sdvo_get_modes, 2468 .mode_valid = intel_sdvo_mode_valid, 2469 .atomic_check = intel_sdvo_atomic_check, 2470 }; 2471 2472 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 2473 { 2474 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder)); 2475 2476 i2c_del_adapter(&intel_sdvo->ddc); 2477 intel_encoder_destroy(encoder); 2478 } 2479 2480 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 2481 .destroy = intel_sdvo_enc_destroy, 2482 }; 2483 2484 static void 2485 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 2486 { 2487 u16 mask = 0; 2488 unsigned int num_bits; 2489 2490 /* 2491 * Make a mask of outputs less than or equal to our own priority in the 2492 * list. 2493 */ 2494 switch (sdvo->controlled_output) { 2495 case SDVO_OUTPUT_LVDS1: 2496 mask |= SDVO_OUTPUT_LVDS1; 2497 /* fall through */ 2498 case SDVO_OUTPUT_LVDS0: 2499 mask |= SDVO_OUTPUT_LVDS0; 2500 /* fall through */ 2501 case SDVO_OUTPUT_TMDS1: 2502 mask |= SDVO_OUTPUT_TMDS1; 2503 /* fall through */ 2504 case SDVO_OUTPUT_TMDS0: 2505 mask |= SDVO_OUTPUT_TMDS0; 2506 /* fall through */ 2507 case SDVO_OUTPUT_RGB1: 2508 mask |= SDVO_OUTPUT_RGB1; 2509 /* fall through */ 2510 case SDVO_OUTPUT_RGB0: 2511 mask |= SDVO_OUTPUT_RGB0; 2512 break; 2513 } 2514 2515 /* Count bits to find what number we are in the priority list. */ 2516 mask &= sdvo->caps.output_flags; 2517 num_bits = hweight16(mask); 2518 /* If more than 3 outputs, default to DDC bus 3 for now. */ 2519 if (num_bits > 3) 2520 num_bits = 3; 2521 2522 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 2523 sdvo->ddc_bus = 1 << num_bits; 2524 } 2525 2526 /* 2527 * Choose the appropriate DDC bus for control bus switch command for this 2528 * SDVO output based on the controlled output. 2529 * 2530 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 2531 * outputs, then LVDS outputs. 2532 */ 2533 static void 2534 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 2535 struct intel_sdvo *sdvo) 2536 { 2537 struct sdvo_device_mapping *mapping; 2538 2539 if (sdvo->port == PORT_B) 2540 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2541 else 2542 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2543 2544 if (mapping->initialized) 2545 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 2546 else 2547 intel_sdvo_guess_ddc_bus(sdvo); 2548 } 2549 2550 static void 2551 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 2552 struct intel_sdvo *sdvo) 2553 { 2554 struct sdvo_device_mapping *mapping; 2555 u8 pin; 2556 2557 if (sdvo->port == PORT_B) 2558 mapping = &dev_priv->vbt.sdvo_mappings[0]; 2559 else 2560 mapping = &dev_priv->vbt.sdvo_mappings[1]; 2561 2562 if (mapping->initialized && 2563 intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin)) 2564 pin = mapping->i2c_pin; 2565 else 2566 pin = GMBUS_PIN_DPB; 2567 2568 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 2569 2570 /* 2571 * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow 2572 * our code totally fails once we start using gmbus. Hence fall back to 2573 * bit banging for now. 2574 */ 2575 intel_gmbus_force_bit(sdvo->i2c, true); 2576 } 2577 2578 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */ 2579 static void 2580 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo) 2581 { 2582 intel_gmbus_force_bit(sdvo->i2c, false); 2583 } 2584 2585 static bool 2586 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 2587 { 2588 return intel_sdvo_check_supp_encode(intel_sdvo); 2589 } 2590 2591 static u8 2592 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv, 2593 struct intel_sdvo *sdvo) 2594 { 2595 struct sdvo_device_mapping *my_mapping, *other_mapping; 2596 2597 if (sdvo->port == PORT_B) { 2598 my_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2599 other_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2600 } else { 2601 my_mapping = &dev_priv->vbt.sdvo_mappings[1]; 2602 other_mapping = &dev_priv->vbt.sdvo_mappings[0]; 2603 } 2604 2605 /* If the BIOS described our SDVO device, take advantage of it. */ 2606 if (my_mapping->slave_addr) 2607 return my_mapping->slave_addr; 2608 2609 /* 2610 * If the BIOS only described a different SDVO device, use the 2611 * address that it isn't using. 2612 */ 2613 if (other_mapping->slave_addr) { 2614 if (other_mapping->slave_addr == 0x70) 2615 return 0x72; 2616 else 2617 return 0x70; 2618 } 2619 2620 /* 2621 * No SDVO device info is found for another DVO port, 2622 * so use mapping assumption we had before BIOS parsing. 2623 */ 2624 if (sdvo->port == PORT_B) 2625 return 0x70; 2626 else 2627 return 0x72; 2628 } 2629 2630 static int 2631 intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2632 struct intel_sdvo *encoder) 2633 { 2634 struct drm_connector *drm_connector; 2635 int ret; 2636 2637 drm_connector = &connector->base.base; 2638 ret = drm_connector_init(encoder->base.base.dev, 2639 drm_connector, 2640 &intel_sdvo_connector_funcs, 2641 connector->base.base.connector_type); 2642 if (ret < 0) 2643 return ret; 2644 2645 drm_connector_helper_add(drm_connector, 2646 &intel_sdvo_connector_helper_funcs); 2647 2648 connector->base.base.interlace_allowed = 1; 2649 connector->base.base.doublescan_allowed = 0; 2650 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2651 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state; 2652 2653 intel_connector_attach_encoder(&connector->base, &encoder->base); 2654 2655 return 0; 2656 } 2657 2658 static void 2659 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo, 2660 struct intel_sdvo_connector *connector) 2661 { 2662 struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev); 2663 2664 intel_attach_force_audio_property(&connector->base.base); 2665 if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) { 2666 intel_attach_broadcast_rgb_property(&connector->base.base); 2667 } 2668 intel_attach_aspect_ratio_property(&connector->base.base); 2669 } 2670 2671 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void) 2672 { 2673 struct intel_sdvo_connector *sdvo_connector; 2674 struct intel_sdvo_connector_state *conn_state; 2675 2676 sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL); 2677 if (!sdvo_connector) 2678 return NULL; 2679 2680 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL); 2681 if (!conn_state) { 2682 kfree(sdvo_connector); 2683 return NULL; 2684 } 2685 2686 __drm_atomic_helper_connector_reset(&sdvo_connector->base.base, 2687 &conn_state->base.base); 2688 2689 return sdvo_connector; 2690 } 2691 2692 static bool 2693 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2694 { 2695 struct drm_encoder *encoder = &intel_sdvo->base.base; 2696 struct drm_connector *connector; 2697 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2698 struct intel_connector *intel_connector; 2699 struct intel_sdvo_connector *intel_sdvo_connector; 2700 2701 DRM_DEBUG_KMS("initialising DVI device %d\n", device); 2702 2703 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2704 if (!intel_sdvo_connector) 2705 return false; 2706 2707 if (device == 0) { 2708 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2709 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2710 } else if (device == 1) { 2711 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2712 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2713 } 2714 2715 intel_connector = &intel_sdvo_connector->base; 2716 connector = &intel_connector->base; 2717 if (intel_sdvo_get_hotplug_support(intel_sdvo) & 2718 intel_sdvo_connector->output_flag) { 2719 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag; 2720 /* 2721 * Some SDVO devices have one-shot hotplug interrupts. 2722 * Ensure that they get re-enabled when an interrupt happens. 2723 */ 2724 intel_connector->polled = DRM_CONNECTOR_POLL_HPD; 2725 intel_encoder->hotplug = intel_sdvo_hotplug; 2726 intel_sdvo_enable_hotplug(intel_encoder); 2727 } else { 2728 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2729 } 2730 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2731 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2732 2733 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2734 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2735 intel_sdvo_connector->is_hdmi = true; 2736 } 2737 2738 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2739 kfree(intel_sdvo_connector); 2740 return false; 2741 } 2742 2743 if (intel_sdvo_connector->is_hdmi) 2744 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector); 2745 2746 return true; 2747 } 2748 2749 static bool 2750 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2751 { 2752 struct drm_encoder *encoder = &intel_sdvo->base.base; 2753 struct drm_connector *connector; 2754 struct intel_connector *intel_connector; 2755 struct intel_sdvo_connector *intel_sdvo_connector; 2756 2757 DRM_DEBUG_KMS("initialising TV type %d\n", type); 2758 2759 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2760 if (!intel_sdvo_connector) 2761 return false; 2762 2763 intel_connector = &intel_sdvo_connector->base; 2764 connector = &intel_connector->base; 2765 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2766 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2767 2768 intel_sdvo->controlled_output |= type; 2769 intel_sdvo_connector->output_flag = type; 2770 2771 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2772 kfree(intel_sdvo_connector); 2773 return false; 2774 } 2775 2776 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2777 goto err; 2778 2779 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2780 goto err; 2781 2782 return true; 2783 2784 err: 2785 intel_connector_destroy(connector); 2786 return false; 2787 } 2788 2789 static bool 2790 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2791 { 2792 struct drm_encoder *encoder = &intel_sdvo->base.base; 2793 struct drm_connector *connector; 2794 struct intel_connector *intel_connector; 2795 struct intel_sdvo_connector *intel_sdvo_connector; 2796 2797 DRM_DEBUG_KMS("initialising analog device %d\n", device); 2798 2799 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2800 if (!intel_sdvo_connector) 2801 return false; 2802 2803 intel_connector = &intel_sdvo_connector->base; 2804 connector = &intel_connector->base; 2805 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2806 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2807 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2808 2809 if (device == 0) { 2810 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2811 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2812 } else if (device == 1) { 2813 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2814 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2815 } 2816 2817 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2818 kfree(intel_sdvo_connector); 2819 return false; 2820 } 2821 2822 return true; 2823 } 2824 2825 static bool 2826 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2827 { 2828 struct drm_encoder *encoder = &intel_sdvo->base.base; 2829 struct drm_connector *connector; 2830 struct intel_connector *intel_connector; 2831 struct intel_sdvo_connector *intel_sdvo_connector; 2832 struct drm_display_mode *mode; 2833 2834 DRM_DEBUG_KMS("initialising LVDS device %d\n", device); 2835 2836 intel_sdvo_connector = intel_sdvo_connector_alloc(); 2837 if (!intel_sdvo_connector) 2838 return false; 2839 2840 intel_connector = &intel_sdvo_connector->base; 2841 connector = &intel_connector->base; 2842 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2843 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2844 2845 if (device == 0) { 2846 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2847 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2848 } else if (device == 1) { 2849 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2850 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2851 } 2852 2853 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) { 2854 kfree(intel_sdvo_connector); 2855 return false; 2856 } 2857 2858 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2859 goto err; 2860 2861 intel_sdvo_get_lvds_modes(connector); 2862 2863 list_for_each_entry(mode, &connector->probed_modes, head) { 2864 if (mode->type & DRM_MODE_TYPE_PREFERRED) { 2865 struct drm_display_mode *fixed_mode = 2866 drm_mode_duplicate(connector->dev, mode); 2867 2868 intel_panel_init(&intel_connector->panel, 2869 fixed_mode, NULL); 2870 break; 2871 } 2872 } 2873 2874 if (!intel_connector->panel.fixed_mode) 2875 goto err; 2876 2877 return true; 2878 2879 err: 2880 intel_connector_destroy(connector); 2881 return false; 2882 } 2883 2884 static bool 2885 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags) 2886 { 2887 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2888 2889 if (flags & SDVO_OUTPUT_TMDS0) 2890 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2891 return false; 2892 2893 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2894 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2895 return false; 2896 2897 /* TV has no XXX1 function block */ 2898 if (flags & SDVO_OUTPUT_SVID0) 2899 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2900 return false; 2901 2902 if (flags & SDVO_OUTPUT_CVBS0) 2903 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2904 return false; 2905 2906 if (flags & SDVO_OUTPUT_YPRPB0) 2907 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2908 return false; 2909 2910 if (flags & SDVO_OUTPUT_RGB0) 2911 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2912 return false; 2913 2914 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2915 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2916 return false; 2917 2918 if (flags & SDVO_OUTPUT_LVDS0) 2919 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2920 return false; 2921 2922 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2923 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2924 return false; 2925 2926 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2927 unsigned char bytes[2]; 2928 2929 intel_sdvo->controlled_output = 0; 2930 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2931 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2932 SDVO_NAME(intel_sdvo), 2933 bytes[0], bytes[1]); 2934 return false; 2935 } 2936 intel_sdvo->base.pipe_mask = ~0; 2937 2938 return true; 2939 } 2940 2941 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) 2942 { 2943 struct drm_device *dev = intel_sdvo->base.base.dev; 2944 struct drm_connector *connector, *tmp; 2945 2946 list_for_each_entry_safe(connector, tmp, 2947 &dev->mode_config.connector_list, head) { 2948 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) { 2949 drm_connector_unregister(connector); 2950 intel_connector_destroy(connector); 2951 } 2952 } 2953 } 2954 2955 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2956 struct intel_sdvo_connector *intel_sdvo_connector, 2957 int type) 2958 { 2959 struct drm_device *dev = intel_sdvo->base.base.dev; 2960 struct intel_sdvo_tv_format format; 2961 u32 format_map, i; 2962 2963 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2964 return false; 2965 2966 BUILD_BUG_ON(sizeof(format) != 6); 2967 if (!intel_sdvo_get_value(intel_sdvo, 2968 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2969 &format, sizeof(format))) 2970 return false; 2971 2972 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2973 2974 if (format_map == 0) 2975 return false; 2976 2977 intel_sdvo_connector->format_supported_num = 0; 2978 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2979 if (format_map & (1 << i)) 2980 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2981 2982 2983 intel_sdvo_connector->tv_format = 2984 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2985 "mode", intel_sdvo_connector->format_supported_num); 2986 if (!intel_sdvo_connector->tv_format) 2987 return false; 2988 2989 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2990 drm_property_add_enum(intel_sdvo_connector->tv_format, i, 2991 tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2992 2993 intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0]; 2994 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2995 intel_sdvo_connector->tv_format, 0); 2996 return true; 2997 2998 } 2999 3000 #define _ENHANCEMENT(state_assignment, name, NAME) do { \ 3001 if (enhancements.name) { \ 3002 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 3003 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 3004 return false; \ 3005 intel_sdvo_connector->name = \ 3006 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 3007 if (!intel_sdvo_connector->name) return false; \ 3008 state_assignment = response; \ 3009 drm_object_attach_property(&connector->base, \ 3010 intel_sdvo_connector->name, 0); \ 3011 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 3012 data_value[0], data_value[1], response); \ 3013 } \ 3014 } while (0) 3015 3016 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME) 3017 3018 static bool 3019 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 3020 struct intel_sdvo_connector *intel_sdvo_connector, 3021 struct intel_sdvo_enhancements_reply enhancements) 3022 { 3023 struct drm_device *dev = intel_sdvo->base.base.dev; 3024 struct drm_connector *connector = &intel_sdvo_connector->base.base; 3025 struct drm_connector_state *conn_state = connector->state; 3026 struct intel_sdvo_connector_state *sdvo_state = 3027 to_intel_sdvo_connector_state(conn_state); 3028 u16 response, data_value[2]; 3029 3030 /* when horizontal overscan is supported, Add the left/right property */ 3031 if (enhancements.overscan_h) { 3032 if (!intel_sdvo_get_value(intel_sdvo, 3033 SDVO_CMD_GET_MAX_OVERSCAN_H, 3034 &data_value, 4)) 3035 return false; 3036 3037 if (!intel_sdvo_get_value(intel_sdvo, 3038 SDVO_CMD_GET_OVERSCAN_H, 3039 &response, 2)) 3040 return false; 3041 3042 sdvo_state->tv.overscan_h = response; 3043 3044 intel_sdvo_connector->max_hscan = data_value[0]; 3045 intel_sdvo_connector->left = 3046 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 3047 if (!intel_sdvo_connector->left) 3048 return false; 3049 3050 drm_object_attach_property(&connector->base, 3051 intel_sdvo_connector->left, 0); 3052 3053 intel_sdvo_connector->right = 3054 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 3055 if (!intel_sdvo_connector->right) 3056 return false; 3057 3058 drm_object_attach_property(&connector->base, 3059 intel_sdvo_connector->right, 0); 3060 DRM_DEBUG_KMS("h_overscan: max %d, " 3061 "default %d, current %d\n", 3062 data_value[0], data_value[1], response); 3063 } 3064 3065 if (enhancements.overscan_v) { 3066 if (!intel_sdvo_get_value(intel_sdvo, 3067 SDVO_CMD_GET_MAX_OVERSCAN_V, 3068 &data_value, 4)) 3069 return false; 3070 3071 if (!intel_sdvo_get_value(intel_sdvo, 3072 SDVO_CMD_GET_OVERSCAN_V, 3073 &response, 2)) 3074 return false; 3075 3076 sdvo_state->tv.overscan_v = response; 3077 3078 intel_sdvo_connector->max_vscan = data_value[0]; 3079 intel_sdvo_connector->top = 3080 drm_property_create_range(dev, 0, 3081 "top_margin", 0, data_value[0]); 3082 if (!intel_sdvo_connector->top) 3083 return false; 3084 3085 drm_object_attach_property(&connector->base, 3086 intel_sdvo_connector->top, 0); 3087 3088 intel_sdvo_connector->bottom = 3089 drm_property_create_range(dev, 0, 3090 "bottom_margin", 0, data_value[0]); 3091 if (!intel_sdvo_connector->bottom) 3092 return false; 3093 3094 drm_object_attach_property(&connector->base, 3095 intel_sdvo_connector->bottom, 0); 3096 DRM_DEBUG_KMS("v_overscan: max %d, " 3097 "default %d, current %d\n", 3098 data_value[0], data_value[1], response); 3099 } 3100 3101 ENHANCEMENT(&sdvo_state->tv, hpos, HPOS); 3102 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS); 3103 ENHANCEMENT(&conn_state->tv, saturation, SATURATION); 3104 ENHANCEMENT(&conn_state->tv, contrast, CONTRAST); 3105 ENHANCEMENT(&conn_state->tv, hue, HUE); 3106 ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS); 3107 ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS); 3108 ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER); 3109 ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 3110 ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D); 3111 _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER); 3112 _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER); 3113 3114 if (enhancements.dot_crawl) { 3115 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 3116 return false; 3117 3118 sdvo_state->tv.dot_crawl = response & 0x1; 3119 intel_sdvo_connector->dot_crawl = 3120 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 3121 if (!intel_sdvo_connector->dot_crawl) 3122 return false; 3123 3124 drm_object_attach_property(&connector->base, 3125 intel_sdvo_connector->dot_crawl, 0); 3126 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 3127 } 3128 3129 return true; 3130 } 3131 3132 static bool 3133 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 3134 struct intel_sdvo_connector *intel_sdvo_connector, 3135 struct intel_sdvo_enhancements_reply enhancements) 3136 { 3137 struct drm_device *dev = intel_sdvo->base.base.dev; 3138 struct drm_connector *connector = &intel_sdvo_connector->base.base; 3139 u16 response, data_value[2]; 3140 3141 ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS); 3142 3143 return true; 3144 } 3145 #undef ENHANCEMENT 3146 #undef _ENHANCEMENT 3147 3148 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 3149 struct intel_sdvo_connector *intel_sdvo_connector) 3150 { 3151 union { 3152 struct intel_sdvo_enhancements_reply reply; 3153 u16 response; 3154 } enhancements; 3155 3156 BUILD_BUG_ON(sizeof(enhancements) != 2); 3157 3158 if (!intel_sdvo_get_value(intel_sdvo, 3159 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 3160 &enhancements, sizeof(enhancements)) || 3161 enhancements.response == 0) { 3162 DRM_DEBUG_KMS("No enhancement is supported\n"); 3163 return true; 3164 } 3165 3166 if (IS_TV(intel_sdvo_connector)) 3167 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 3168 else if (IS_LVDS(intel_sdvo_connector)) 3169 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 3170 else 3171 return true; 3172 } 3173 3174 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 3175 struct i2c_msg *msgs, 3176 int num) 3177 { 3178 struct intel_sdvo *sdvo = adapter->algo_data; 3179 3180 if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 3181 return -EIO; 3182 3183 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 3184 } 3185 3186 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 3187 { 3188 struct intel_sdvo *sdvo = adapter->algo_data; 3189 return sdvo->i2c->algo->functionality(sdvo->i2c); 3190 } 3191 3192 static const struct i2c_algorithm intel_sdvo_ddc_proxy = { 3193 .master_xfer = intel_sdvo_ddc_proxy_xfer, 3194 .functionality = intel_sdvo_ddc_proxy_func 3195 }; 3196 3197 static void proxy_lock_bus(struct i2c_adapter *adapter, 3198 unsigned int flags) 3199 { 3200 struct intel_sdvo *sdvo = adapter->algo_data; 3201 sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags); 3202 } 3203 3204 static int proxy_trylock_bus(struct i2c_adapter *adapter, 3205 unsigned int flags) 3206 { 3207 struct intel_sdvo *sdvo = adapter->algo_data; 3208 return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags); 3209 } 3210 3211 static void proxy_unlock_bus(struct i2c_adapter *adapter, 3212 unsigned int flags) 3213 { 3214 struct intel_sdvo *sdvo = adapter->algo_data; 3215 sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags); 3216 } 3217 3218 static const struct i2c_lock_operations proxy_lock_ops = { 3219 .lock_bus = proxy_lock_bus, 3220 .trylock_bus = proxy_trylock_bus, 3221 .unlock_bus = proxy_unlock_bus, 3222 }; 3223 3224 static bool 3225 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, 3226 struct drm_i915_private *dev_priv) 3227 { 3228 struct pci_dev *pdev = dev_priv->drm.pdev; 3229 3230 sdvo->ddc.owner = THIS_MODULE; 3231 sdvo->ddc.class = I2C_CLASS_DDC; 3232 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 3233 sdvo->ddc.dev.parent = &pdev->dev; 3234 sdvo->ddc.algo_data = sdvo; 3235 sdvo->ddc.algo = &intel_sdvo_ddc_proxy; 3236 sdvo->ddc.lock_ops = &proxy_lock_ops; 3237 3238 return i2c_add_adapter(&sdvo->ddc) == 0; 3239 } 3240 3241 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv, 3242 enum port port) 3243 { 3244 if (HAS_PCH_SPLIT(dev_priv)) 3245 drm_WARN_ON(&dev_priv->drm, port != PORT_B); 3246 else 3247 drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C); 3248 } 3249 3250 bool intel_sdvo_init(struct drm_i915_private *dev_priv, 3251 i915_reg_t sdvo_reg, enum port port) 3252 { 3253 struct intel_encoder *intel_encoder; 3254 struct intel_sdvo *intel_sdvo; 3255 int i; 3256 3257 assert_sdvo_port_valid(dev_priv, port); 3258 3259 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); 3260 if (!intel_sdvo) 3261 return false; 3262 3263 intel_sdvo->sdvo_reg = sdvo_reg; 3264 intel_sdvo->port = port; 3265 intel_sdvo->slave_addr = 3266 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1; 3267 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo); 3268 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv)) 3269 goto err_i2c_bus; 3270 3271 /* encoder type will be decided later */ 3272 intel_encoder = &intel_sdvo->base; 3273 intel_encoder->type = INTEL_OUTPUT_SDVO; 3274 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; 3275 intel_encoder->port = port; 3276 drm_encoder_init(&dev_priv->drm, &intel_encoder->base, 3277 &intel_sdvo_enc_funcs, 0, 3278 "SDVO %c", port_name(port)); 3279 3280 /* Read the regs to test if we can talk to the device */ 3281 for (i = 0; i < 0x40; i++) { 3282 u8 byte; 3283 3284 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 3285 drm_dbg_kms(&dev_priv->drm, 3286 "No SDVO device found on %s\n", 3287 SDVO_NAME(intel_sdvo)); 3288 goto err; 3289 } 3290 } 3291 3292 intel_encoder->compute_config = intel_sdvo_compute_config; 3293 if (HAS_PCH_SPLIT(dev_priv)) { 3294 intel_encoder->disable = pch_disable_sdvo; 3295 intel_encoder->post_disable = pch_post_disable_sdvo; 3296 } else { 3297 intel_encoder->disable = intel_disable_sdvo; 3298 } 3299 intel_encoder->pre_enable = intel_sdvo_pre_enable; 3300 intel_encoder->enable = intel_enable_sdvo; 3301 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 3302 intel_encoder->get_config = intel_sdvo_get_config; 3303 3304 /* In default case sdvo lvds is false */ 3305 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 3306 goto err; 3307 3308 if (intel_sdvo_output_setup(intel_sdvo, 3309 intel_sdvo->caps.output_flags) != true) { 3310 drm_dbg_kms(&dev_priv->drm, 3311 "SDVO output failed to setup on %s\n", 3312 SDVO_NAME(intel_sdvo)); 3313 /* Output_setup can leave behind connectors! */ 3314 goto err_output; 3315 } 3316 3317 /* 3318 * Only enable the hotplug irq if we need it, to work around noisy 3319 * hotplug lines. 3320 */ 3321 if (intel_sdvo->hotplug_active) { 3322 if (intel_sdvo->port == PORT_B) 3323 intel_encoder->hpd_pin = HPD_SDVO_B; 3324 else 3325 intel_encoder->hpd_pin = HPD_SDVO_C; 3326 } 3327 3328 /* 3329 * Cloning SDVO with anything is often impossible, since the SDVO 3330 * encoder can request a special input timing mode. And even if that's 3331 * not the case we have evidence that cloning a plain unscaled mode with 3332 * VGA doesn't really work. Furthermore the cloning flags are way too 3333 * simplistic anyway to express such constraints, so just give up on 3334 * cloning for SDVO encoders. 3335 */ 3336 intel_sdvo->base.cloneable = 0; 3337 3338 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo); 3339 3340 /* Set the input timing to the screen. Assume always input 0. */ 3341 if (!intel_sdvo_set_target_input(intel_sdvo)) 3342 goto err_output; 3343 3344 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 3345 &intel_sdvo->pixel_clock_min, 3346 &intel_sdvo->pixel_clock_max)) 3347 goto err_output; 3348 3349 drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, " 3350 "clock range %dMHz - %dMHz, " 3351 "input 1: %c, input 2: %c, " 3352 "output 1: %c, output 2: %c\n", 3353 SDVO_NAME(intel_sdvo), 3354 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 3355 intel_sdvo->caps.device_rev_id, 3356 intel_sdvo->pixel_clock_min / 1000, 3357 intel_sdvo->pixel_clock_max / 1000, 3358 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 3359 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 3360 /* check currently supported outputs */ 3361 intel_sdvo->caps.output_flags & 3362 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 3363 intel_sdvo->caps.output_flags & 3364 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 3365 return true; 3366 3367 err_output: 3368 intel_sdvo_output_cleanup(intel_sdvo); 3369 3370 err: 3371 drm_encoder_cleanup(&intel_encoder->base); 3372 i2c_del_adapter(&intel_sdvo->ddc); 3373 err_i2c_bus: 3374 intel_sdvo_unselect_i2c_bus(intel_sdvo); 3375 kfree(intel_sdvo); 3376 3377 return false; 3378 } 3379