1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 32 33 #include <linux/kernel.h> 34 #include <linux/moduleparam.h> 35 #include <linux/pwm.h> 36 37 #include "intel_connector.h" 38 #include "intel_display_types.h" 39 #include "intel_dp_aux_backlight.h" 40 #include "intel_dsi_dcs_backlight.h" 41 #include "intel_panel.h" 42 43 void 44 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 45 struct drm_display_mode *adjusted_mode) 46 { 47 drm_mode_copy(adjusted_mode, fixed_mode); 48 49 drm_mode_set_crtcinfo(adjusted_mode, 0); 50 } 51 52 static bool is_downclock_mode(const struct drm_display_mode *downclock_mode, 53 const struct drm_display_mode *fixed_mode) 54 { 55 return drm_mode_match(downclock_mode, fixed_mode, 56 DRM_MODE_MATCH_TIMINGS | 57 DRM_MODE_MATCH_FLAGS | 58 DRM_MODE_MATCH_3D_FLAGS) && 59 downclock_mode->clock < fixed_mode->clock; 60 } 61 62 struct drm_display_mode * 63 intel_panel_edid_downclock_mode(struct intel_connector *connector, 64 const struct drm_display_mode *fixed_mode) 65 { 66 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 67 const struct drm_display_mode *scan, *best_mode = NULL; 68 struct drm_display_mode *downclock_mode; 69 int best_clock = fixed_mode->clock; 70 71 list_for_each_entry(scan, &connector->base.probed_modes, head) { 72 /* 73 * If one mode has the same resolution with the fixed_panel 74 * mode while they have the different refresh rate, it means 75 * that the reduced downclock is found. In such 76 * case we can set the different FPx0/1 to dynamically select 77 * between low and high frequency. 78 */ 79 if (is_downclock_mode(scan, fixed_mode) && 80 scan->clock < best_clock) { 81 /* 82 * The downclock is already found. But we 83 * expect to find the lower downclock. 84 */ 85 best_clock = scan->clock; 86 best_mode = scan; 87 } 88 } 89 90 if (!best_mode) 91 return NULL; 92 93 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode); 94 if (!downclock_mode) 95 return NULL; 96 97 drm_dbg_kms(&dev_priv->drm, 98 "[CONNECTOR:%d:%s] using downclock mode from EDID: ", 99 connector->base.base.id, connector->base.name); 100 drm_mode_debug_printmodeline(downclock_mode); 101 102 return downclock_mode; 103 } 104 105 struct drm_display_mode * 106 intel_panel_edid_fixed_mode(struct intel_connector *connector) 107 { 108 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 109 const struct drm_display_mode *scan; 110 struct drm_display_mode *fixed_mode; 111 112 if (list_empty(&connector->base.probed_modes)) 113 return NULL; 114 115 /* prefer fixed mode from EDID if available */ 116 list_for_each_entry(scan, &connector->base.probed_modes, head) { 117 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0) 118 continue; 119 120 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 121 if (!fixed_mode) 122 return NULL; 123 124 drm_dbg_kms(&dev_priv->drm, 125 "[CONNECTOR:%d:%s] using preferred mode from EDID: ", 126 connector->base.base.id, connector->base.name); 127 drm_mode_debug_printmodeline(fixed_mode); 128 129 return fixed_mode; 130 } 131 132 scan = list_first_entry(&connector->base.probed_modes, 133 typeof(*scan), head); 134 135 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 136 if (!fixed_mode) 137 return NULL; 138 139 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 140 141 drm_dbg_kms(&dev_priv->drm, 142 "[CONNECTOR:%d:%s] using first mode from EDID: ", 143 connector->base.base.id, connector->base.name); 144 drm_mode_debug_printmodeline(fixed_mode); 145 146 return fixed_mode; 147 } 148 149 struct drm_display_mode * 150 intel_panel_vbt_fixed_mode(struct intel_connector *connector) 151 { 152 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 153 struct drm_display_info *info = &connector->base.display_info; 154 struct drm_display_mode *fixed_mode; 155 156 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 157 return NULL; 158 159 fixed_mode = drm_mode_duplicate(&dev_priv->drm, 160 dev_priv->vbt.lfp_lvds_vbt_mode); 161 if (!fixed_mode) 162 return NULL; 163 164 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 165 166 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ", 167 connector->base.base.id, connector->base.name); 168 drm_mode_debug_printmodeline(fixed_mode); 169 170 info->width_mm = fixed_mode->width_mm; 171 info->height_mm = fixed_mode->height_mm; 172 173 return fixed_mode; 174 } 175 176 /* adjusted_mode has been preset to be the panel's fixed mode */ 177 int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state, 178 const struct drm_connector_state *conn_state) 179 { 180 const struct drm_display_mode *adjusted_mode = 181 &crtc_state->hw.adjusted_mode; 182 int x, y, width, height; 183 184 /* Native modes don't need fitting */ 185 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 186 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h && 187 crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) 188 return 0; 189 190 switch (conn_state->scaling_mode) { 191 case DRM_MODE_SCALE_CENTER: 192 width = crtc_state->pipe_src_w; 193 height = crtc_state->pipe_src_h; 194 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 195 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 196 break; 197 198 case DRM_MODE_SCALE_ASPECT: 199 /* Scale but preserve the aspect ratio */ 200 { 201 u32 scaled_width = adjusted_mode->crtc_hdisplay 202 * crtc_state->pipe_src_h; 203 u32 scaled_height = crtc_state->pipe_src_w 204 * adjusted_mode->crtc_vdisplay; 205 if (scaled_width > scaled_height) { /* pillar */ 206 width = scaled_height / crtc_state->pipe_src_h; 207 if (width & 1) 208 width++; 209 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 210 y = 0; 211 height = adjusted_mode->crtc_vdisplay; 212 } else if (scaled_width < scaled_height) { /* letter */ 213 height = scaled_width / crtc_state->pipe_src_w; 214 if (height & 1) 215 height++; 216 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 217 x = 0; 218 width = adjusted_mode->crtc_hdisplay; 219 } else { 220 x = y = 0; 221 width = adjusted_mode->crtc_hdisplay; 222 height = adjusted_mode->crtc_vdisplay; 223 } 224 } 225 break; 226 227 case DRM_MODE_SCALE_NONE: 228 WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w); 229 WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h); 230 fallthrough; 231 case DRM_MODE_SCALE_FULLSCREEN: 232 x = y = 0; 233 width = adjusted_mode->crtc_hdisplay; 234 height = adjusted_mode->crtc_vdisplay; 235 break; 236 237 default: 238 MISSING_CASE(conn_state->scaling_mode); 239 return -EINVAL; 240 } 241 242 drm_rect_init(&crtc_state->pch_pfit.dst, 243 x, y, width, height); 244 crtc_state->pch_pfit.enabled = true; 245 246 return 0; 247 } 248 249 static void 250 centre_horizontally(struct drm_display_mode *adjusted_mode, 251 int width) 252 { 253 u32 border, sync_pos, blank_width, sync_width; 254 255 /* keep the hsync and hblank widths constant */ 256 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 257 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 258 sync_pos = (blank_width - sync_width + 1) / 2; 259 260 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 261 border += border & 1; /* make the border even */ 262 263 adjusted_mode->crtc_hdisplay = width; 264 adjusted_mode->crtc_hblank_start = width + border; 265 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 266 267 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 268 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 269 } 270 271 static void 272 centre_vertically(struct drm_display_mode *adjusted_mode, 273 int height) 274 { 275 u32 border, sync_pos, blank_width, sync_width; 276 277 /* keep the vsync and vblank widths constant */ 278 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 279 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 280 sync_pos = (blank_width - sync_width + 1) / 2; 281 282 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 283 284 adjusted_mode->crtc_vdisplay = height; 285 adjusted_mode->crtc_vblank_start = height + border; 286 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 287 288 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 289 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 290 } 291 292 static u32 panel_fitter_scaling(u32 source, u32 target) 293 { 294 /* 295 * Floating point operation is not supported. So the FACTOR 296 * is defined, which can avoid the floating point computation 297 * when calculating the panel ratio. 298 */ 299 #define ACCURACY 12 300 #define FACTOR (1 << ACCURACY) 301 u32 ratio = source * FACTOR / target; 302 return (FACTOR * ratio + FACTOR/2) / FACTOR; 303 } 304 305 static void i965_scale_aspect(struct intel_crtc_state *crtc_state, 306 u32 *pfit_control) 307 { 308 const struct drm_display_mode *adjusted_mode = 309 &crtc_state->hw.adjusted_mode; 310 u32 scaled_width = adjusted_mode->crtc_hdisplay * 311 crtc_state->pipe_src_h; 312 u32 scaled_height = crtc_state->pipe_src_w * 313 adjusted_mode->crtc_vdisplay; 314 315 /* 965+ is easy, it does everything in hw */ 316 if (scaled_width > scaled_height) 317 *pfit_control |= PFIT_ENABLE | 318 PFIT_SCALING_PILLAR; 319 else if (scaled_width < scaled_height) 320 *pfit_control |= PFIT_ENABLE | 321 PFIT_SCALING_LETTER; 322 else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w) 323 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 324 } 325 326 static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state, 327 u32 *pfit_control, u32 *pfit_pgm_ratios, 328 u32 *border) 329 { 330 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 331 u32 scaled_width = adjusted_mode->crtc_hdisplay * 332 crtc_state->pipe_src_h; 333 u32 scaled_height = crtc_state->pipe_src_w * 334 adjusted_mode->crtc_vdisplay; 335 u32 bits; 336 337 /* 338 * For earlier chips we have to calculate the scaling 339 * ratio by hand and program it into the 340 * PFIT_PGM_RATIO register 341 */ 342 if (scaled_width > scaled_height) { /* pillar */ 343 centre_horizontally(adjusted_mode, 344 scaled_height / 345 crtc_state->pipe_src_h); 346 347 *border = LVDS_BORDER_ENABLE; 348 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) { 349 bits = panel_fitter_scaling(crtc_state->pipe_src_h, 350 adjusted_mode->crtc_vdisplay); 351 352 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 353 bits << PFIT_VERT_SCALE_SHIFT); 354 *pfit_control |= (PFIT_ENABLE | 355 VERT_INTERP_BILINEAR | 356 HORIZ_INTERP_BILINEAR); 357 } 358 } else if (scaled_width < scaled_height) { /* letter */ 359 centre_vertically(adjusted_mode, 360 scaled_width / 361 crtc_state->pipe_src_w); 362 363 *border = LVDS_BORDER_ENABLE; 364 if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 365 bits = panel_fitter_scaling(crtc_state->pipe_src_w, 366 adjusted_mode->crtc_hdisplay); 367 368 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 369 bits << PFIT_VERT_SCALE_SHIFT); 370 *pfit_control |= (PFIT_ENABLE | 371 VERT_INTERP_BILINEAR | 372 HORIZ_INTERP_BILINEAR); 373 } 374 } else { 375 /* Aspects match, Let hw scale both directions */ 376 *pfit_control |= (PFIT_ENABLE | 377 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 378 VERT_INTERP_BILINEAR | 379 HORIZ_INTERP_BILINEAR); 380 } 381 } 382 383 int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state, 384 const struct drm_connector_state *conn_state) 385 { 386 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 387 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 388 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 389 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 390 391 /* Native modes don't need fitting */ 392 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 393 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h) 394 goto out; 395 396 switch (conn_state->scaling_mode) { 397 case DRM_MODE_SCALE_CENTER: 398 /* 399 * For centered modes, we have to calculate border widths & 400 * heights and modify the values programmed into the CRTC. 401 */ 402 centre_horizontally(adjusted_mode, crtc_state->pipe_src_w); 403 centre_vertically(adjusted_mode, crtc_state->pipe_src_h); 404 border = LVDS_BORDER_ENABLE; 405 break; 406 case DRM_MODE_SCALE_ASPECT: 407 /* Scale but preserve the aspect ratio */ 408 if (DISPLAY_VER(dev_priv) >= 4) 409 i965_scale_aspect(crtc_state, &pfit_control); 410 else 411 i9xx_scale_aspect(crtc_state, &pfit_control, 412 &pfit_pgm_ratios, &border); 413 break; 414 case DRM_MODE_SCALE_FULLSCREEN: 415 /* 416 * Full scaling, even if it changes the aspect ratio. 417 * Fortunately this is all done for us in hw. 418 */ 419 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay || 420 crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 421 pfit_control |= PFIT_ENABLE; 422 if (DISPLAY_VER(dev_priv) >= 4) 423 pfit_control |= PFIT_SCALING_AUTO; 424 else 425 pfit_control |= (VERT_AUTO_SCALE | 426 VERT_INTERP_BILINEAR | 427 HORIZ_AUTO_SCALE | 428 HORIZ_INTERP_BILINEAR); 429 } 430 break; 431 default: 432 MISSING_CASE(conn_state->scaling_mode); 433 return -EINVAL; 434 } 435 436 /* 965+ wants fuzzy fitting */ 437 /* FIXME: handle multiple panels by failing gracefully */ 438 if (DISPLAY_VER(dev_priv) >= 4) 439 pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY; 440 441 out: 442 if ((pfit_control & PFIT_ENABLE) == 0) { 443 pfit_control = 0; 444 pfit_pgm_ratios = 0; 445 } 446 447 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 448 if (DISPLAY_VER(dev_priv) < 4 && crtc_state->pipe_bpp == 18) 449 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 450 451 crtc_state->gmch_pfit.control = pfit_control; 452 crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 453 crtc_state->gmch_pfit.lvds_border_bits = border; 454 455 return 0; 456 } 457 458 /** 459 * scale - scale values from one range to another 460 * @source_val: value in range [@source_min..@source_max] 461 * @source_min: minimum legal value for @source_val 462 * @source_max: maximum legal value for @source_val 463 * @target_min: corresponding target value for @source_min 464 * @target_max: corresponding target value for @source_max 465 * 466 * Return @source_val in range [@source_min..@source_max] scaled to range 467 * [@target_min..@target_max]. 468 */ 469 static u32 scale(u32 source_val, 470 u32 source_min, u32 source_max, 471 u32 target_min, u32 target_max) 472 { 473 u64 target_val; 474 475 WARN_ON(source_min > source_max); 476 WARN_ON(target_min > target_max); 477 478 /* defensive */ 479 source_val = clamp(source_val, source_min, source_max); 480 481 /* avoid overflows */ 482 target_val = mul_u32_u32(source_val - source_min, 483 target_max - target_min); 484 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); 485 target_val += target_min; 486 487 return target_val; 488 } 489 490 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 491 * to [hw_min..hw_max]. */ 492 static u32 clamp_user_to_hw(struct intel_connector *connector, 493 u32 user_level, u32 user_max) 494 { 495 struct intel_panel *panel = &connector->panel; 496 u32 hw_level; 497 498 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 499 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 500 501 return hw_level; 502 } 503 504 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 505 static u32 scale_hw_to_user(struct intel_connector *connector, 506 u32 hw_level, u32 user_max) 507 { 508 struct intel_panel *panel = &connector->panel; 509 510 return scale(hw_level, panel->backlight.min, panel->backlight.max, 511 0, user_max); 512 } 513 514 u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 val) 515 { 516 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 517 struct intel_panel *panel = &connector->panel; 518 519 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 520 521 if (dev_priv->params.invert_brightness < 0) 522 return val; 523 524 if (dev_priv->params.invert_brightness > 0 || 525 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 526 return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min; 527 } 528 529 return val; 530 } 531 532 void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val) 533 { 534 struct intel_connector *connector = to_intel_connector(conn_state->connector); 535 struct drm_i915_private *i915 = to_i915(connector->base.dev); 536 struct intel_panel *panel = &connector->panel; 537 538 drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val); 539 panel->backlight.pwm_funcs->set(conn_state, val); 540 } 541 542 u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) 543 { 544 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 545 struct intel_panel *panel = &connector->panel; 546 547 drm_WARN_ON_ONCE(&dev_priv->drm, 548 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); 549 550 val = scale(val, panel->backlight.min, panel->backlight.max, 551 panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); 552 553 return intel_panel_invert_pwm_level(connector, val); 554 } 555 556 u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) 557 { 558 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 559 struct intel_panel *panel = &connector->panel; 560 561 drm_WARN_ON_ONCE(&dev_priv->drm, 562 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); 563 564 if (dev_priv->params.invert_brightness > 0 || 565 (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)) 566 val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min); 567 568 return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max, 569 panel->backlight.min, panel->backlight.max); 570 } 571 572 static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused) 573 { 574 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 575 576 return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 577 } 578 579 static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused) 580 { 581 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 582 583 return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 584 } 585 586 static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused) 587 { 588 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 589 struct intel_panel *panel = &connector->panel; 590 u32 val; 591 592 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 593 if (DISPLAY_VER(dev_priv) < 4) 594 val >>= 1; 595 596 if (panel->backlight.combination_mode) { 597 u8 lbpc; 598 599 pci_read_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, &lbpc); 600 val *= lbpc; 601 } 602 603 return val; 604 } 605 606 static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe) 607 { 608 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 609 610 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 611 return 0; 612 613 return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 614 } 615 616 static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused) 617 { 618 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 619 struct intel_panel *panel = &connector->panel; 620 621 return intel_de_read(dev_priv, 622 BXT_BLC_PWM_DUTY(panel->backlight.controller)); 623 } 624 625 static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused) 626 { 627 struct intel_panel *panel = &connector->panel; 628 struct pwm_state state; 629 630 pwm_get_state(panel->backlight.pwm, &state); 631 return pwm_get_relative_duty_cycle(&state, 100); 632 } 633 634 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 635 { 636 struct intel_connector *connector = to_intel_connector(conn_state->connector); 637 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 638 639 u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 640 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level); 641 } 642 643 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) 644 { 645 struct intel_connector *connector = to_intel_connector(conn_state->connector); 646 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 647 u32 tmp; 648 649 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 650 intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level); 651 } 652 653 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) 654 { 655 struct intel_connector *connector = to_intel_connector(conn_state->connector); 656 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 657 struct intel_panel *panel = &connector->panel; 658 u32 tmp, mask; 659 660 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 661 662 if (panel->backlight.combination_mode) { 663 u8 lbpc; 664 665 lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1; 666 level /= lbpc; 667 pci_write_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, lbpc); 668 } 669 670 if (IS_DISPLAY_VER(dev_priv, 4)) { 671 mask = BACKLIGHT_DUTY_CYCLE_MASK; 672 } else { 673 level <<= 1; 674 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 675 } 676 677 tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; 678 intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); 679 } 680 681 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) 682 { 683 struct intel_connector *connector = to_intel_connector(conn_state->connector); 684 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 685 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 686 u32 tmp; 687 688 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 689 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level); 690 } 691 692 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 693 { 694 struct intel_connector *connector = to_intel_connector(conn_state->connector); 695 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 696 struct intel_panel *panel = &connector->panel; 697 698 intel_de_write(dev_priv, 699 BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 700 } 701 702 static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 703 { 704 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; 705 706 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 707 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 708 } 709 710 static void 711 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) 712 { 713 struct intel_connector *connector = to_intel_connector(conn_state->connector); 714 struct drm_i915_private *i915 = to_i915(connector->base.dev); 715 struct intel_panel *panel = &connector->panel; 716 717 drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level); 718 719 panel->backlight.funcs->set(conn_state, level); 720 } 721 722 /* set backlight brightness to level in range [0..max], assuming hw min is 723 * respected. 724 */ 725 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, 726 u32 user_level, u32 user_max) 727 { 728 struct intel_connector *connector = to_intel_connector(conn_state->connector); 729 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 730 struct intel_panel *panel = &connector->panel; 731 u32 hw_level; 732 733 /* 734 * Lack of crtc may occur during driver init because 735 * connection_mutex isn't held across the entire backlight 736 * setup + modeset readout, and the BIOS can issue the 737 * requests at any time. 738 */ 739 if (!panel->backlight.present || !conn_state->crtc) 740 return; 741 742 mutex_lock(&dev_priv->backlight_lock); 743 744 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 745 746 hw_level = clamp_user_to_hw(connector, user_level, user_max); 747 panel->backlight.level = hw_level; 748 749 if (panel->backlight.device) 750 panel->backlight.device->props.brightness = 751 scale_hw_to_user(connector, 752 panel->backlight.level, 753 panel->backlight.device->props.max_brightness); 754 755 if (panel->backlight.enabled) 756 intel_panel_actually_set_backlight(conn_state, hw_level); 757 758 mutex_unlock(&dev_priv->backlight_lock); 759 } 760 761 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) 762 { 763 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 764 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 765 u32 tmp; 766 767 intel_panel_set_pwm_level(old_conn_state, level); 768 769 /* 770 * Although we don't support or enable CPU PWM with LPT/SPT based 771 * systems, it may have been enabled prior to loading the 772 * driver. Disable to avoid warnings on LCPLL disable. 773 * 774 * This needs rework if we need to add support for CPU PWM on PCH split 775 * platforms. 776 */ 777 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 778 if (tmp & BLM_PWM_ENABLE) { 779 drm_dbg_kms(&dev_priv->drm, 780 "cpu backlight was enabled, disabling\n"); 781 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 782 tmp & ~BLM_PWM_ENABLE); 783 } 784 785 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 786 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 787 } 788 789 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 790 { 791 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 792 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 793 u32 tmp; 794 795 intel_panel_set_pwm_level(old_conn_state, val); 796 797 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 798 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 799 800 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 801 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 802 } 803 804 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 805 { 806 intel_panel_set_pwm_level(old_conn_state, val); 807 } 808 809 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 810 { 811 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); 812 u32 tmp; 813 814 intel_panel_set_pwm_level(old_conn_state, val); 815 816 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); 817 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 818 } 819 820 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 821 { 822 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 823 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 824 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; 825 u32 tmp; 826 827 intel_panel_set_pwm_level(old_conn_state, val); 828 829 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 830 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 831 tmp & ~BLM_PWM_ENABLE); 832 } 833 834 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 835 { 836 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 837 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 838 struct intel_panel *panel = &connector->panel; 839 u32 tmp; 840 841 intel_panel_set_pwm_level(old_conn_state, val); 842 843 tmp = intel_de_read(dev_priv, 844 BXT_BLC_PWM_CTL(panel->backlight.controller)); 845 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 846 tmp & ~BXT_BLC_PWM_ENABLE); 847 848 if (panel->backlight.controller == 1) { 849 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 850 val &= ~UTIL_PIN_ENABLE; 851 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 852 } 853 } 854 855 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 856 { 857 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 858 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 859 struct intel_panel *panel = &connector->panel; 860 u32 tmp; 861 862 intel_panel_set_pwm_level(old_conn_state, val); 863 864 tmp = intel_de_read(dev_priv, 865 BXT_BLC_PWM_CTL(panel->backlight.controller)); 866 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 867 tmp & ~BXT_BLC_PWM_ENABLE); 868 } 869 870 static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) 871 { 872 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 873 struct intel_panel *panel = &connector->panel; 874 875 panel->backlight.pwm_state.enabled = false; 876 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 877 } 878 879 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) 880 { 881 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 882 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 883 struct intel_panel *panel = &connector->panel; 884 885 if (!panel->backlight.present) 886 return; 887 888 /* 889 * Do not disable backlight on the vga_switcheroo path. When switching 890 * away from i915, the other client may depend on i915 to handle the 891 * backlight. This will leave the backlight on unnecessarily when 892 * another client is not activated. 893 */ 894 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 895 drm_dbg_kms(&dev_priv->drm, 896 "Skipping backlight disable on vga switch\n"); 897 return; 898 } 899 900 mutex_lock(&dev_priv->backlight_lock); 901 902 if (panel->backlight.device) 903 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 904 panel->backlight.enabled = false; 905 panel->backlight.funcs->disable(old_conn_state, 0); 906 907 mutex_unlock(&dev_priv->backlight_lock); 908 } 909 910 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 911 const struct drm_connector_state *conn_state, u32 level) 912 { 913 struct intel_connector *connector = to_intel_connector(conn_state->connector); 914 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 915 struct intel_panel *panel = &connector->panel; 916 u32 pch_ctl1, pch_ctl2, schicken; 917 918 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 919 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 920 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 921 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 922 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 923 } 924 925 if (HAS_PCH_LPT(dev_priv)) { 926 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2); 927 if (panel->backlight.alternate_pwm_increment) 928 schicken |= LPT_PWM_GRANULARITY; 929 else 930 schicken &= ~LPT_PWM_GRANULARITY; 931 intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken); 932 } else { 933 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1); 934 if (panel->backlight.alternate_pwm_increment) 935 schicken |= SPT_PWM_GRANULARITY; 936 else 937 schicken &= ~SPT_PWM_GRANULARITY; 938 intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken); 939 } 940 941 pch_ctl2 = panel->backlight.pwm_level_max << 16; 942 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 943 944 pch_ctl1 = 0; 945 if (panel->backlight.active_low_pwm) 946 pch_ctl1 |= BLM_PCH_POLARITY; 947 948 /* After LPT, override is the default. */ 949 if (HAS_PCH_LPT(dev_priv)) 950 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 951 952 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 953 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 954 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 955 pch_ctl1 | BLM_PCH_PWM_ENABLE); 956 957 /* This won't stick until the above enable. */ 958 intel_panel_set_pwm_level(conn_state, level); 959 } 960 961 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, 962 const struct drm_connector_state *conn_state, u32 level) 963 { 964 struct intel_connector *connector = to_intel_connector(conn_state->connector); 965 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 966 struct intel_panel *panel = &connector->panel; 967 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 968 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 969 970 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 971 if (cpu_ctl2 & BLM_PWM_ENABLE) { 972 drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); 973 cpu_ctl2 &= ~BLM_PWM_ENABLE; 974 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 975 } 976 977 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 978 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 979 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 980 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 981 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 982 } 983 984 if (cpu_transcoder == TRANSCODER_EDP) 985 cpu_ctl2 = BLM_TRANSCODER_EDP; 986 else 987 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 988 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 989 intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); 990 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 991 992 /* This won't stick until the above enable. */ 993 intel_panel_set_pwm_level(conn_state, level); 994 995 pch_ctl2 = panel->backlight.pwm_level_max << 16; 996 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 997 998 pch_ctl1 = 0; 999 if (panel->backlight.active_low_pwm) 1000 pch_ctl1 |= BLM_PCH_POLARITY; 1001 1002 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 1003 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 1004 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1005 pch_ctl1 | BLM_PCH_PWM_ENABLE); 1006 } 1007 1008 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, 1009 const struct drm_connector_state *conn_state, u32 level) 1010 { 1011 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1012 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1013 struct intel_panel *panel = &connector->panel; 1014 u32 ctl, freq; 1015 1016 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1017 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 1018 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1019 intel_de_write(dev_priv, BLC_PWM_CTL, 0); 1020 } 1021 1022 freq = panel->backlight.pwm_level_max; 1023 if (panel->backlight.combination_mode) 1024 freq /= 0xff; 1025 1026 ctl = freq << 17; 1027 if (panel->backlight.combination_mode) 1028 ctl |= BLM_LEGACY_MODE; 1029 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 1030 ctl |= BLM_POLARITY_PNV; 1031 1032 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1033 intel_de_posting_read(dev_priv, BLC_PWM_CTL); 1034 1035 /* XXX: combine this into above write? */ 1036 intel_panel_set_pwm_level(conn_state, level); 1037 1038 /* 1039 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 1040 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 1041 * that has backlight. 1042 */ 1043 if (IS_DISPLAY_VER(dev_priv, 2)) 1044 intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 1045 } 1046 1047 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, 1048 const struct drm_connector_state *conn_state, u32 level) 1049 { 1050 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1051 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1052 struct intel_panel *panel = &connector->panel; 1053 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 1054 u32 ctl, ctl2, freq; 1055 1056 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1057 if (ctl2 & BLM_PWM_ENABLE) { 1058 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1059 ctl2 &= ~BLM_PWM_ENABLE; 1060 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1061 } 1062 1063 freq = panel->backlight.pwm_level_max; 1064 if (panel->backlight.combination_mode) 1065 freq /= 0xff; 1066 1067 ctl = freq << 16; 1068 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1069 1070 ctl2 = BLM_PIPE(pipe); 1071 if (panel->backlight.combination_mode) 1072 ctl2 |= BLM_COMBINATION_MODE; 1073 if (panel->backlight.active_low_pwm) 1074 ctl2 |= BLM_POLARITY_I965; 1075 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1076 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); 1077 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1078 1079 intel_panel_set_pwm_level(conn_state, level); 1080 } 1081 1082 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, 1083 const struct drm_connector_state *conn_state, u32 level) 1084 { 1085 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1086 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1087 struct intel_panel *panel = &connector->panel; 1088 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1089 u32 ctl, ctl2; 1090 1091 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1092 if (ctl2 & BLM_PWM_ENABLE) { 1093 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1094 ctl2 &= ~BLM_PWM_ENABLE; 1095 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1096 } 1097 1098 ctl = panel->backlight.pwm_level_max << 16; 1099 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl); 1100 1101 /* XXX: combine this into above write? */ 1102 intel_panel_set_pwm_level(conn_state, level); 1103 1104 ctl2 = 0; 1105 if (panel->backlight.active_low_pwm) 1106 ctl2 |= BLM_POLARITY_I965; 1107 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1108 intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1109 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 1110 ctl2 | BLM_PWM_ENABLE); 1111 } 1112 1113 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, 1114 const struct drm_connector_state *conn_state, u32 level) 1115 { 1116 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1117 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1118 struct intel_panel *panel = &connector->panel; 1119 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1120 u32 pwm_ctl, val; 1121 1122 /* Controller 1 uses the utility pin. */ 1123 if (panel->backlight.controller == 1) { 1124 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1125 if (val & UTIL_PIN_ENABLE) { 1126 drm_dbg_kms(&dev_priv->drm, 1127 "util pin already enabled\n"); 1128 val &= ~UTIL_PIN_ENABLE; 1129 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 1130 } 1131 1132 val = 0; 1133 if (panel->backlight.util_pin_active_low) 1134 val |= UTIL_PIN_POLARITY; 1135 intel_de_write(dev_priv, UTIL_PIN_CTL, 1136 val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1137 } 1138 1139 pwm_ctl = intel_de_read(dev_priv, 1140 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1141 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1142 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1143 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1144 intel_de_write(dev_priv, 1145 BXT_BLC_PWM_CTL(panel->backlight.controller), 1146 pwm_ctl); 1147 } 1148 1149 intel_de_write(dev_priv, 1150 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1151 panel->backlight.pwm_level_max); 1152 1153 intel_panel_set_pwm_level(conn_state, level); 1154 1155 pwm_ctl = 0; 1156 if (panel->backlight.active_low_pwm) 1157 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1158 1159 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1160 pwm_ctl); 1161 intel_de_posting_read(dev_priv, 1162 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1163 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1164 pwm_ctl | BXT_BLC_PWM_ENABLE); 1165 } 1166 1167 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, 1168 const struct drm_connector_state *conn_state, u32 level) 1169 { 1170 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1171 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1172 struct intel_panel *panel = &connector->panel; 1173 u32 pwm_ctl; 1174 1175 pwm_ctl = intel_de_read(dev_priv, 1176 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1177 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1178 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1179 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1180 intel_de_write(dev_priv, 1181 BXT_BLC_PWM_CTL(panel->backlight.controller), 1182 pwm_ctl); 1183 } 1184 1185 intel_de_write(dev_priv, 1186 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1187 panel->backlight.pwm_level_max); 1188 1189 intel_panel_set_pwm_level(conn_state, level); 1190 1191 pwm_ctl = 0; 1192 if (panel->backlight.active_low_pwm) 1193 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1194 1195 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1196 pwm_ctl); 1197 intel_de_posting_read(dev_priv, 1198 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1199 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1200 pwm_ctl | BXT_BLC_PWM_ENABLE); 1201 } 1202 1203 static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1204 const struct drm_connector_state *conn_state, u32 level) 1205 { 1206 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1207 struct intel_panel *panel = &connector->panel; 1208 1209 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 1210 panel->backlight.pwm_state.enabled = true; 1211 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1212 } 1213 1214 static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1215 const struct drm_connector_state *conn_state) 1216 { 1217 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1218 struct intel_panel *panel = &connector->panel; 1219 1220 WARN_ON(panel->backlight.max == 0); 1221 1222 if (panel->backlight.level <= panel->backlight.min) { 1223 panel->backlight.level = panel->backlight.max; 1224 if (panel->backlight.device) 1225 panel->backlight.device->props.brightness = 1226 scale_hw_to_user(connector, 1227 panel->backlight.level, 1228 panel->backlight.device->props.max_brightness); 1229 } 1230 1231 panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level); 1232 panel->backlight.enabled = true; 1233 if (panel->backlight.device) 1234 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1235 } 1236 1237 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1238 const struct drm_connector_state *conn_state) 1239 { 1240 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1241 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1242 struct intel_panel *panel = &connector->panel; 1243 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1244 1245 if (!panel->backlight.present) 1246 return; 1247 1248 drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe)); 1249 1250 mutex_lock(&dev_priv->backlight_lock); 1251 1252 __intel_panel_enable_backlight(crtc_state, conn_state); 1253 1254 mutex_unlock(&dev_priv->backlight_lock); 1255 } 1256 1257 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1258 static u32 intel_panel_get_backlight(struct intel_connector *connector) 1259 { 1260 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1261 struct intel_panel *panel = &connector->panel; 1262 u32 val = 0; 1263 1264 mutex_lock(&dev_priv->backlight_lock); 1265 1266 if (panel->backlight.enabled) 1267 val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector)); 1268 1269 mutex_unlock(&dev_priv->backlight_lock); 1270 1271 drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val); 1272 return val; 1273 } 1274 1275 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 1276 static u32 scale_user_to_hw(struct intel_connector *connector, 1277 u32 user_level, u32 user_max) 1278 { 1279 struct intel_panel *panel = &connector->panel; 1280 1281 return scale(user_level, 0, user_max, 1282 panel->backlight.min, panel->backlight.max); 1283 } 1284 1285 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 1286 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, 1287 u32 user_level, u32 user_max) 1288 { 1289 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1290 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1291 struct intel_panel *panel = &connector->panel; 1292 u32 hw_level; 1293 1294 if (!panel->backlight.present) 1295 return; 1296 1297 mutex_lock(&dev_priv->backlight_lock); 1298 1299 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 1300 1301 hw_level = scale_user_to_hw(connector, user_level, user_max); 1302 panel->backlight.level = hw_level; 1303 1304 if (panel->backlight.enabled) 1305 intel_panel_actually_set_backlight(conn_state, hw_level); 1306 1307 mutex_unlock(&dev_priv->backlight_lock); 1308 } 1309 1310 static int intel_backlight_device_update_status(struct backlight_device *bd) 1311 { 1312 struct intel_connector *connector = bl_get_data(bd); 1313 struct intel_panel *panel = &connector->panel; 1314 struct drm_device *dev = connector->base.dev; 1315 1316 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1317 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1318 bd->props.brightness, bd->props.max_brightness); 1319 intel_panel_set_backlight(connector->base.state, bd->props.brightness, 1320 bd->props.max_brightness); 1321 1322 /* 1323 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1324 * backlight class device does not make it easy to to differentiate 1325 * between callbacks for brightness and bl_power, so our backlight_power 1326 * callback needs to take this into account. 1327 */ 1328 if (panel->backlight.enabled) { 1329 if (panel->backlight.power) { 1330 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1331 bd->props.brightness != 0; 1332 panel->backlight.power(connector, enable); 1333 } 1334 } else { 1335 bd->props.power = FB_BLANK_POWERDOWN; 1336 } 1337 1338 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1339 return 0; 1340 } 1341 1342 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1343 { 1344 struct intel_connector *connector = bl_get_data(bd); 1345 struct drm_device *dev = connector->base.dev; 1346 struct drm_i915_private *dev_priv = to_i915(dev); 1347 intel_wakeref_t wakeref; 1348 int ret = 0; 1349 1350 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { 1351 u32 hw_level; 1352 1353 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1354 1355 hw_level = intel_panel_get_backlight(connector); 1356 ret = scale_hw_to_user(connector, 1357 hw_level, bd->props.max_brightness); 1358 1359 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1360 } 1361 1362 return ret; 1363 } 1364 1365 static const struct backlight_ops intel_backlight_device_ops = { 1366 .update_status = intel_backlight_device_update_status, 1367 .get_brightness = intel_backlight_device_get_brightness, 1368 }; 1369 1370 int intel_backlight_device_register(struct intel_connector *connector) 1371 { 1372 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1373 struct intel_panel *panel = &connector->panel; 1374 struct backlight_properties props; 1375 1376 if (WARN_ON(panel->backlight.device)) 1377 return -ENODEV; 1378 1379 if (!panel->backlight.present) 1380 return 0; 1381 1382 WARN_ON(panel->backlight.max == 0); 1383 1384 memset(&props, 0, sizeof(props)); 1385 props.type = BACKLIGHT_RAW; 1386 1387 /* 1388 * Note: Everything should work even if the backlight device max 1389 * presented to the userspace is arbitrarily chosen. 1390 */ 1391 props.max_brightness = panel->backlight.max; 1392 props.brightness = scale_hw_to_user(connector, 1393 panel->backlight.level, 1394 props.max_brightness); 1395 1396 if (panel->backlight.enabled) 1397 props.power = FB_BLANK_UNBLANK; 1398 else 1399 props.power = FB_BLANK_POWERDOWN; 1400 1401 /* 1402 * Note: using the same name independent of the connector prevents 1403 * registration of multiple backlight devices in the driver. 1404 */ 1405 panel->backlight.device = 1406 backlight_device_register("intel_backlight", 1407 connector->base.kdev, 1408 connector, 1409 &intel_backlight_device_ops, &props); 1410 1411 if (IS_ERR(panel->backlight.device)) { 1412 drm_err(&i915->drm, "Failed to register backlight: %ld\n", 1413 PTR_ERR(panel->backlight.device)); 1414 panel->backlight.device = NULL; 1415 return -ENODEV; 1416 } 1417 1418 drm_dbg_kms(&i915->drm, 1419 "Connector %s backlight sysfs interface registered\n", 1420 connector->base.name); 1421 1422 return 0; 1423 } 1424 1425 void intel_backlight_device_unregister(struct intel_connector *connector) 1426 { 1427 struct intel_panel *panel = &connector->panel; 1428 1429 if (panel->backlight.device) { 1430 backlight_device_unregister(panel->backlight.device); 1431 panel->backlight.device = NULL; 1432 } 1433 } 1434 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1435 1436 /* 1437 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. 1438 * PWM increment = 1 1439 */ 1440 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1441 { 1442 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1443 1444 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1445 pwm_freq_hz); 1446 } 1447 1448 /* 1449 * BXT: PWM clock frequency = 19.2 MHz. 1450 */ 1451 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1452 { 1453 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1454 } 1455 1456 /* 1457 * SPT: This value represents the period of the PWM stream in clock periods 1458 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1459 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1460 */ 1461 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1462 { 1463 struct intel_panel *panel = &connector->panel; 1464 u32 mul; 1465 1466 if (panel->backlight.alternate_pwm_increment) 1467 mul = 128; 1468 else 1469 mul = 16; 1470 1471 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1472 } 1473 1474 /* 1475 * LPT: This value represents the period of the PWM stream in clock periods 1476 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1477 * LPT SOUTH_CHICKEN2 register bit 5). 1478 */ 1479 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1480 { 1481 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1482 struct intel_panel *panel = &connector->panel; 1483 u32 mul, clock; 1484 1485 if (panel->backlight.alternate_pwm_increment) 1486 mul = 16; 1487 else 1488 mul = 128; 1489 1490 if (HAS_PCH_LPT_H(dev_priv)) 1491 clock = MHz(135); /* LPT:H */ 1492 else 1493 clock = MHz(24); /* LPT:LP */ 1494 1495 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1496 } 1497 1498 /* 1499 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1500 * display raw clocks multiplied by 128. 1501 */ 1502 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1503 { 1504 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1505 1506 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1507 pwm_freq_hz * 128); 1508 } 1509 1510 /* 1511 * Gen2: This field determines the number of time base events (display core 1512 * clock frequency/32) in total for a complete cycle of modulated backlight 1513 * control. 1514 * 1515 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1516 * divided by 32. 1517 */ 1518 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1519 { 1520 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1521 int clock; 1522 1523 if (IS_PINEVIEW(dev_priv)) 1524 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1525 else 1526 clock = KHz(dev_priv->cdclk.hw.cdclk); 1527 1528 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1529 } 1530 1531 /* 1532 * Gen4: This value represents the period of the PWM stream in display core 1533 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1534 * 1535 */ 1536 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1537 { 1538 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1539 int clock; 1540 1541 if (IS_G4X(dev_priv)) 1542 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1543 else 1544 clock = KHz(dev_priv->cdclk.hw.cdclk); 1545 1546 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1547 } 1548 1549 /* 1550 * VLV: This value represents the period of the PWM stream in display core 1551 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1552 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1553 */ 1554 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1555 { 1556 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1557 int mul, clock; 1558 1559 if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1560 if (IS_CHERRYVIEW(dev_priv)) 1561 clock = KHz(19200); 1562 else 1563 clock = MHz(25); 1564 mul = 16; 1565 } else { 1566 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1567 mul = 128; 1568 } 1569 1570 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1571 } 1572 1573 static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv) 1574 { 1575 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1576 1577 if (pwm_freq_hz) { 1578 drm_dbg_kms(&dev_priv->drm, 1579 "VBT defined backlight frequency %u Hz\n", 1580 pwm_freq_hz); 1581 } else { 1582 pwm_freq_hz = 200; 1583 drm_dbg_kms(&dev_priv->drm, 1584 "default backlight frequency %u Hz\n", 1585 pwm_freq_hz); 1586 } 1587 1588 return pwm_freq_hz; 1589 } 1590 1591 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1592 { 1593 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1594 struct intel_panel *panel = &connector->panel; 1595 u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv); 1596 u32 pwm; 1597 1598 if (!panel->backlight.pwm_funcs->hz_to_pwm) { 1599 drm_dbg_kms(&dev_priv->drm, 1600 "backlight frequency conversion not supported\n"); 1601 return 0; 1602 } 1603 1604 pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz); 1605 if (!pwm) { 1606 drm_dbg_kms(&dev_priv->drm, 1607 "backlight frequency conversion failed\n"); 1608 return 0; 1609 } 1610 1611 return pwm; 1612 } 1613 1614 /* 1615 * Note: The setup hooks can't assume pipe is set! 1616 */ 1617 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1618 { 1619 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1620 struct intel_panel *panel = &connector->panel; 1621 int min; 1622 1623 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 1624 1625 /* 1626 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1627 * to problems. There are such machines out there. Either our 1628 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1629 * against this by letting the minimum be at most (arbitrarily chosen) 1630 * 25% of the max. 1631 */ 1632 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1633 if (min != dev_priv->vbt.backlight.min_brightness) { 1634 drm_dbg_kms(&dev_priv->drm, 1635 "clamping VBT min backlight %d/255 to %d/255\n", 1636 dev_priv->vbt.backlight.min_brightness, min); 1637 } 1638 1639 /* vbt value is a coefficient in range [0..255] */ 1640 return scale(min, 0, 255, 0, panel->backlight.pwm_level_max); 1641 } 1642 1643 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1644 { 1645 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1646 struct intel_panel *panel = &connector->panel; 1647 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1648 bool alt, cpu_mode; 1649 1650 if (HAS_PCH_LPT(dev_priv)) 1651 alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1652 else 1653 alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1654 panel->backlight.alternate_pwm_increment = alt; 1655 1656 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1657 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1658 1659 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1660 panel->backlight.pwm_level_max = pch_ctl2 >> 16; 1661 1662 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1663 1664 if (!panel->backlight.pwm_level_max) 1665 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1666 1667 if (!panel->backlight.pwm_level_max) 1668 return -ENODEV; 1669 1670 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1671 1672 panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1673 1674 cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) && 1675 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && 1676 (cpu_ctl2 & BLM_PWM_ENABLE); 1677 1678 if (cpu_mode) { 1679 val = pch_get_backlight(connector, unused); 1680 1681 drm_dbg_kms(&dev_priv->drm, 1682 "CPU backlight register was enabled, switching to PCH override\n"); 1683 1684 /* Write converted CPU PWM value to PCH override register */ 1685 lpt_set_backlight(connector->base.state, val); 1686 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1687 pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); 1688 1689 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 1690 cpu_ctl2 & ~BLM_PWM_ENABLE); 1691 } 1692 1693 return 0; 1694 } 1695 1696 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) 1697 { 1698 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1699 struct intel_panel *panel = &connector->panel; 1700 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 1701 1702 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1703 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1704 1705 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1706 panel->backlight.pwm_level_max = pch_ctl2 >> 16; 1707 1708 if (!panel->backlight.pwm_level_max) 1709 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1710 1711 if (!panel->backlight.pwm_level_max) 1712 return -ENODEV; 1713 1714 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1715 1716 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1717 panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1718 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1719 1720 return 0; 1721 } 1722 1723 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) 1724 { 1725 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1726 struct intel_panel *panel = &connector->panel; 1727 u32 ctl, val; 1728 1729 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1730 1731 if (IS_DISPLAY_VER(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1732 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1733 1734 if (IS_PINEVIEW(dev_priv)) 1735 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1736 1737 panel->backlight.pwm_level_max = ctl >> 17; 1738 1739 if (!panel->backlight.pwm_level_max) { 1740 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1741 panel->backlight.pwm_level_max >>= 1; 1742 } 1743 1744 if (!panel->backlight.pwm_level_max) 1745 return -ENODEV; 1746 1747 if (panel->backlight.combination_mode) 1748 panel->backlight.pwm_level_max *= 0xff; 1749 1750 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1751 1752 val = i9xx_get_backlight(connector, unused); 1753 val = intel_panel_invert_pwm_level(connector, val); 1754 val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); 1755 1756 panel->backlight.pwm_enabled = val != 0; 1757 1758 return 0; 1759 } 1760 1761 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) 1762 { 1763 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1764 struct intel_panel *panel = &connector->panel; 1765 u32 ctl, ctl2; 1766 1767 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1768 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1769 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1770 1771 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1772 panel->backlight.pwm_level_max = ctl >> 16; 1773 1774 if (!panel->backlight.pwm_level_max) 1775 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1776 1777 if (!panel->backlight.pwm_level_max) 1778 return -ENODEV; 1779 1780 if (panel->backlight.combination_mode) 1781 panel->backlight.pwm_level_max *= 0xff; 1782 1783 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1784 1785 panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; 1786 1787 return 0; 1788 } 1789 1790 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) 1791 { 1792 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1793 struct intel_panel *panel = &connector->panel; 1794 u32 ctl, ctl2; 1795 1796 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 1797 return -ENODEV; 1798 1799 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1800 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1801 1802 ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)); 1803 panel->backlight.pwm_level_max = ctl >> 16; 1804 1805 if (!panel->backlight.pwm_level_max) 1806 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1807 1808 if (!panel->backlight.pwm_level_max) 1809 return -ENODEV; 1810 1811 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1812 1813 panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; 1814 1815 return 0; 1816 } 1817 1818 static int 1819 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1820 { 1821 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1822 struct intel_panel *panel = &connector->panel; 1823 u32 pwm_ctl, val; 1824 1825 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1826 1827 pwm_ctl = intel_de_read(dev_priv, 1828 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1829 1830 /* Controller 1 uses the utility pin. */ 1831 if (panel->backlight.controller == 1) { 1832 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1833 panel->backlight.util_pin_active_low = 1834 val & UTIL_PIN_POLARITY; 1835 } 1836 1837 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1838 panel->backlight.pwm_level_max = 1839 intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1840 1841 if (!panel->backlight.pwm_level_max) 1842 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1843 1844 if (!panel->backlight.pwm_level_max) 1845 return -ENODEV; 1846 1847 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1848 1849 panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1850 1851 return 0; 1852 } 1853 1854 static int 1855 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) 1856 { 1857 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1858 struct intel_panel *panel = &connector->panel; 1859 u32 pwm_ctl; 1860 1861 /* 1862 * CNP has the BXT implementation of backlight, but with only one 1863 * controller. TODO: ICP has multiple controllers but we only use 1864 * controller 0 for now. 1865 */ 1866 panel->backlight.controller = 0; 1867 1868 pwm_ctl = intel_de_read(dev_priv, 1869 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1870 1871 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1872 panel->backlight.pwm_level_max = 1873 intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1874 1875 if (!panel->backlight.pwm_level_max) 1876 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1877 1878 if (!panel->backlight.pwm_level_max) 1879 return -ENODEV; 1880 1881 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1882 1883 panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1884 1885 return 0; 1886 } 1887 1888 static int ext_pwm_setup_backlight(struct intel_connector *connector, 1889 enum pipe pipe) 1890 { 1891 struct drm_device *dev = connector->base.dev; 1892 struct drm_i915_private *dev_priv = to_i915(dev); 1893 struct intel_panel *panel = &connector->panel; 1894 const char *desc; 1895 u32 level; 1896 1897 /* Get the right PWM chip for DSI backlight according to VBT */ 1898 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { 1899 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); 1900 desc = "PMIC"; 1901 } else { 1902 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); 1903 desc = "SoC"; 1904 } 1905 1906 if (IS_ERR(panel->backlight.pwm)) { 1907 drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", 1908 desc); 1909 panel->backlight.pwm = NULL; 1910 return -ENODEV; 1911 } 1912 1913 panel->backlight.pwm_level_max = 100; /* 100% */ 1914 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1915 1916 if (pwm_is_enabled(panel->backlight.pwm)) { 1917 /* PWM is already enabled, use existing settings */ 1918 pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1919 1920 level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state, 1921 100); 1922 level = intel_panel_invert_pwm_level(connector, level); 1923 panel->backlight.pwm_enabled = true; 1924 1925 drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n", 1926 NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period, 1927 get_vbt_pwm_freq(dev_priv), level); 1928 } else { 1929 /* Set period from VBT frequency, leave other settings at 0. */ 1930 panel->backlight.pwm_state.period = 1931 NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv); 1932 } 1933 1934 drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", 1935 desc); 1936 return 0; 1937 } 1938 1939 static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 1940 { 1941 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1942 struct intel_panel *panel = &connector->panel; 1943 1944 panel->backlight.pwm_funcs->set(conn_state, 1945 intel_panel_invert_pwm_level(connector, level)); 1946 } 1947 1948 static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe) 1949 { 1950 struct intel_panel *panel = &connector->panel; 1951 1952 return intel_panel_invert_pwm_level(connector, 1953 panel->backlight.pwm_funcs->get(connector, pipe)); 1954 } 1955 1956 static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1957 const struct drm_connector_state *conn_state, u32 level) 1958 { 1959 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1960 struct intel_panel *panel = &connector->panel; 1961 1962 panel->backlight.pwm_funcs->enable(crtc_state, conn_state, 1963 intel_panel_invert_pwm_level(connector, level)); 1964 } 1965 1966 static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level) 1967 { 1968 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1969 struct intel_panel *panel = &connector->panel; 1970 1971 panel->backlight.pwm_funcs->disable(conn_state, 1972 intel_panel_invert_pwm_level(connector, level)); 1973 } 1974 1975 static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe) 1976 { 1977 struct intel_panel *panel = &connector->panel; 1978 int ret = panel->backlight.pwm_funcs->setup(connector, pipe); 1979 1980 if (ret < 0) 1981 return ret; 1982 1983 panel->backlight.min = panel->backlight.pwm_level_min; 1984 panel->backlight.max = panel->backlight.pwm_level_max; 1985 panel->backlight.level = intel_pwm_get_backlight(connector, pipe); 1986 panel->backlight.enabled = panel->backlight.pwm_enabled; 1987 1988 return 0; 1989 } 1990 1991 void intel_panel_update_backlight(struct intel_atomic_state *state, 1992 struct intel_encoder *encoder, 1993 const struct intel_crtc_state *crtc_state, 1994 const struct drm_connector_state *conn_state) 1995 { 1996 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1997 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1998 struct intel_panel *panel = &connector->panel; 1999 2000 if (!panel->backlight.present) 2001 return; 2002 2003 mutex_lock(&dev_priv->backlight_lock); 2004 if (!panel->backlight.enabled) 2005 __intel_panel_enable_backlight(crtc_state, conn_state); 2006 2007 mutex_unlock(&dev_priv->backlight_lock); 2008 } 2009 2010 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) 2011 { 2012 struct drm_i915_private *dev_priv = to_i915(connector->dev); 2013 struct intel_connector *intel_connector = to_intel_connector(connector); 2014 struct intel_panel *panel = &intel_connector->panel; 2015 int ret; 2016 2017 if (!dev_priv->vbt.backlight.present) { 2018 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 2019 drm_dbg_kms(&dev_priv->drm, 2020 "no backlight present per VBT, but present per quirk\n"); 2021 } else { 2022 drm_dbg_kms(&dev_priv->drm, 2023 "no backlight present per VBT\n"); 2024 return 0; 2025 } 2026 } 2027 2028 /* ensure intel_panel has been initialized first */ 2029 if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs)) 2030 return -ENODEV; 2031 2032 /* set level and max in panel struct */ 2033 mutex_lock(&dev_priv->backlight_lock); 2034 ret = panel->backlight.funcs->setup(intel_connector, pipe); 2035 mutex_unlock(&dev_priv->backlight_lock); 2036 2037 if (ret) { 2038 drm_dbg_kms(&dev_priv->drm, 2039 "failed to setup backlight for connector %s\n", 2040 connector->name); 2041 return ret; 2042 } 2043 2044 panel->backlight.present = true; 2045 2046 drm_dbg_kms(&dev_priv->drm, 2047 "Connector %s backlight initialized, %s, brightness %u/%u\n", 2048 connector->name, 2049 enableddisabled(panel->backlight.enabled), 2050 panel->backlight.level, panel->backlight.max); 2051 2052 return 0; 2053 } 2054 2055 static void intel_panel_destroy_backlight(struct intel_panel *panel) 2056 { 2057 /* dispose of the pwm */ 2058 if (panel->backlight.pwm) 2059 pwm_put(panel->backlight.pwm); 2060 2061 panel->backlight.present = false; 2062 } 2063 2064 static const struct intel_panel_bl_funcs bxt_pwm_funcs = { 2065 .setup = bxt_setup_backlight, 2066 .enable = bxt_enable_backlight, 2067 .disable = bxt_disable_backlight, 2068 .set = bxt_set_backlight, 2069 .get = bxt_get_backlight, 2070 .hz_to_pwm = bxt_hz_to_pwm, 2071 }; 2072 2073 static const struct intel_panel_bl_funcs cnp_pwm_funcs = { 2074 .setup = cnp_setup_backlight, 2075 .enable = cnp_enable_backlight, 2076 .disable = cnp_disable_backlight, 2077 .set = bxt_set_backlight, 2078 .get = bxt_get_backlight, 2079 .hz_to_pwm = cnp_hz_to_pwm, 2080 }; 2081 2082 static const struct intel_panel_bl_funcs lpt_pwm_funcs = { 2083 .setup = lpt_setup_backlight, 2084 .enable = lpt_enable_backlight, 2085 .disable = lpt_disable_backlight, 2086 .set = lpt_set_backlight, 2087 .get = lpt_get_backlight, 2088 .hz_to_pwm = lpt_hz_to_pwm, 2089 }; 2090 2091 static const struct intel_panel_bl_funcs spt_pwm_funcs = { 2092 .setup = lpt_setup_backlight, 2093 .enable = lpt_enable_backlight, 2094 .disable = lpt_disable_backlight, 2095 .set = lpt_set_backlight, 2096 .get = lpt_get_backlight, 2097 .hz_to_pwm = spt_hz_to_pwm, 2098 }; 2099 2100 static const struct intel_panel_bl_funcs pch_pwm_funcs = { 2101 .setup = pch_setup_backlight, 2102 .enable = pch_enable_backlight, 2103 .disable = pch_disable_backlight, 2104 .set = pch_set_backlight, 2105 .get = pch_get_backlight, 2106 .hz_to_pwm = pch_hz_to_pwm, 2107 }; 2108 2109 static const struct intel_panel_bl_funcs ext_pwm_funcs = { 2110 .setup = ext_pwm_setup_backlight, 2111 .enable = ext_pwm_enable_backlight, 2112 .disable = ext_pwm_disable_backlight, 2113 .set = ext_pwm_set_backlight, 2114 .get = ext_pwm_get_backlight, 2115 }; 2116 2117 static const struct intel_panel_bl_funcs vlv_pwm_funcs = { 2118 .setup = vlv_setup_backlight, 2119 .enable = vlv_enable_backlight, 2120 .disable = vlv_disable_backlight, 2121 .set = vlv_set_backlight, 2122 .get = vlv_get_backlight, 2123 .hz_to_pwm = vlv_hz_to_pwm, 2124 }; 2125 2126 static const struct intel_panel_bl_funcs i965_pwm_funcs = { 2127 .setup = i965_setup_backlight, 2128 .enable = i965_enable_backlight, 2129 .disable = i965_disable_backlight, 2130 .set = i9xx_set_backlight, 2131 .get = i9xx_get_backlight, 2132 .hz_to_pwm = i965_hz_to_pwm, 2133 }; 2134 2135 static const struct intel_panel_bl_funcs i9xx_pwm_funcs = { 2136 .setup = i9xx_setup_backlight, 2137 .enable = i9xx_enable_backlight, 2138 .disable = i9xx_disable_backlight, 2139 .set = i9xx_set_backlight, 2140 .get = i9xx_get_backlight, 2141 .hz_to_pwm = i9xx_hz_to_pwm, 2142 }; 2143 2144 static const struct intel_panel_bl_funcs pwm_bl_funcs = { 2145 .setup = intel_pwm_setup_backlight, 2146 .enable = intel_pwm_enable_backlight, 2147 .disable = intel_pwm_disable_backlight, 2148 .set = intel_pwm_set_backlight, 2149 .get = intel_pwm_get_backlight, 2150 }; 2151 2152 /* Set up chip specific backlight functions */ 2153 static void 2154 intel_panel_init_backlight_funcs(struct intel_panel *panel) 2155 { 2156 struct intel_connector *connector = 2157 container_of(panel, struct intel_connector, panel); 2158 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 2159 2160 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 2161 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 2162 return; 2163 2164 if (IS_GEN9_LP(dev_priv)) { 2165 panel->backlight.pwm_funcs = &bxt_pwm_funcs; 2166 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { 2167 panel->backlight.pwm_funcs = &cnp_pwm_funcs; 2168 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { 2169 if (HAS_PCH_LPT(dev_priv)) 2170 panel->backlight.pwm_funcs = &lpt_pwm_funcs; 2171 else 2172 panel->backlight.pwm_funcs = &spt_pwm_funcs; 2173 } else if (HAS_PCH_SPLIT(dev_priv)) { 2174 panel->backlight.pwm_funcs = &pch_pwm_funcs; 2175 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 2176 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 2177 panel->backlight.pwm_funcs = &ext_pwm_funcs; 2178 } else { 2179 panel->backlight.pwm_funcs = &vlv_pwm_funcs; 2180 } 2181 } else if (IS_DISPLAY_VER(dev_priv, 4)) { 2182 panel->backlight.pwm_funcs = &i965_pwm_funcs; 2183 } else { 2184 panel->backlight.pwm_funcs = &i9xx_pwm_funcs; 2185 } 2186 2187 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 2188 intel_dp_aux_init_backlight_funcs(connector) == 0) 2189 return; 2190 2191 /* We're using a standard PWM backlight interface */ 2192 panel->backlight.funcs = &pwm_bl_funcs; 2193 } 2194 2195 enum drm_connector_status 2196 intel_panel_detect(struct drm_connector *connector, bool force) 2197 { 2198 struct drm_i915_private *i915 = to_i915(connector->dev); 2199 2200 if (!INTEL_DISPLAY_ENABLED(i915)) 2201 return connector_status_disconnected; 2202 2203 return connector_status_connected; 2204 } 2205 2206 int intel_panel_init(struct intel_panel *panel, 2207 struct drm_display_mode *fixed_mode, 2208 struct drm_display_mode *downclock_mode) 2209 { 2210 intel_panel_init_backlight_funcs(panel); 2211 2212 panel->fixed_mode = fixed_mode; 2213 panel->downclock_mode = downclock_mode; 2214 2215 return 0; 2216 } 2217 2218 void intel_panel_fini(struct intel_panel *panel) 2219 { 2220 struct intel_connector *intel_connector = 2221 container_of(panel, struct intel_connector, panel); 2222 2223 intel_panel_destroy_backlight(panel); 2224 2225 if (panel->fixed_mode) 2226 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 2227 2228 if (panel->downclock_mode) 2229 drm_mode_destroy(intel_connector->base.dev, 2230 panel->downclock_mode); 2231 } 2232